MyJIT Code
Status: Beta
Brought to you by:
pkrajca
FeepingCreature wants to merge 0 commits from /u/feep/myjit/ to master, 2017-03-20
fix by removing the xor of the target register, since it's unnecessary anyways cause amd64 zero extends 32-bit ops. (https://support.amd.com/TechDocs/24592.pdf section 3.4.5, https://software.intel.com/sites/default/files/managed/a4/60/253665-sdm-vol-1.pdf section 3.4.1.1)
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You're right. Thank you for pointing this out and for the bugfix.