Re: [myhdl-list] attribute enum_encoding: string;

[Jan D. <ja...@ja...>]

Mm, I suspect there will still be a bug iff an
enum type is used at the top-level.

If someone provides a failing test case, I'll
fix it :-)

On 09/09/2013 02:43 PM, David Holl wrote:
> ugh!  My asinine filesystem lockdowns had prevented any recent updates to myhdl, and I had been stuck on an old 0.8dev from Nov 9, 2012.  Updating to the latest 0.8 fixed the problem.
>
> The vhdl output from the Nov 9th 0.8dev did indeed have a top-level package declared before any other statements such as "use work.pck_myhdl_08.all;"
>
>     package pck_pcie_drx is
>          type t_enum_t_state_1 is (
>          SM_RESET,
>     ...
>
> (but my design does not use any enum's in the ports)
>
> However in the vhdl from the latest 0.8, there is no top-level package, and the code opens with
>
>     library IEEE;
>     use IEEE.std_logic_1164.all;
>     use IEEE.numeric_std.all;
>     use std.textio.all;
>     use work.pck_myhdl_08.all;
>     entity pcie_drx is
>          port (
>              user_clk: in std_logic;
>     ...
>
>
> Thank you Chris and Jan for looking into this!
> - David
>
>
> On Mon, Sep 9, 2013 at 6:25 AM, Jan Decaluwe <ja...@ja... <mailto:ja...@ja...>> wrote:
>
>     Mm, the attribute is declared in pck_myhdl but probably this
>     is namespace issue. Iff a port uses an enum, then a top-level
>     package is needed and the declaration is not seen, unlike
>     when the enum type is declared in the architecture.
>
>     Jan
>
>     On 09/03/2013 09:48 PM, David Holl wrote:
>      > Hello, When using ghdl for syntax checks, I get the following error
>      > for any state machine where encoding="one_hot": pcie_drx.vhd:137:11:
>      > no declaration for "enum_encoding"
>      >
>      > I can resolve ghdl's complaints by adding attribute enum_encoding:
>      > string; to the generated .vhd file.
>      >
>      > Is there a way to have this line included automatically in .vhd
>      > output?  I could add it via a shell script, but I'm wondering if
>      > there is "better way" to do it.  (or is GHDL in error?)
>      >
>      >
>      > For example, here is an trimmed-down excerpt from the top of the .vhd
>      > file showing where I add the line:
>      >
>      > package pck_pcie_drx is attribute enum_encoding: string;  <--- I need
>      > to add this line.
>      >
>      > type t_enum_t_state_22 is (
>      >
>      > IDLE,
>      >
>      > THINK,
>      >
>      > SEND_CMD,
>      >
>      > ADVANCE
>      >
>      > );
>      >
>      > attribute enum_encoding of t_enum_t_state_22: type is "0001 0010 0100
>      > 1000";
>      >
>      > type t_enum_t_state_23 is ( CMD, MWR_H0H1, MWR32_H2D0, MWR32_D1D2,
>      > MWR32_D3XX, MWR64_H2H3, MWR64_D0D1, DROP ); attribute enum_encoding
>      > of t_enum_t_state_23: type is "00000001 00000010 00000100 00001000
>      > 00010000 00100000 01000000 10000000"; end package pck_pcie_drx;
>      > library IEEE; etc...
>      >
>      >
>      >
>      >
>      > - David ps:  Thank you for the fantastic MyHDL.
>      >
>      >
>      >
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>     --
>     Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
>           Python as a HDL: http://www.myhdl.org
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-- 
Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com
     Python as a HDL: http://www.myhdl.org
     VHDL development, the modern way: http://www.sigasi.com
     World-class digital design: http://www.easics.com