Re: [myhdl-list] docstrings forwarded to converted output
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From: Jan D. <ja...@ja...> - 2010-07-01 22:32:07
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Angel Ezquerra wrote: >> On Tue, Jun 29, 2010 at 4:47 PM, Jan Decaluwe <jan <at> jandecaluwe.com> > wrote:I just pushed a changeset which is supposed to add support >> for forwarding docstrings to converted output. >> This provides a way to document the converted output. >> Ordinary Python comments are ignored, because they are >> not kept in the ast tree generated by the ast module. >> But any docstring is forwarded. Those on "official places" >> are put on a hopefully logical position, but "unofficial" >> ones are forwarded also, right on the line where they >> occur. By using a docstring instead of an ordinary comment, >> you can control which comments should be kept by the >> conversion, and which not. >> This is an experimental feature, not extensively tested. >> Let us know what you find. >> Jan > > > Jan, > > I just gave this a try but it does not work for me. I download the latest > version from the mercurial repository and then I ran the rom.py example. This > example has some docstrings and also calls toVHDL, so I figured that it would > generate a rom.vhd file which should have the docstring (as a comment?). Correct. > However there is no trace of the docstring on the vhdl output. > > Is there something that I should do to enable this feature? Or am I doing > something wrong? Below you see what I get - the docstring as a VHDL comment as expected. Are you sure you are seeing the latest version (either after a fresh install, or by making sure that your PYTHONPATH sees your local repository first)? -- File: rom.vhd -- Generated by MyHDL 0.7dev -- Date: Fri Jul 2 00:25:43 2010 library IEEE; use IEEE.std_logic_1164.all; use IEEE.numeric_std.all; use std.textio.all; use work.pck_myhdl_07dev.all; entity rom is port ( dout: out unsigned(7 downto 0); addr: in unsigned(3 downto 0) ); end entity rom; -- ROM model architecture MyHDL of rom is begin ROM_READ: process (addr) is begin case to_integer(addr) is when 0 => dout <= "00010001"; when 1 => dout <= "10000110"; when 2 => dout <= "00110100"; when others => dout <= "00001001"; end case; end process ROM_READ; end architecture MyHDL; -- Jan Decaluwe - Resources bvba - http://www.jandecaluwe.com Python as a HDL: http://www.myhdl.org VHDL development, the modern way: http://www.sigasi.com Analog design automation: http://www.mephisto-da.com World-class digital design: http://www.easics.com |