mspsim-commit — Commit messages

[Mspsim-commit] SF.net SVN: mspsim: [11] mspsim/tests/cputest.c

[<jo...@us...>]

Revision: 11
          http://mspsim.svn.sourceforge.net/mspsim/?rev=11&view=rev
Author:   joxe
Date:     2007-10-25 05:23:33 -0700 (Thu, 25 Oct 2007)

Log Message:
-----------
put back all the testcases again

Modified Paths:
--------------
    mspsim/tests/cputest.c

Modified: mspsim/tests/cputest.c
===================================================================
--- mspsim/tests/cputest.c	2007-10-25 12:21:58 UTC (rev 10)
+++ mspsim/tests/cputest.c	2007-10-25 12:23:33 UTC (rev 11)
@@ -176,8 +176,8 @@
     if((c % 5) == 0) {
       assertTrue(c != 1);
     }
-    printf("(%d,%d,%d)\n", c, (c % 5), c==1);
-    printf("(%d,%d,%d)\n", c, (c % 5), c==1);
+/*     printf("(%d,%d,%d)\n", c, (c % 5), c==1); */
+/*     printf("(%d,%d,%d)\n", c, (c % 5), c==1); */
   }
 }
 
@@ -249,12 +249,12 @@
 
   initTest();
 
-/*   testSimple(); */
-/*   testIntegers(); */
-/*   testFloats(); */
-/*   testStrings(); */
-/*   testBitFields(); */
-/*   testFunctions(); */
+  testSimple();
+  testIntegers();
+  testFloats();
+  testStrings();
+  testBitFields();
+  testFunctions();
   testModulo();
 
   printf("EXIT\n");


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[Mspsim-commit] SF.net SVN: mspsim: [10] mspsim

[<jo...@us...>]

Revision: 10
          http://mspsim.svn.sourceforge.net/mspsim/?rev=10&view=rev
Author:   joxe
Date:     2007-10-25 05:21:58 -0700 (Thu, 25 Oct 2007)

Log Message:
-----------
fixed bug in BIT instruction

Modified Paths:
--------------
    mspsim/se/sics/mspsim/core/MSP430Core.java
    mspsim/tests/cputest.c

Modified: mspsim/se/sics/mspsim/core/MSP430Core.java
===================================================================
--- mspsim/se/sics/mspsim/core/MSP430Core.java	2007-10-25 11:10:47 UTC (rev 9)
+++ mspsim/se/sics/mspsim/core/MSP430Core.java	2007-10-25 12:21:58 UTC (rev 10)
@@ -862,11 +862,12 @@
       case BIT: // BIT
 	dst = src & dst;
 	sr = readRegister(SR);
+	// Clear overflow and carry!
+	sr = sr & ~(CARRY | OVERFLOW);
+	// Set carry if result is non-zero!
 	if (dst != 0) {
 	  sr |= CARRY;
 	}
-	// Clear overflow!
-	sr &= ~OVERFLOW;
 	writeRegister(SR, sr);
 	break;
       case BIC: // BIC

Modified: mspsim/tests/cputest.c
===================================================================
--- mspsim/tests/cputest.c	2007-10-25 11:10:47 UTC (rev 9)
+++ mspsim/tests/cputest.c	2007-10-25 12:21:58 UTC (rev 10)
@@ -169,24 +169,16 @@
 /*--------------------------------------------------------------------------*/
 
 static void testModulo() {
-  int c,i;
-  c = 1;
+  int c;
   testCase("Modulo");
-  do {
-    i = 13;
 
-    i = i % 14;
-/*     printf("(%d,%d,%d)\n",i, (i % 14), i==1); */
-/*     printf("(%d,%d,%d)\n",i, (i % 14), i==1); */
-    if (i < 0) printf("%d\n",i);
-
-
-    c = c + 1;
-  } while (c < 3);
-
-/*     if((i % 5) == 0) { */
-/*       assertTrue(i != 1); */
-/*     } */
+  for(c = 2; c >= 0; c--) {
+    if((c % 5) == 0) {
+      assertTrue(c != 1);
+    }
+    printf("(%d,%d,%d)\n", c, (c % 5), c==1);
+    printf("(%d,%d,%d)\n", c, (c % 5), c==1);
+  }
 }
 
 /*--------------------------------------------------------------------------*/


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[Mspsim-commit] SF.net SVN: mspsim: [9] mspsim

[<jo...@us...>]

Revision: 9
          http://mspsim.svn.sourceforge.net/mspsim/?rev=9&view=rev
Author:   joxe
Date:     2007-10-25 04:10:47 -0700 (Thu, 25 Oct 2007)

Log Message:
-----------
fixed elf to not printout all debuginfo

Modified Paths:
--------------
    mspsim/Makefile
    mspsim/se/sics/mspsim/util/ELF.java

Modified: mspsim/Makefile
===================================================================
--- mspsim/Makefile	2007-10-25 11:03:36 UTC (rev 8)
+++ mspsim/Makefile	2007-10-25 11:10:47 UTC (rev 9)
@@ -95,10 +95,6 @@
 $(CPUTEST):
 	(cd tests && $(MAKE))
 
-test:
-	cd tests && make
-	java se.sics.mspsim.util.Test $(CPUTEST)
-
 .PHONY: mtest
 mtest:	compile $(CPUTEST)
 	@-$(RM) mini-test_cpu.txt

Modified: mspsim/se/sics/mspsim/util/ELF.java
===================================================================
--- mspsim/se/sics/mspsim/util/ELF.java	2007-10-25 11:03:36 UTC (rev 8)
+++ mspsim/se/sics/mspsim/util/ELF.java	2007-10-25 11:10:47 UTC (rev 9)
@@ -106,20 +106,22 @@
     shnum = readElf16();
     shstrndx = readElf16();
 
-    System.out.println("-- ELF Header --");
-    System.out.println("type: " + Integer.toString(type, 16));
-    System.out.println("machine: " + Integer.toString(machine, 16));
-    System.out.println("version: " + Integer.toString(version, 16));
-    System.out.println("entry: " + Integer.toString(entry, 16));
-    System.out.println("phoff: " + Integer.toString(phoff, 16));
-    System.out.println("shoff: " + Integer.toString(shoff, 16));
-    System.out.println("flags: " + Integer.toString(flags, 16));
-    System.out.println("ehsize: " + Integer.toString(ehsize, 16));
-    System.out.println("phentsize: " + Integer.toString(phentsize, 16));
-    System.out.println("phentnum: " + Integer.toString(phnum, 16));
-    System.out.println("shentsize: " + Integer.toString(shentsize, 16));
-    System.out.println("shentnum: " + Integer.toString(shnum, 16));
-    System.out.println("shstrndx: " + Integer.toString(shstrndx, 16));
+    if (DEBUG) {
+      System.out.println("-- ELF Header --");
+      System.out.println("type: " + Integer.toString(type, 16));
+      System.out.println("machine: " + Integer.toString(machine, 16));
+      System.out.println("version: " + Integer.toString(version, 16));
+      System.out.println("entry: " + Integer.toString(entry, 16));
+      System.out.println("phoff: " + Integer.toString(phoff, 16));
+      System.out.println("shoff: " + Integer.toString(shoff, 16));
+      System.out.println("flags: " + Integer.toString(flags, 16));
+      System.out.println("ehsize: " + Integer.toString(ehsize, 16));
+      System.out.println("phentsize: " + Integer.toString(phentsize, 16));
+      System.out.println("phentnum: " + Integer.toString(phnum, 16));
+      System.out.println("shentsize: " + Integer.toString(shentsize, 16));
+      System.out.println("shentnum: " + Integer.toString(shnum, 16));
+      System.out.println("shstrndx: " + Integer.toString(shstrndx, 16));
+    }
   }
 
   public ELFSection readSectionHeader() {
@@ -220,7 +222,9 @@
     programs = new ELFProgram[phnum];
     for (int i = 0, n = phnum; i < n; i++) {
       programs[i] = readProgramHeader();
-      System.out.println("-- Program header --\n" + programs[i].toString());
+      if (DEBUG) {
+	System.out.println("-- Program header --\n" + programs[i].toString());
+      }
     }
   }
 


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[Mspsim-commit] SF.net SVN: mspsim: [8] mspsim

[<jo...@us...>]

Revision: 8
          http://mspsim.svn.sourceforge.net/mspsim/?rev=8&view=rev
Author:   joxe
Date:     2007-10-25 04:03:36 -0700 (Thu, 25 Oct 2007)

Log Message:
-----------
fixed so that test cases can be run

Modified Paths:
--------------
    mspsim/Makefile
    mspsim/se/sics/mspsim/util/Test.java

Modified: mspsim/Makefile
===================================================================
--- mspsim/Makefile	2007-10-25 10:58:19 UTC (rev 7)
+++ mspsim/Makefile	2007-10-25 11:03:36 UTC (rev 8)
@@ -54,8 +54,7 @@
 
 FIRMWAREFILE = blinker2.ihex
 
-CPUTEST := tests/cputest.ihex
-CPUTESTMAP := $(CPUTEST:.ihex=.map)
+CPUTEST := tests/cputest.firmware
 
 PACKAGES := ${addprefix se/sics/mspsim/,core platform/esb platform/sky util}
 
@@ -79,7 +78,7 @@
 
 .PHONY: run
 run:	compile
-	java se.sics.util.IHexReader $(FIRMWAREFILE) $(MAPFILE)
+	java se.sics.mspsim.util.IHexReader $(FIRMWAREFILE) $(MAPFILE)
 
 runesb:	compile
 	java se.sics.mspsim.platform.esb.ESBNode $(FIRMWAREFILE) $(MAPFILE)
@@ -91,19 +90,19 @@
 test:	cputest
 
 cputest:	$(CPUTEST)
-	java se.sics.util.Test $(CPUTEST) $(CPUTESTMAP)
+	java se.sics.mspsim.util.Test $(CPUTEST)
 
 $(CPUTEST):
 	(cd tests && $(MAKE))
 
 test:
 	cd tests && make
-	java se.sics.util.Test $(CPUTEST) $(CPUTESTMAP)
+	java se.sics.mspsim.util.Test $(CPUTEST)
 
 .PHONY: mtest
 mtest:	compile $(CPUTEST)
 	@-$(RM) mini-test_cpu.txt
-	java se.sics.util.Test -debug $(CPUTEST) $(CPUTESTMAP) >mini-test_cpu.txt
+	java se.sics.util.Test -debug $(CPUTEST) >mini-test_cpu.txt
 
 
 ###############################################################

Modified: mspsim/se/sics/mspsim/util/Test.java
===================================================================
--- mspsim/se/sics/mspsim/util/Test.java	2007-10-25 10:58:19 UTC (rev 7)
+++ mspsim/se/sics/mspsim/util/Test.java	2007-10-25 11:03:36 UTC (rev 8)
@@ -40,9 +40,10 @@
  */
 package se.sics.mspsim.util;
 import se.sics.mspsim.core.*;
+import java.io.IOException;
 
 /**
- * Test - tests a ihex file and exits when reporting "FAIL:" first
+ * Test - tests a firmware file and exits when reporting "FAIL:" first
  * on a line...
  */
 public class Test implements USARTListener {
@@ -89,24 +90,21 @@
       index++;
     }
 
-    IHexReader reader = new IHexReader();
-    String ihexFile = args[index++];
-    int[] memory = cpu.getMemory();
-    reader.readFile(memory, ihexFile);
-    cpu.reset();
+    try {
+      int[] memory = cpu.getMemory();
+      ELF elf = ELF.readELF(args[index++]);
+      elf.loadPrograms(memory);
+      MapTable map = elf.getMap();
+      cpu.getDisAsm().setMap(map);
+      cpu.setMap(map);
+      cpu.reset();
 
-    if (index < args.length && cpu.getDisAsm() != null) {
-      try {
-	MapTable map = new MapTable(args[index++]);
-	cpu.getDisAsm().setMap(map);
-      } catch (Exception e) {
-	e.printStackTrace();
-	System.exit(1);
-      }
+      // Create the "tester"
+      new Test(cpu);
+      cpu.cpuloop();
+    } catch (IOException ioe) {
+      ioe.printStackTrace();
     }
 
-    // Create the "tester"
-    new Test(cpu);
-    cpu.cpuloop();
   }
 }


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[Mspsim-commit] SF.net SVN: mspsim: [7] mspsim

[<jo...@us...>]

Revision: 7
          http://mspsim.svn.sourceforge.net/mspsim/?rev=7&view=rev
Author:   joxe
Date:     2007-10-25 03:58:19 -0700 (Thu, 25 Oct 2007)

Log Message:
-----------
added testcases

Modified Paths:
--------------
    mspsim/Makefile

Added Paths:
-----------
    mspsim/firmware/
    mspsim/tests/
    mspsim/tests/Makefile
    mspsim/tests/cputest.c
    mspsim/tests/msp430setup.c
    mspsim/tests/msp430setup.h

Modified: mspsim/Makefile
===================================================================
--- mspsim/Makefile	2007-10-24 11:25:55 UTC (rev 6)
+++ mspsim/Makefile	2007-10-25 10:58:19 UTC (rev 7)
@@ -1,13 +1,11 @@
 ###############################################################
-# $Revision: 1.11 $ $Date: 2007/10/21 19:47:53 $
+# Makefile for mspsim
 #
 # Needed stuff in the PATH:
-#  java, javac (JDK 1.2 or newer)
+#  java, javac (JDK 1.5 or newer)
 #
-# Under MS-DOS/Windows 95/NT
-#  A GNU compatible Make (for example Cygnus GNU-Win 32,
-#			  http://www.cygnus.com/misc/gnu-win32/)
-# Note: might need to be called with "make --win32" under Windows!!!
+# Under MS-DOS/Windows
+#  A GNU compatible Make (for example Cygwin's)
 ###############################################################
 
 ###############################################################
@@ -37,7 +35,7 @@
   # Add "'" around filenames when removing them because UNIX expands "$"
   APO='#'  (last apostrophe to avoid incorrect font-lock)
 else
-  # These setting are for MS-DOS/Windows 95/Windows NT
+  # These setting are for Windows
   SEPARATOR=;
   APO=
 endif
@@ -54,7 +52,7 @@
 # SERVER OBJECTS
 ###############################################################
 
-IHEXFILE = blinker2.ihex
+FIRMWAREFILE = blinker2.ihex
 
 CPUTEST := tests/cputest.ihex
 CPUTESTMAP := $(CPUTEST:.ihex=.map)
@@ -81,13 +79,13 @@
 
 .PHONY: run
 run:	compile
-	java se.sics.util.IHexReader $(IHEXFILE) $(MAPFILE)
+	java se.sics.util.IHexReader $(FIRMWAREFILE) $(MAPFILE)
 
 runesb:	compile
-	java se.sics.mspsim.platform.esb.ESBNode $(IHEXFILE) $(MAPFILE)
+	java se.sics.mspsim.platform.esb.ESBNode $(FIRMWAREFILE) $(MAPFILE)
 
 runsky:	compile
-	java se.sics.mspsim.platform.sky.SkyNode $(IHEXFILE) $(MAPFILE)
+	java se.sics.mspsim.platform.sky.SkyNode $(FIRMWAREFILE) $(MAPFILE)
 
 .PHONY: cputest test
 test:	cputest

Added: mspsim/tests/Makefile
===================================================================
--- mspsim/tests/Makefile	                        (rev 0)
+++ mspsim/tests/Makefile	2007-10-25 10:58:19 UTC (rev 7)
@@ -0,0 +1,50 @@
+### Check if we are running under Windows
+
+ifndef WINDIR
+  ifdef OS
+    ifneq (,$(findstring Windows,$(OS)))
+      WINDIR := Windows
+    endif
+  endif
+endif
+
+.SUFFIXES:
+
+MCU=msp430x149
+
+### Compiler definitions
+CC       = msp430-gcc
+LD       = msp430-ld
+AS       = msp430-as
+AR       = msp430-ar
+OBJCOPY  = msp430-objcopy
+STRIP    = msp430-strip
+BSL      = msp430-bsl
+CFLAGSNO = -I. -DWITH_ASCII \
+           -Wall -mmcu=$(MCU) -g
+CFLAGS  += $(CFLAGSNO) -Os
+
+SOURCES := msp430setup.c
+
+OBJECTS := $(SOURCES:.c=.o)
+
+#all:	cputest.ihex
+all:	cputest.firmware
+
+%.firmware:	%.co $(OBJECTS)
+	$(CC) -mmcu=$(MCU) -Wl,-Map=$(@:.firmware=.map) $(CFLAGS) -o $@ $^
+
+%.ihex: %.firmware
+	$(OBJCOPY) $^ -O ihex $@
+
+%.o: %.c
+	$(CC) $(CFLAGS) -c $< -o $@
+
+%.co: %.c
+	$(CC) $(CFLAGS) -DAUTOSTART_ENABLE -c $< -o $@
+
+%.u:	%.ihex
+	msp430-jtag -eI $^
+
+clean:
+	rm -f *~ *.lst *.map *.co *.o *.ihex *.firmware

Added: mspsim/tests/cputest.c
===================================================================
--- mspsim/tests/cputest.c	                        (rev 0)
+++ mspsim/tests/cputest.c	2007-10-25 10:58:19 UTC (rev 7)
@@ -0,0 +1,270 @@
+/*
+ * Copyright (c) 2007, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *
+ * $Id: cputest.c,v 1.19 2007/10/24 22:17:46 nfi Exp $
+ *
+ * -----------------------------------------------------------------
+ *
+ * Author  : Adam Dunkels, Joakim Eriksson, Niclas Finne
+ * Created : 2006-03-07
+ * Updated : $Date: 2007/10/24 22:17:46 $
+ *           $Revision: 1.19 $
+ */
+
+#include "msp430setup.h"
+#include <stdio.h>
+#include <string.h>
+
+/* From Adams test-suite */
+#define TEST(...) if(__VA_ARGS__) {					 \
+                    printf("OK: " #__VA_ARGS__ " passed at %s:%d\n", __FILE__,__LINE__); \
+                  } else {						 \
+                    printf("FAIL: " #__VA_ARGS__ " failed at %s:%d\n", __FILE__,__LINE__); \
+                  }
+
+#define TEST2(text,...) if(__VA_ARGS__) {					 \
+                    printf("OK: " #text " passed at %s:%d\n", __FILE__,__LINE__); \
+                  } else {						 \
+                    printf("FAIL: " #text " failed at %s:%d\n", __FILE__,__LINE__); \
+                  }
+
+#define assertTrue(...) TEST(__VA_ARGS__)
+#define assertFalse(...) TEST(!(__VA_ARGS__))
+
+#define assertTrue2(text,...) TEST2(text,__VA_ARGS__)
+#define assertFalse2(text,...) TEST2(text,!(__VA_ARGS__))
+
+static int testzero(int hm)
+{
+  return hm > 0;
+}
+
+static int caseID = 0;
+
+static void initTest() {
+  caseID = 0;
+}
+
+static void testCase(char *description) {
+  caseID++;
+  printf("-------------\n");
+  printf("TEST %d: %s\n", caseID, description);
+}
+
+static void testSimple() {
+  int a,b,c;
+  a = 1; b = 2; c = 4;
+  testCase("Arithmetic Operations");
+
+  assertTrue((a << b) == 4);
+  assertTrue((c >> a) == 2);
+
+  assertFalse(0 > 0);
+  assertFalse(a > b);
+
+  assertFalse(testzero(0));
+}
+
+static void testIntegers() {
+  int a,b,c;
+  int t[3];
+  testCase("Integer Operations");
+  a = 1; b = 2; c = -42;
+  t[0] = 1;
+  t[1] = 2;
+  t[2] = 3;
+  assertTrue(a == 1);
+  assertTrue((b + c) == -40);
+  assertTrue(t[0] == 1);
+  assertTrue(t[1] == 2);
+  assertTrue(t[t[0]] == 2);
+  assertTrue((a+b) == 3);
+  assertTrue((b-a) == 1);
+  assertTrue((a-b) == -1);
+  assertTrue((a*b) == 2);
+  assertTrue(a > 0);
+  assertTrue(b > a);
+  assertTrue(b != a);
+  assertTrue((a ^ b) == 3);
+  assertTrue((a ^ 4) == 5);
+  assertTrue((a ^ a) == 0);
+  assertFalse(a > b);
+
+  a = 15;
+  b = 17;
+  assertTrue((a & ~b) == 14);
+}
+
+static void testFloats() {
+  int i;
+  float f;
+  i = 2;
+  f = 0.5;
+  testCase("Float Operations");
+  assertTrue((i * f) == 1);
+  i++;
+  assertTrue((i * f) == 1.5);
+}
+
+static void testStrings() {
+  char buf[10];
+
+  testCase("String Operations");
+  sprintf(buf, "test");
+  assertTrue2("test => test", strcmp(buf, "test") == 0);
+  sprintf(buf, "%c", 'a');
+  assertTrue2("buf == 'a'", strcmp(buf, "a") == 0);
+}
+
+/*--------------------------------------------------------------------------*/
+
+static int id(int first, ...)
+{
+  va_list marker;
+  va_start( marker, first );
+  first = va_arg( marker, int);
+  va_end( marker );
+  return first;
+}
+
+static void testFunctions() {
+  volatile int i;
+
+  testCase("Functions");
+  i = 47;
+
+/*   printf("i=%d i+1=%d id(i)=%d\n", i, i + 1, id(0, i)); */
+
+  assertTrue(i == 47);
+  assertTrue(id(0,47) == 47);
+  assertTrue(id(0,i) == 47);
+}
+
+/*--------------------------------------------------------------------------*/
+
+static void testModulo() {
+  int c,i;
+  c = 1;
+  testCase("Modulo");
+  do {
+    i = 13;
+
+    i = i % 14;
+/*     printf("(%d,%d,%d)\n",i, (i % 14), i==1); */
+/*     printf("(%d,%d,%d)\n",i, (i % 14), i==1); */
+    if (i < 0) printf("%d\n",i);
+
+
+    c = c + 1;
+  } while (c < 3);
+
+/*     if((i % 5) == 0) { */
+/*       assertTrue(i != 1); */
+/*     } */
+}
+
+/*--------------------------------------------------------------------------*/
+
+/* Bit field tests */
+
+static struct {
+  char green:4, yellow:4, red:4;
+} leds;
+
+static struct {
+  char green:2, yellow:2, red:2;  /* These bit fields should really be
+				     only one bit wide, but that
+				     crashed gcc... */
+} invert;
+
+#include <io.h>
+#ifndef BV
+#define BV(n) (1 << (n))
+#endif
+
+void testBis() {
+  P4DIR |= BV(2) | BV(5) | BV(6);
+  assertTrue(P4DIR == 100);
+}
+
+static void testBitFields() {
+  static int pelle = 0;
+
+  testCase("Bit field Operations");
+
+  P4DIR = 0;
+  testBis();
+
+  leds.green = 1;
+  leds.yellow = 1;
+  leds.red = 1;
+
+  assertTrue(leds.green > 0);
+  assertTrue(leds.yellow > 0);
+  assertTrue(leds.red > 0);
+
+  leds.green -= 1;
+  assertTrue(leds.green == 0);
+
+  pelle = 0x4711;
+
+  invert.green = 1;
+  invert.yellow = 1;
+  invert.red = 1;
+
+  assertTrue(invert.green > 0);
+  assertTrue(invert.yellow > 0);
+  assertTrue(invert.red > 0);
+
+  invert.green ^= 1;
+  assertTrue(invert.green == 0);
+
+}
+
+
+/*--------------------------------------------------------------------------*/
+
+int
+main(void)
+{
+  msp430_setup();
+
+  initTest();
+
+/*   testSimple(); */
+/*   testIntegers(); */
+/*   testFloats(); */
+/*   testStrings(); */
+/*   testBitFields(); */
+/*   testFunctions(); */
+  testModulo();
+
+  printf("EXIT\n");
+  return 0;
+}

Added: mspsim/tests/msp430setup.c
===================================================================
--- mspsim/tests/msp430setup.c	                        (rev 0)
+++ mspsim/tests/msp430setup.c	2007-10-25 10:58:19 UTC (rev 7)
@@ -0,0 +1,380 @@
+/*
+ * Copyright (c) 2007, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: msp430setup.c,v 1.2 2007/01/22 15:45:04 nfi Exp $
+ *
+ * -----------------------------------------------------------------
+ *
+ * Author  : Adam Dunkels, Joakim Eriksson, Niclas Finne
+ * Created : 2007-01-22
+ * Updated : $Date: 2007/01/22 15:45:04 $
+ *           $Revision: 1.2 $
+ */
+
+#include "msp430setup.h"
+#include <io.h>
+#include <signal.h>
+#include <stdio.h>
+#include <sys/unistd.h>
+
+
+/*--------------------------------------------------------------------------*/
+/* RS232 Interface */
+/*--------------------------------------------------------------------------*/
+
+static int (* input_handler)(unsigned char) = NULL;
+
+/*---------------------------------------------------------------------------*/
+interrupt(UART1RX_VECTOR)
+     rs232_rx_usart1(void)
+{
+  /* Check status register for receive errors. - before reading RXBUF since
+     it clears the error and interrupt flags */
+  if(!(URCTL1 & RXERR) && input_handler != NULL) {
+    input_handler(RXBUF1);
+
+  } else {
+    /* Else read out the char to clear the I-flags, etc. */
+    RXBUF1;
+  }
+}
+/*--------------------------------------------------------------------------*/
+void
+rs232_init(void)
+{
+
+  /* RS232 */
+  UCTL1 = CHAR;                         /* 8-bit character */
+  UTCTL1 = SSEL1;                       /* UCLK = MCLK */
+
+  rs232_set_speed(RS232_57600);
+
+  input_handler = NULL;
+
+  ME2 |= (UTXE1 | URXE1);                 /* Enable USART1 TXD/RXD */
+  IE2 |= URXIE1;                        /* Enable USART1 RX interrupt  */
+}
+/*---------------------------------------------------------------------------*/
+void
+rs232_send(char c)
+{
+  /* Loop until the transmission buffer is available. */
+  while ((IFG2 & UTXIFG1) == 0);
+
+  /* Transmit the data. */
+  TXBUF1 = c;
+}
+/*---------------------------------------------------------------------------*/
+void
+rs232_set_speed(unsigned char speed)
+{
+  if(speed == RS232_19200) {
+    /* Set RS232 to 19200 */
+    UBR01 = 0x80;                         /* 2,457MHz/19200 = 128 -> 0x80 */
+    UBR11 = 0x00;                         /* */
+    UMCTL1 = 0x00;                        /* no modulation  */
+  } else if(speed == RS232_38400) {
+    /* Set RS232 to 38400 */
+    UBR01 = 0x40;                         /* 2,457MHz/38400 = 64 -> 0x40 */
+    UBR11 = 0x00;                         /* */
+    UMCTL1 = 0x00;                        /* no modulation  */
+  } else if(speed == RS232_57600) {
+    UBR01 = 0x2a;                         /* 2,457MHz/57600 = 42.7 -> 0x2A */
+    UBR11 = 0x00;                         /* */
+    UMCTL1 = 0x5b;                        /* */
+  } else if(speed == RS232_115200) {
+    UBR01 = 0x15;                         /* 2,457MHz/115200 = 21.4 -> 0x15 */
+    UBR11 = 0x00;                         /* */
+    UMCTL1 = 0x4a;                        /* */
+  } else {
+    rs232_set_speed(RS232_57600);
+  }
+}
+/*---------------------------------------------------------------------------*/
+void
+rs232_set_input(int (*f)(unsigned char))
+{
+  input_handler = f;
+}
+/*--------------------------------------------------------------------------*/
+int
+putchar(int c)
+{
+  rs232_send(c);
+  return c;
+}
+/*--------------------------------------------------------------------------*/
+
+
+
+
+/*---------------------------------------------------------------------------*/
+void
+esb_sensors_init(void)
+{
+  P5SEL &= ~(1 << 5);
+  P5DIR |= (1 << 5);
+}
+/*---------------------------------------------------------------------------*/
+void
+esb_sensors_on(void)
+{
+  P5OUT &= ~(1 << 5);
+}
+/*---------------------------------------------------------------------------*/
+void
+esb_sensors_off(void)
+{
+  P5OUT |= (1 << 5);
+}
+/*---------------------------------------------------------------------------*/
+
+
+
+
+/*---------------------------------------------------------------------------*/
+/* CPU INIT */
+/*--------------------------------------------------------------------------*/
+
+static void
+msp430_init_dco(void)
+{
+    /* This code taken from the FU Berlin sources and reformatted. */
+#define DELTA    600
+
+  unsigned int compare, oldcapture = 0;
+  unsigned int i;
+
+
+  BCSCTL1 = 0xa4; /* ACLK is devided by 4. RSEL=6 no division for MCLK
+		     and SSMCLK. XT2 is off. */
+
+  BCSCTL2 = 0x00; /* Init FLL to desired frequency using the 32762Hz
+		     crystal DCO frquenzy = 2,4576 MHz  */
+
+  WDTCTL = WDTPW + WDTHOLD;             /* Stop WDT */
+  BCSCTL1 |= DIVA1 + DIVA0;             /* ACLK = LFXT1CLK/8 */
+  for(i = 0xffff; i > 0; i--);          /* Delay for XTAL to settle */
+
+  CCTL2 = CCIS0 + CM0 + CAP;            // Define CCR2, CAP, ACLK
+  TACTL = TASSEL1 + TACLR + MC1;        // SMCLK, continous mode
+
+
+  while(1) {
+
+    while((CCTL2 & CCIFG) != CCIFG);    /* Wait until capture occured! */
+    CCTL2 &= ~CCIFG;                    /* Capture occured, clear flag */
+    compare = CCR2;                     /* Get current captured SMCLK */
+    compare = compare - oldcapture;     /* SMCLK difference */
+    oldcapture = CCR2;                  /* Save current captured SMCLK */
+
+    if(DELTA == compare) {
+      break;                            /* if equal, leave "while(1)" */
+    } else if(DELTA < compare) {        /* DCO is too fast, slow it down */
+      DCOCTL--;
+      if(DCOCTL == 0xFF) {              /* Did DCO role under? */
+	BCSCTL1--;
+      }
+    } else {                            /* -> Select next lower RSEL */
+      DCOCTL++;
+      if(DCOCTL == 0x00) {              /* Did DCO role over? */
+	BCSCTL1++;
+      }
+                                        /* -> Select next higher RSEL  */
+    }
+  }
+
+  CCTL2 = 0;                            /* Stop CCR2 function */
+  TACTL = 0;                            /* Stop Timer_A */
+
+  BCSCTL1 &= ~(DIVA1 + DIVA0);          /* remove /8 divisor from ACLK again */
+}
+/*---------------------------------------------------------------------------*/
+static void
+init_ports(void)
+{
+  /* Turn everything off, device drivers are supposed to enable what is
+   * really needed!
+   */
+
+  /* All configured for digital I/O */
+#ifdef P1SEL
+  P1SEL = 0;
+#endif
+#ifdef P2SEL
+  P2SEL = 0;
+#endif
+#ifdef P3SEL
+  P3SEL = 0;
+#endif
+#ifdef P4SEL
+  P4SEL = 0;
+#endif
+#ifdef P5SEL
+  P5SEL = 0;
+#endif
+#ifdef P6SEL
+  P6SEL = 0;
+#endif
+
+  /* All available inputs */
+#ifdef P1DIR
+  P1DIR = 0;
+  P1OUT = 0;
+#endif
+#ifdef P2DIR
+  P2DIR = 0;
+  P2OUT = 0;
+#endif
+#ifdef P3DIR
+  P3DIR = 0;
+  P3OUT = 0;
+#endif
+#ifdef P4DIR
+  P4DIR = 0;
+  P4OUT = 0;
+#endif
+
+#ifdef P5DIR
+  P5DIR = 0;
+  P5OUT = 0;
+#endif
+
+#ifdef P6DIR
+  P6DIR = 0;
+  P6OUT = 0;
+#endif
+
+  P1IE = 0;
+  P2IE = 0;
+}
+/*---------------------------------------------------------------------------*/
+static void init_ports_toberemoved() {
+    ////////// Port 1 ////
+  P1SEL = 0x00;
+  P1DIR = 0x81;       // Outputs: P10=IRSend, P17=RS232RTS
+                      // Inputs: P11=Light, P12=IRRec, P13=PIR, P14=Vibration,
+                      //         P15=Clockalarm, P16=RS232CTS
+  P1OUT = 0x00;
+
+  ////////// Port 2 ////
+  P2SEL = 0x00;       // No Sels
+  P2DIR = 0x7F;       // Outpus: P20..P23=Leds+Beeper, P24..P26=Poti
+                      // Inputs: P27=Taster
+  P2OUT = 0x77;
+
+  ////////// Port 3 ////
+  P3SEL = 0xE0;       // Sels for P34..P37 to activate UART,
+  P3DIR = 0x5F;       // Inputs: P30..P33=CON4, P35/P37=RXD Transceiver/RS232
+                      // OutPuts: P36/P38=TXD Transceiver/RS232
+  P3OUT = 0xE0;       // Output a Zero on P34(TXD Transceiver) and turn SELECT off when receiving!!!
+
+  ////////// Port 4 ////
+  P4SEL = 0x00;       // CON5 Stecker
+  P4DIR = 0xFF;
+  P4OUT = 0x00;
+
+  ////////// Port 5 ////
+  P5SEL = 0x00;       // P50/P51= Clock SDA/SCL, P52/P53/P54=EEPROM SDA/SCL/WP
+  P5DIR = 0xDA;       // P56/P57=Transceiver CNTRL0/1
+  P5OUT = 0x0F;
+
+  ////////// Port 6 ////
+  P6SEL = 0x00;       // P60=Microphone, P61=PIR digital (same as P13), P62=PIR analog
+  P6DIR = 0x00;       // P63=extern voltage, P64=battery voltage, P65=Receive power
+  P6OUT = 0x00;
+}
+/*--------------------------------------------------------------------------*/
+void
+msp430_setup(void)
+{
+  dint();
+  init_ports();
+  msp430_init_dco();
+  eint();
+
+  init_ports_toberemoved();
+
+  esb_sensors_init();
+  esb_sensors_on();
+
+  rs232_init();
+}
+
+#define asmv(arg) __asm__ __volatile__(arg)
+
+#define STACK_EXTRA 32
+static char *cur_break = (char *)(&__bss_end + 1);
+
+/*
+ * Allocate memory from the heap. Check that we don't collide with the
+ * stack right now (some other routine might later). A watchdog might
+ * be used to check if cur_break and the stack pointer meet during
+ * runtime.
+ */
+void *
+sbrk(int incr)
+{
+  char *stack_pointer;
+
+  asmv("mov r1, %0" : "=r" (stack_pointer));
+  stack_pointer -= STACK_EXTRA;
+  if(incr > (stack_pointer - cur_break))
+    return (void *)-1;		/* ENOMEM */
+
+  void *old_break = cur_break;
+  cur_break += incr;
+  /*
+   * If the stack was never here then [old_break .. cur_break] should
+   * be filled with zeros.
+  */
+  return old_break;
+}
+
+/*
+ * Mask all interrupts that can be masked.
+ */
+int
+splhigh_(void)
+{
+  /* Clear the GIE (General Interrupt Enable) flag. */
+  int sr;
+  asmv("mov r2, %0" : "=r" (sr));
+  asmv("bic %0, r2" : : "i" (GIE));
+  return sr & GIE;		/* Ignore other sr bits. */
+}
+
+/*
+ * Restore previous interrupt mask.
+ */
+void
+splx_(int sr)
+{
+  /* If GIE was set, restore it. */
+  asmv("bis %0, r2" : : "r" (sr));
+}

Added: mspsim/tests/msp430setup.h
===================================================================
--- mspsim/tests/msp430setup.h	                        (rev 0)
+++ mspsim/tests/msp430setup.h	2007-10-25 10:58:19 UTC (rev 7)
@@ -0,0 +1,99 @@
+/*
+ * Copyright (c) 2007, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $Id: msp430setup.h,v 1.1 2007/01/22 15:12:27 nfi Exp $
+ *
+ * -----------------------------------------------------------------
+ *
+ * Author  : Adam Dunkels, Joakim Eriksson, Niclas Finne
+ * Created : 2007-01-22
+ * Updated : $Date: 2007/01/22 15:12:27 $
+ *           $Revision: 1.1 $
+ */
+
+#ifndef __MSP430SETUP_H__
+#define __MSP430SETUP_H__
+
+void msp430_setup(void);
+
+#define RS232_19200 1
+#define RS232_38400 2
+#define RS232_57600 3
+#define RS232_115200 4
+
+/**
+ * \brief      Set an input handler for incoming RS232 data
+ * \param f    A pointer to a byte input handler
+ *
+ *             This function sets the input handler for incoming RS232
+ *             data. The input handler function is called for every
+ *             incoming data byte. The function is called from the
+ *             RS232 interrupt handler, so care must be taken when
+ *             implementing the input handler to avoid race
+ *             conditions.
+ *
+ *             The return value of the input handler affects the sleep
+ *             mode of the CPU: if the input handler returns non-zero
+ *             (true), the CPU is awakened to let other processing
+ *             take place. If the input handler returns zero, the CPU
+ *             is kept sleeping.
+ */
+void rs232_set_input(int (* f)(unsigned char));
+
+/**
+ * \brief      Configure the speed of the RS232 hardware
+ * \param speed The speed
+ *
+ *             This function configures the speed of the RS232
+ *             hardware. The allowed parameters are RS232_19200,
+ *             RS232_38400, RS232_57600, and RS232_115200.
+ */
+void rs232_set_speed(unsigned char speed);
+
+/**
+ * \brief      Print a text string on RS232
+ * \param str  A pointer to the string that is to be printed
+ *
+ *             This function prints a string to RS232. The string must
+ *             be terminated by a null byte. The RS232 module must be
+ *             correctly initalized and configured for this function
+ *             to work.
+ */
+void rs232_print(char *text);
+
+/**
+ * \brief      Print a character on RS232
+ * \param c    The character to be printed
+ *
+ *             This function prints a character to RS232. The RS232
+ *             module must be correctly initalized and configured for
+ *             this function to work.
+ */
+void rs232_send(char c);
+
+#endif /* __MSP430SETUP_H__ */


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[Mspsim-commit] SF.net SVN: mspsim: [6] mspsim

[<jo...@us...>]

Revision: 6
          http://mspsim.svn.sourceforge.net/mspsim/?rev=6&view=rev
Author:   joxe
Date:     2007-10-24 04:25:55 -0700 (Wed, 24 Oct 2007)

Log Message:
-----------
intial add

Added Paths:
-----------
    mspsim/images/
    mspsim/images/esb.jpg
    mspsim/images/sky.jpg

Added: mspsim/images/esb.jpg
===================================================================
(Binary files differ)


Property changes on: mspsim/images/esb.jpg
___________________________________________________________________
Name: svn:mime-type
   + application/octet-stream

Added: mspsim/images/sky.jpg
===================================================================
(Binary files differ)


Property changes on: mspsim/images/sky.jpg
___________________________________________________________________
Name: svn:mime-type
   + application/octet-stream


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[Mspsim-commit] SF.net SVN: mspsim: [5] mspsim/Makefile

[<jo...@us...>]

Revision: 5
          http://mspsim.svn.sourceforge.net/mspsim/?rev=5&view=rev
Author:   joxe
Date:     2007-10-24 04:24:24 -0700 (Wed, 24 Oct 2007)

Log Message:
-----------


Added Paths:
-----------
    mspsim/Makefile

Added: mspsim/Makefile
===================================================================
--- mspsim/Makefile	                        (rev 0)
+++ mspsim/Makefile	2007-10-24 11:24:24 UTC (rev 5)
@@ -0,0 +1,134 @@
+###############################################################
+# $Revision: 1.11 $ $Date: 2007/10/21 19:47:53 $
+#
+# Needed stuff in the PATH:
+#  java, javac (JDK 1.2 or newer)
+#
+# Under MS-DOS/Windows 95/NT
+#  A GNU compatible Make (for example Cygnus GNU-Win 32,
+#			  http://www.cygnus.com/misc/gnu-win32/)
+# Note: might need to be called with "make --win32" under Windows!!!
+###############################################################
+
+###############################################################
+# Settings
+###############################################################
+CC=javac
+JAVACC=javacc
+JAR=jar
+RM=rm -f
+CP=cp
+
+###############################################################
+# System dependent
+###############################################################
+
+ifndef WINDIR
+  ifdef OS
+    ifneq (,$(findstring Windows,$(OS)))
+      WINDIR := Windows
+    endif
+  endif
+endif
+
+ifndef WINDIR
+  # This settings are for UNIX
+  SEPARATOR=:
+  # Add "'" around filenames when removing them because UNIX expands "$"
+  APO='#'  (last apostrophe to avoid incorrect font-lock)
+else
+  # These setting are for MS-DOS/Windows 95/Windows NT
+  SEPARATOR=;
+  APO=
+endif
+
+
+###############################################################
+# Arguments
+###############################################################
+
+CCARGS=-deprecation -classpath .
+
+
+###############################################################
+# SERVER OBJECTS
+###############################################################
+
+IHEXFILE = blinker2.ihex
+
+CPUTEST := tests/cputest.ihex
+CPUTESTMAP := $(CPUTEST:.ihex=.map)
+
+PACKAGES := ${addprefix se/sics/mspsim/,core platform/esb platform/sky util}
+
+SOURCES := ${wildcard *.java $(addsuffix /*.java,$(PACKAGES))}
+
+OBJECTS := $(SOURCES:.java=.class)
+
+
+###############################################################
+# MAKE
+###############################################################
+
+.PHONY: compile $(CPUTEST)
+
+compile:	$(OBJECTS)
+
+all:	compile
+
+help:
+	@echo "Usage: make [all,compile,clean]"
+
+.PHONY: run
+run:	compile
+	java se.sics.util.IHexReader $(IHEXFILE) $(MAPFILE)
+
+runesb:	compile
+	java se.sics.mspsim.platform.esb.ESBNode $(IHEXFILE) $(MAPFILE)
+
+runsky:	compile
+	java se.sics.mspsim.platform.sky.SkyNode $(IHEXFILE) $(MAPFILE)
+
+.PHONY: cputest test
+test:	cputest
+
+cputest:	$(CPUTEST)
+	java se.sics.util.Test $(CPUTEST) $(CPUTESTMAP)
+
+$(CPUTEST):
+	(cd tests && $(MAKE))
+
+test:
+	cd tests && make
+	java se.sics.util.Test $(CPUTEST) $(CPUTESTMAP)
+
+.PHONY: mtest
+mtest:	compile $(CPUTEST)
+	@-$(RM) mini-test_cpu.txt
+	java se.sics.util.Test -debug $(CPUTEST) $(CPUTESTMAP) >mini-test_cpu.txt
+
+
+###############################################################
+# CLASS COMPILATION
+###############################################################
+
+%.class : %.java
+	$(CC) $(CCARGS) $<
+
+
+###############################################################
+# CLEAN  (untrusted, use with great care!!!)
+###############################################################
+
+.PHONY:	clean claen clena
+
+claen:	clean
+
+clena:	clean
+
+clean:
+ifdef WINDIR
+	-$(RM) *.class ${addsuffix /*.class,$(PACKAGES)}
+else
+	-$(RM) $(foreach f,$(wildcard *.class),$(APO)$(f)$(APO)) $(foreach dir,$(PACKAGES),$(dir)/*.class)
+endif


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[Mspsim-commit] SF.net SVN: mspsim: [4] mspsim

[<jo...@us...>]

Revision: 4
          http://mspsim.svn.sourceforge.net/mspsim/?rev=4&view=rev
Author:   joxe
Date:     2007-10-24 03:44:41 -0700 (Wed, 24 Oct 2007)

Log Message:
-----------
initial add of mspsim

Added Paths:
-----------
    mspsim/se/
    mspsim/se/sics/
    mspsim/se/sics/mspsim/
    mspsim/se/sics/mspsim/chip/
    mspsim/se/sics/mspsim/chip/Beeper.java
    mspsim/se/sics/mspsim/chip/CC2420.java
    mspsim/se/sics/mspsim/core/
    mspsim/se/sics/mspsim/core/BasicClockModule.java
    mspsim/se/sics/mspsim/core/CPUMonitor.java
    mspsim/se/sics/mspsim/core/DbgInstruction.java
    mspsim/se/sics/mspsim/core/DisAsm.java
    mspsim/se/sics/mspsim/core/IOPort.java
    mspsim/se/sics/mspsim/core/IOUnit.java
    mspsim/se/sics/mspsim/core/MSP430.java
    mspsim/se/sics/mspsim/core/MSP430Constants.java
    mspsim/se/sics/mspsim/core/MSP430Core.java
    mspsim/se/sics/mspsim/core/MapTable.java
    mspsim/se/sics/mspsim/core/Multiplier.java
    mspsim/se/sics/mspsim/core/PortListener.java
    mspsim/se/sics/mspsim/core/SFR.java
    mspsim/se/sics/mspsim/core/Timer.java
    mspsim/se/sics/mspsim/core/USART.java
    mspsim/se/sics/mspsim/core/USARTListener.java
    mspsim/se/sics/mspsim/platform/
    mspsim/se/sics/mspsim/platform/esb/
    mspsim/se/sics/mspsim/platform/esb/CVS/
    mspsim/se/sics/mspsim/platform/esb/CVS/Entries
    mspsim/se/sics/mspsim/platform/esb/CVS/Repository
    mspsim/se/sics/mspsim/platform/esb/CVS/Root
    mspsim/se/sics/mspsim/platform/esb/ESBGui.java
    mspsim/se/sics/mspsim/platform/esb/ESBNode.java
    mspsim/se/sics/mspsim/platform/sky/
    mspsim/se/sics/mspsim/platform/sky/CVS/
    mspsim/se/sics/mspsim/platform/sky/CVS/Entries
    mspsim/se/sics/mspsim/platform/sky/CVS/Repository
    mspsim/se/sics/mspsim/platform/sky/CVS/Root
    mspsim/se/sics/mspsim/platform/sky/ExtFlash.java
    mspsim/se/sics/mspsim/platform/sky/SkyGui.java
    mspsim/se/sics/mspsim/platform/sky/SkyNode.java
    mspsim/se/sics/mspsim/util/
    mspsim/se/sics/mspsim/util/ControlUI.java
    mspsim/se/sics/mspsim/util/DebugUI.java
    mspsim/se/sics/mspsim/util/DotDiagram.java
    mspsim/se/sics/mspsim/util/ELF.java
    mspsim/se/sics/mspsim/util/ELFProgram.java
    mspsim/se/sics/mspsim/util/ELFSection.java
    mspsim/se/sics/mspsim/util/IHexReader.java
    mspsim/se/sics/mspsim/util/SerialMon.java
    mspsim/se/sics/mspsim/util/StackUI.java
    mspsim/se/sics/mspsim/util/Test.java
    mspsim/se/sics/mspsim/util/Utils.java
    mspsim/se/sics/mspsim/util/WindowUtils.java

Added: mspsim/se/sics/mspsim/chip/Beeper.java
===================================================================
--- mspsim/se/sics/mspsim/chip/Beeper.java	                        (rev 0)
+++ mspsim/se/sics/mspsim/chip/Beeper.java	2007-10-24 10:44:41 UTC (rev 4)
@@ -0,0 +1,148 @@
+/**
+ * Copyright (c) 2007, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of MSPSim.
+ *
+ * $Id: Beeper.java,v 1.3 2007/10/21 21:17:33 nfi Exp $
+ *
+ * -----------------------------------------------------------------
+ *
+ * Beeper
+ *
+ * Author  : Joakim Eriksson
+ * Created : Sun Oct 21 22:00:00 2007
+ * Updated : $Date: 2007/10/21 21:17:33 $
+ *           $Revision: 1.3 $
+ */
+
+package se.sics.mspsim.chip;
+import javax.sound.sampled.*;
+import se.sics.mspsim.core.*;
+
+/**
+ * Beeper for the esb...
+ */
+public class Beeper extends IOUnit {
+
+  private SourceDataLine dataLine;
+  private FloatControl volume;
+
+  public static final int SAMPLE_RATE = 44000;
+
+  public static final int FRQ_1 = 2200;
+
+  public static final int WAVE_LEN = (SAMPLE_RATE / FRQ_1);
+
+  // One second of the sound in buffer
+  byte[] buffer = new byte[WAVE_LEN];
+  byte[] quiet = new byte[WAVE_LEN];
+
+  int beepCtr = 0;
+
+  public Beeper() {
+  	super(null, 0);
+  	AudioFormat af = new AudioFormat(SAMPLE_RATE, 8, 1, true, false);
+  	DataLine.Info dli =
+  		new DataLine.Info(SourceDataLine.class, af, 16384);
+  	try {
+  		dataLine = (SourceDataLine) AudioSystem.getLine(dli);
+  		if (dataLine == null)	{
+  			System.out.println("DataLine: not existing...");
+  		}	else {
+  			dataLine.open(dataLine.getFormat(), 16384);
+  			volume = (FloatControl)	dataLine.getControl(FloatControl.Type.MASTER_GAIN);
+  		}
+  	} catch (Exception e) {
+  		System.out.println("Problem while  getting data line " + e);
+  	}
+    double f1 = 0;
+    for (int i = 0, n = WAVE_LEN; i < n; i++) {
+      f1 = Math.sin(i * 3.141592 * 2 / WAVE_LEN) * 40;
+      f1 += Math.sin(i * 3.141592 * 4 / WAVE_LEN) * 30;
+      buffer[i] = (byte) (f1);
+    }
+
+    if (dataLine != null) {
+      dataLine.start();
+    }
+  }
+
+  public void setVolue(int vol) {
+  	volume.setValue(vol);
+  }
+
+  public void beepOn(boolean beep) {
+    if (beep) {
+      beepCtr = 7;
+    }
+  }
+
+  public long ioTick(long cycles) {
+    // Avoid blocking using timer...
+  	if (dataLine != null) {
+  		if (dataLine.available() > WAVE_LEN * 2) {
+  			if (beepCtr > 0) {
+  				dataLine.write(buffer, 0, WAVE_LEN);
+  				beepCtr--;
+  			} else {
+  				dataLine.write(quiet, 0, WAVE_LEN);
+  			}
+  		}
+  	}
+  	return cycles + 1000;
+  }
+
+
+  public int read(int address, boolean word, long cycler) {
+  	return 0;
+  }
+
+  public void write(int address, int data, boolean word, long cycler) {
+  }
+
+  public String getName() {
+    return "Beeper";
+  }
+
+  // Nothing for interrupts...
+  public void interruptServiced() {
+  }
+
+  public static void main(String[] args) {
+  	Beeper beep = new Beeper();
+  	while (true) {
+  		beep.beepOn(true);
+  		for (int i = 0, n = 1000; i < n; i++) {
+  			beep.ioTick(0);
+  		}
+  		beep.beepOn(false);
+  		for (int i = 0, n = 10000; i < n; i++) {
+  			beep.ioTick(0);
+  		}
+  	}
+  }
+}

Added: mspsim/se/sics/mspsim/chip/CC2420.java
===================================================================
--- mspsim/se/sics/mspsim/chip/CC2420.java	                        (rev 0)
+++ mspsim/se/sics/mspsim/chip/CC2420.java	2007-10-24 10:44:41 UTC (rev 4)
@@ -0,0 +1,345 @@
+/**
+ * Copyright (c) 2007, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of MSPSim.
+ *
+ * $Id: CC2420.java,v 1.4 2007/10/22 18:03:41 joakime Exp $
+ *
+ * -----------------------------------------------------------------
+ *
+ * CC2420
+ *
+ * Author  : Joakim Eriksson
+ * Created : Sun Oct 21 22:00:00 2007
+ * Updated : $Date: 2007/10/22 18:03:41 $
+ *           $Revision: 1.4 $
+ */
+
+package se.sics.mspsim.chip;
+import se.sics.mspsim.core.*;
+import se.sics.mspsim.util.Utils;
+
+public class CC2420 implements USARTListener {
+
+  public static final boolean DEBUG = true;
+
+  public static final int REG_SNOP		= 0x00;
+  public static final int REG_SXOSCON	        = 0x01;
+  public static final int REG_STXCAL		= 0x02;
+  public static final int REG_SRXON		= 0x03;
+  public static final int REG_STXON		= 0x04;
+  public static final int REG_STXONCCA	        = 0x05;
+  public static final int REG_SRFOFF		= 0x06;
+  public static final int REG_SXOSCOFF	        = 0x07;
+  public static final int REG_SFLUSHRX	        = 0x08;
+  public static final int REG_SFLUSHTX	        = 0x09;
+  public static final int REG_SACK		= 0x0A;
+  public static final int REG_SACKPEND	        = 0x0B;
+  public static final int REG_SRXDEC		= 0x0C;
+  public static final int REG_STXENC		= 0x0D;
+  public static final int REG_SAES		= 0x0E;
+  public static final int REG_foo		= 0x0F;
+  public static final int REG_MAIN		= 0x10;
+  public static final int REG_MDMCTRL0	        = 0x11;
+  public static final int REG_MDMCTRL1	        = 0x12;
+  public static final int REG_RSSI		= 0x13;
+  public static final int REG_SYNCWORD	        = 0x14;
+  public static final int REG_TXCTRL		= 0x15;
+  public static final int REG_RXCTRL0	        = 0x16;
+  public static final int REG_RXCTRL1	        = 0x17;
+  public static final int REG_FSCTRL		= 0x18;
+  public static final int REG_SECCTRL0	        = 0x19;
+  public static final int REG_SECCTRL1       	= 0x1A;
+  public static final int REG_BATTMON   	= 0x1B;
+  public static final int REG_IOCFG0		= 0x1C;
+  public static final int REG_IOCFG1		= 0x1D;
+  public static final int REG_MANFIDL   	= 0x1E;
+  public static final int REG_MANFIDH   	= 0x1F;
+  public static final int REG_FSMTC		= 0x20;
+  public static final int REG_MANAND		= 0x21;
+  public static final int REG_MANOR		= 0x22;
+  public static final int REG_AGCCTRL    	= 0x23;
+  public static final int REG_AGCTST0   	= 0x24;
+  public static final int REG_AGCTST1   	= 0x25;
+  public static final int REG_AGCTST2   	= 0x26;
+  public static final int REG_FSTST0		= 0x27;
+  public static final int REG_FSTST1		= 0x28;
+  public static final int REG_FSTST2		= 0x29;
+  public static final int REG_FSTST3		= 0x2A;
+  public static final int REG_RXBPFTST    	= 0x2B;
+  public static final int REG_FSMSTATE   	= 0x2C;
+  public static final int REG_ADCTST		= 0x2D;
+  public static final int REG_DACTST		= 0x2E;
+  public static final int REG_TOPTST		= 0x2F;
+  public static final int REG_RESERVED   	= 0x30;
+  /* 0x31 - 0x3D not used */
+  public static final int REG_TXFIFO		= 0x3E;
+  public static final int REG_RXFIFO		= 0x3F;
+
+  public static final int ST_XOSC16M_STABLE = 1 << 6;
+  public static final int ST_TX_UNDERFLOW   = 1 << 5;
+  public static final int ST_ENC_BUSY	    = 1 << 4;
+  public static final int ST_TX_ACTIVE	= 1 << 3;
+  public static final int ST_LOCK	= 1 << 2;
+  public static final int ST_RSSI_VALID	= 1 << 1;
+
+  // RAM Addresses
+  public static final int RAM_TXFIFO	= 0x000;
+  public static final int RAM_RXFIFO	= 0x080;
+  public static final int RAM_KEY0	= 0x100;
+  public static final int RAM_RXNONCE	= 0x110;
+  public static final int RAM_SABUF	= 0x120;
+  public static final int RAM_KEY1	= 0x130;
+  public static final int RAM_TXNONCE	= 0x140;
+  public static final int RAM_CBCSTATE	= 0x150;
+  public static final int RAM_IEEEADDR	= 0x160;
+  public static final int RAM_PANID	= 0x168;
+  public static final int RAM_SHORTADDR	= 0x16A;
+
+  // when reading registrers this flag is set!
+  public static final int FLAG_READ = 0x40;
+
+  public static final int FLAG_RAM = 0x80;
+  // When accessing RAM the second byte of the address comtains
+  // a flag indicating read/write
+  public static final int FLAG_RAM_READ = 0x20;
+
+
+  public static final int WAITING = 0;
+  public static final int WRITE_REGISTER = 1;
+  public static final int READ_REGISTER = 2;
+  public static final int RAM_ACCESS = 3;
+
+  public static final int READ_RXFIFO = 4;
+  public static final int WRITE_TXFIFO = 5;
+
+  private int state = WAITING;
+  private int pos;
+  private int address;
+  private boolean ramRead = false;
+
+  private int status = ST_XOSC16M_STABLE;
+
+  private int[] registers = new int[64];
+  // More than needed...
+  private int[] memory = new int[512];
+
+  private boolean chipSelect;
+
+  private IOPort ccaPort = null;
+  private int ccaPin;
+
+  private IOPort fifopPort = null;
+  private int fifopPin;
+
+  private IOPort fifoPort = null;
+  private int fifoPin;
+
+  private boolean rxPacket;
+  private int rxCursor;
+  private int rxLen;
+
+  public CC2420() {
+    registers[REG_SNOP] = 0;
+  }
+
+  public void dataReceived(USART source, int data) {
+    if (chipSelect) {
+      System.out.println("CC2420 byte received: " + Utils.hex8(data) +
+			 '\'' + (char) data + '\'' +
+			 " CS: " + chipSelect + " state: " + state);
+      switch(state) {
+      case WAITING:
+	state = WRITE_REGISTER;
+	if ((data & FLAG_READ) != 0) {
+	  state = READ_REGISTER;
+	}
+	if ((data & FLAG_RAM) != 0) {
+	  state = RAM_ACCESS;
+	  address = data & 0x7f;
+	} else {
+	  // The register address
+	  address = data & 0x3f;
+
+	  if (address == REG_RXFIFO) {
+	    // check read/write???
+	    System.out.println("CC2420: Reading RXFIFO!!!");
+	    state = READ_RXFIFO;
+	  } else if (address == REG_TXFIFO) {
+	    state = WRITE_TXFIFO;
+	  }
+	}
+	if (data < 0x0f) {
+	  strobe(data);
+	}
+	pos = 0;
+	// Assuming that the status always is sent back???
+	source.byteReceived(status);
+	break;
+      case WRITE_REGISTER:
+      	if (pos == 0) {
+      		source.byteReceived(registers[address] >> 8);
+      		// set the high bits
+      		registers[address] = registers[address] & 0xff | (data << 8);
+      	} else {
+      		source.byteReceived(registers[address] & 0xff);
+      		// set the low bits
+      		registers[address] = registers[address] & 0xff00 | data;
+      		System.out.println("CC2420: wrote to " + Utils.hex8(address) + " = "
+      				+ registers[address]);
+      	}
+	break;
+      case READ_REGISTER:
+      	if (pos == 0) {
+      		source.byteReceived(registers[address] >> 8);
+      	} else {
+      		source.byteReceived(registers[address] & 0xff);
+      		System.out.println("CC2420: read from " + Utils.hex8(address) + " = "
+      				+ registers[address]);
+      	}
+      	break;
+      case READ_RXFIFO:
+      	System.out.println("CC2420: RXFIFO READ => " +
+      			memory[RAM_RXFIFO + rxCursor]);
+      	source.byteReceived(memory[RAM_RXFIFO + rxCursor++]);
+      	// What if wrap cursor???
+      	if (rxCursor >= 128) rxCursor = 0;
+      	// When is this set to "false" - when is interrupt de-triggered?
+      	if (rxPacket) {
+      		rxPacket = false;
+      		updateFifopPin();
+      	}
+      	break;
+      case RAM_ACCESS:
+      	if (pos == 0) {
+      		address = address | (data << 1) & 0x180;
+      		ramRead = (data & 0x20) != 0;
+      		System.out.println("CC2420: Address: " + Utils.hex16(address) +
+      				" read: " + ramRead);
+      		pos++;
+      	} else {
+      		if (!ramRead) {
+      			memory[address++] = data;
+      			if (address == RAM_PANID + 2) {
+      				System.out.println("CC2420: Pan ID set to: 0x" +
+      						Utils.hex8(memory[RAM_PANID]) +
+      						Utils.hex8(memory[RAM_PANID + 1]));
+      			}
+      		}
+      	}
+      	break;
+      }
+    }
+  }
+
+  // Needs to get information about when it is possible to write
+  // next data...
+
+  private void strobe(int data) {
+    // Resets, on/off of different things...
+    System.out.println("CC2420: Strobe on: " + Utils.hex8(data));
+
+    switch (data) {
+    case REG_SRXON:
+      System.out.println("CC2420: Strobe RX-ON!!!");
+      break;
+    case REG_SFLUSHRX:
+      flushRX();
+      break;
+    }
+  }
+
+
+  public void setChipSelect(boolean select) {
+    chipSelect = select;
+    if (!chipSelect)
+      state = WAITING;
+    System.out.println("CC2420: chipSelect: " + chipSelect);
+  }
+
+  public void setCCAPort(IOPort port, int pin) {
+    ccaPort = port;
+    ccaPin = pin;
+  }
+
+  public void setFIFOPPort(IOPort port, int pin) {
+    fifopPort = port;
+    fifopPin = pin;
+  }
+
+  public void setFIFOPort(IOPort port, int pin) {
+    fifoPort = port;
+    fifoPin = pin;
+  }
+
+
+  // -------------------------------------------------------------------
+  // Methods for accessing and writing to registers, etc from outside
+  // -------------------------------------------------------------------
+
+  public int getRegister(int register) {
+    return registers[register];
+  }
+
+  public void setRegister(int register, int data) {
+    registers[register] = data;
+  }
+
+  public void setIncomingPacket(int[] packet) {
+  	int adr = RAM_RXFIFO;
+  	memory[adr++] = packet.length + 2;
+    for (int i = 0, n = packet.length; i < n; i++) {
+      memory[adr++] = packet[i] & 0xff;
+    }
+    // Should take a RSSI value as input or use a set-RSSI value...
+    memory[adr++] = (202) & 0xff;
+    // Set CRC ok and add a correlation 
+    memory[adr++] = (37) | 0x80;
+    rxPacket = true;
+    rxCursor = 0;  
+    rxLen = adr;
+    updateFifopPin();
+  }
+
+  private void flushRX() {
+    if (DEBUG) System.out.println("Flushing RX! was: " + rxPacket + " len = " +
+				  rxLen);
+    rxPacket = false;
+    rxCursor = 0;
+    rxLen = 0;
+    updateFifopPin();
+  }
+
+  private void updateFifopPin() {
+    fifopPort.setPinState(fifopPin, rxPacket ? 1 : 0);
+  }
+
+  public void setCCA(boolean cca) {
+    ccaPort.setPinState(ccaPin, cca ? 1 : 0);
+  }
+
+} // CC2420

Added: mspsim/se/sics/mspsim/core/BasicClockModule.java
===================================================================
--- mspsim/se/sics/mspsim/core/BasicClockModule.java	                        (rev 0)
+++ mspsim/se/sics/mspsim/core/BasicClockModule.java	2007-10-24 10:44:41 UTC (rev 4)
@@ -0,0 +1,165 @@
+/**
+ * Copyright (c) 2007, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of MSPSim.
+ *
+ * $Id: BasicClockModule.java,v 1.3 2007/10/21 21:17:34 nfi Exp $
+ *
+ * -----------------------------------------------------------------
+ *
+ * BasicClockModule
+ *
+ * Author  : Joakim Eriksson
+ * Created : Sun Oct 21 22:00:00 2007
+ * Updated : $Date: 2007/10/21 21:17:34 $
+ *           $Revision: 1.3 $
+ */
+
+package se.sics.mspsim.core;
+import se.sics.mspsim.util.Utils;
+
+public class BasicClockModule extends IOUnit {
+
+  public static final int DCOCTL = 0x56;
+  public static final int BCSCTL1 = 0x57;
+  public static final int BCSCTL2 = 0x58;
+
+  public static final int ACLK_FRQ = 32768;
+  // DCO_FRQ what default frq is the DCO running at???
+  public static final int DCO_FRQ = 2500000;
+  // What frequency steps to take for the DCO?
+  // We have 8 bits + 3 => 11 bits => 2048 combinations...
+  // => What is lowest frq??? (zero)
+  // Max speed is 8Mhz (CPU limits it) - is max DCO 8Mhz?
+  // Based on the scatterweb code it looks like less than
+  // 5Mhz is more correct...
+  public static final int MAX_DCO_FRQ = 4915200;
+  public static final int DCO_FACTOR = MAX_DCO_FRQ / 2048;
+
+
+  private MSP430Core core;
+
+  private int dcoFrequency;
+  private int dcoModulator;
+  private int resistorSel;
+  // These will give =>
+  private int calcDCOFrq;
+  private int divAclk = 1;
+  private int lfxt1Mode;
+  private int xt2Off;
+  private int mclkSel;
+  private int divMclk = 1;
+  private int smclSel;
+  private int divSMclk = 1;
+  private int dcoResitorSel;
+
+  /**
+   * Creates a new <code>BasicClockModule</code> instance.
+   *
+   */
+  public BasicClockModule(MSP430Core core, int[] memory, int offset) {
+    super(memory, offset);
+    this.core = core;
+    init();
+  }
+
+  public void init() {
+    // What should be initial values?
+    memory[DCOCTL] = 0;
+  }
+
+  // Should return the cycle it wants the next tick...
+  public long ioTick(long cycles) {
+    return cycles + 4711;
+  }
+
+  // do nothing?
+  public int read(int address, boolean word, long cycles) {
+    int val = memory[address];
+    if (word) {
+      val |= memory[(address + 1) & 0xffff] << 8;
+    }
+    return val;
+  }
+
+  public void write(int address, int data, boolean word, long cycles) {
+    // Currently ignores the word flag...
+    System.out.println("Write to BasicClockModule: " +
+		       Utils.hex16(address) + " => " + Utils.hex16(data));
+
+    memory[address] = data & 0xff;
+    if (word) memory[address + 1] = (data >> 8) & 0xff;
+
+
+    switch (address) {
+    case DCOCTL:
+      dcoFrequency = (data >> 5) & 0x7;
+      dcoModulator = data & 0x1f;
+      System.out.println("Write: BCM DCOCTL0: DCO Frq:" + dcoFrequency +
+			 "  dcoMod:" + dcoModulator);
+      break;
+    case BCSCTL1:
+      resistorSel = data & 0x7;
+      divAclk = 1 << ((data >> 4) & 3);
+      lfxt1Mode = (data >> 6) & 1;
+      xt2Off = (data >> 7) & 1;
+      System.out.println("Write: BCM BCSCTL1: RSel:" + resistorSel +
+			 " DivACLK:" + divAclk + " ACLKFrq: " +
+			 ACLK_FRQ / divAclk);
+      core.setACLKFrq(ACLK_FRQ / divAclk);
+      break;
+    case BCSCTL2:
+      mclkSel = (data >> 6) & 3;
+      divMclk = 1 << ((data >> 4) & 3);
+      smclSel = (data >> 3) & 1;
+      divSMclk = 1 << ((data >> 2) & 3);
+      dcoResitorSel = data & 1;
+      System.out.println("Write: BCM BCSCTL2: SMCLKDIV: " +
+			 divSMclk + " SMCLK_SEL: "
+			 + smclSel + " MCLKSel: " + mclkSel + " divMclk: " +
+			 divMclk + " DCOResitorSel: " + dcoResitorSel);
+      core.setDCOFrq(calcDCOFrq, calcDCOFrq / divSMclk);
+      break;
+    }
+
+
+    int newcalcDCOFrq = ((dcoFrequency << 5) + dcoModulator +
+			 (resistorSel << 8)) * DCO_FACTOR;
+    if (newcalcDCOFrq != calcDCOFrq) {
+      calcDCOFrq = newcalcDCOFrq;
+      System.out.println("BCM  DCO_Speed: " + calcDCOFrq);
+      core.setDCOFrq(calcDCOFrq, calcDCOFrq / divSMclk);
+    }
+  }
+
+  public String getName() {
+    return "BasicClockModule";
+  }
+
+  public void interruptServiced() {
+  }
+}

Added: mspsim/se/sics/mspsim/core/CPUMonitor.java
===================================================================
--- mspsim/se/sics/mspsim/core/CPUMonitor.java	                        (rev 0)
+++ mspsim/se/sics/mspsim/core/CPUMonitor.java	2007-10-24 10:44:41 UTC (rev 4)
@@ -0,0 +1,54 @@
+/**
+ * Copyright (c) 2007, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of MSPSim.
+ *
+ * $Id: CPUMonitor.java,v 1.3 2007/10/21 21:17:34 nfi Exp $
+ *
+ * -----------------------------------------------------------------
+ *
+ * CPUMonitor
+ *
+ * Author  : Joakim Eriksson
+ * Created : Sun Oct 21 22:00:00 2007
+ * Updated : $Date: 2007/10/21 21:17:34 $
+ *           $Revision: 1.3 $
+ */
+
+package se.sics.mspsim.core;
+
+public interface CPUMonitor {
+
+  public static final int MEMORY_READ = 1;
+  public static final int MEMORY_WRITE = 2;
+  public static final int REGISTER_READ = 3;
+  public static final int REGISTER_WRITE = 4;
+  public static final int BREAK = 5;
+
+  public void cpuAction(int type, int adr, int data);
+
+}

Added: mspsim/se/sics/mspsim/core/DbgInstruction.java
===================================================================
--- mspsim/se/sics/mspsim/core/DbgInstruction.java	                        (rev 0)
+++ mspsim/se/sics/mspsim/core/DbgInstruction.java	2007-10-24 10:44:41 UTC (rev 4)
@@ -0,0 +1,106 @@
+/**
+ * Copyright (c) 2007, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of MSPSim.
+ *
+ * $Id: DbgInstruction.java,v 1.3 2007/10/21 21:17:34 nfi Exp $
+ *
+ * -----------------------------------------------------------------
+ *
+ * DbgInstruction
+ *
+ * Author  : Joakim Eriksson
+ * Created : Sun Oct 21 22:00:00 2007
+ * Updated : $Date: 2007/10/21 21:17:34 $
+ *           $Revision: 1.3 $
+ */
+
+package se.sics.mspsim.core;
+
+public class DbgInstruction {
+
+  private String asmLine;
+  private String regs;
+  private String function;
+  private int instruction;
+  private int size;
+  private int pos;
+
+  public DbgInstruction() {
+  }
+
+  public void setPos(int p) {
+    pos = p;
+  }
+
+  public int getPos() {
+    return pos;
+  }
+
+  public void setASMLine(String line) {
+    asmLine = line;
+  }
+
+  public void setRegs(String regs) {
+    this.regs = regs;
+  }
+
+  public void setInstruction(int instruction, int size) {
+    this.instruction = instruction;
+    this.size = size;
+  }
+
+  public int getSize() {
+    return size;
+  }
+
+  public int getInstruction() {
+    return instruction;
+  }
+
+  public String getASMLine(boolean showregs) {
+    if (showregs) return getASMLine();
+    return asmLine;
+  }
+
+  public String getASMLine() {
+    return asmLine + "\t" + regs;
+  }
+
+  public void setFunction(String fkn) {
+    function = fkn;
+  }
+
+  public String getFunction() {
+    return function;
+  }
+
+  public String toString() {
+    return getASMLine();
+  }
+
+}

Added: mspsim/se/sics/mspsim/core/DisAsm.java
===================================================================
--- mspsim/se/sics/mspsim/core/DisAsm.java	                        (rev 0)
+++ mspsim/se/sics/mspsim/core/DisAsm.java	2007-10-24 10:44:41 UTC (rev 4)
@@ -0,0 +1,457 @@
+/**
+ * Copyright (c) 2007, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of MSPSim.
+ *
+ * $Id: DisAsm.java,v 1.3 2007/10/21 21:17:34 nfi Exp $
+ *
+ * -----------------------------------------------------------------
+ *
+ * DisAsm
+ *
+ * Author  : Joakim Eriksson
+ * Created : Sun Oct 21 22:00:00 2007
+ * Updated : $Date: 2007/10/21 21:17:34 $
+ *           $Revision: 1.3 $
+ */
+
+package se.sics.mspsim.core;
+import java.io.BufferedReader;
+import java.io.InputStreamReader;
+
+import se.sics.mspsim.util.Utils;
+
+public class DisAsm implements MSP430Constants {
+
+  private boolean step = true; //false;
+
+  private MapTable map;
+
+  // Idiots solution to single stepping...
+  private BufferedReader input =
+    new BufferedReader(new InputStreamReader(System.in));
+
+  public void setMap(MapTable m) {
+    map = m;
+  }
+
+  public MapTable getMap() {
+    return map;
+  }
+
+  public DbgInstruction disassemble(int pc, int[] memory, int[] reg) {
+    return disassemble(pc, memory, reg, 0);
+  }
+
+  public DbgInstruction disassemble(int pc, int[] memory, int[] reg,
+				 int interrupt) {
+    DbgInstruction dbg = disassemble(pc, memory, reg, new DbgInstruction(),
+				     interrupt);
+    String fkn;
+    if ((fkn = dbg.getFunction()) != null) {
+      System.out.println("//// " + fkn);
+    }
+    System.out.println(dbg.getASMLine());
+    return dbg;
+  }
+
+  public DbgInstruction getDbgInstruction(int pc, MSP430 cpu) {
+    return disassemble(pc, cpu.memory, cpu.reg, new DbgInstruction(),
+		       cpu.servicedInterrupt);
+  }
+
+  public DbgInstruction disassemble(int pc, int[] memory, int[] reg,
+					   DbgInstruction dbg, int interrupt) {
+    int startPC = pc;
+    int size = 0;
+    int instruction = memory[pc] + (memory[pc + 1] << 8);
+    int op = instruction >> 12;
+    boolean word = (instruction & 0x40) == 0;
+
+    String output = "    ";
+    if (interrupt > 0) {
+      output = "I:" + Integer.toString(interrupt) + ' ';
+    }
+
+    String regs = "";
+
+
+    if (pc < 0x0010) {
+      output += "000" + Integer.toString(pc, 16);
+    } else if (pc < 0x0100) {
+      output += "00" + Integer.toString(pc, 16);
+    } else if (pc < 0x1000) {
+      output += "0" + Integer.toString(pc, 16);
+    } else {
+      output += Integer.toString(pc, 16);
+    }
+
+
+    output += ":\t";
+
+    pc += 2;
+    size += 2;
+
+    switch (op) {
+    case 1: // Single operand instructions
+    {
+      // Register
+      int register = instruction & 0xf;
+      // Adress mode of destination...
+      int ad = (instruction >> 4) & 3;
+      // Pick up the destination address based on ad more and regs...
+      int dstAddress = 0;
+      String adr = "";
+      String opstr = "";
+      switch(ad) {
+	// Operand in register!
+      case AM_REG:
+	adr = "R" + register;
+	break;
+      case AM_INDEX:
+	dstAddress = memory[pc] + (memory[pc + 1] << 8);
+	adr = "R" + register + "(" + dstAddress + ")";
+	dstAddress = (register == CG1 ? 0 : reg[register]) + dstAddress;
+	pc += 2;
+	size += 2;
+	break;
+	// Indirect register
+      case AM_IND_REG:
+	adr = "@(R" + register + ")";
+	dstAddress = reg[register];
+	break;
+      case AM_IND_AUTOINC:
+	if (register == 0) {
+	  // Can this be PC and be incremented only one byte?
+	  adr = "#" + Utils.hex16(memory[pc] + (memory[pc + 1] << 8));
+	  size += 2;
+	} else {
+	  adr = "@(R" + register + "+)";
+	  dstAddress = reg[register];
+	}
+	break;
+      }
+
+      switch(instruction & 0xff80) {
+      case RRC:
+	opstr = "RRC" + (word ? ".W" : ".B");
+	break;
+      case SWPB:
+	opstr = "SWPB" + (word ? ".W" : ".B");
+	break;
+      case RRA:
+	opstr = "RRA" + (word ? ".W" : ".B");
+	break;
+      case SXT:
+	opstr = "RRA" + (word ? ".W" : ".B");
+	break;
+      case PUSH:
+	opstr = "PUSH" + (word ? ".W" : ".B");
+	break;
+      case CALL:
+	opstr = "CALL";
+	break;
+      case RETI:
+	opstr = "RETI";
+	break;
+      default:
+	System.out.println("Not implemented instruction: " + instruction);
+      }
+      output += dumpMem(startPC, size, memory);
+      output += opstr + " " + adr;
+      regs = "R" + register + "=" + Utils.hex16(reg[register]);
+      regs += " SP=" + Utils.hex16(reg[SP]);
+    }
+    break;
+    // Jump instructions
+    case 2:
+    case 3:
+      // 10 bits for address for these => 0x00fc => remove 2 bits
+      int jmpOffset = instruction & 0x3ff;
+      jmpOffset = (jmpOffset & 0x200) == 0 ?
+	2 * jmpOffset : -(2 * (0x200 - (jmpOffset & 0x1ff)));
+      boolean jump = false;
+      String opstr = "";
+      switch(instruction & 0xfc00) {
+      case JNE:
+	opstr = "JNE";
+	break;
+      case JEQ:
+	opstr = "JEQ";
+	break;
+      case JNC:
+	opstr = "JNC";
+	break;
+      case JC:
+	opstr = "JC";
+	break;
+      case JN:
+	opstr = "JN";
+	break;
+      case JGE:
+	opstr = "JGE";
+	break;
+      case JL:
+	opstr = "JL";
+	break;
+      case JMP:
+	opstr = "JMP";
+	break;
+      default:
+	System.out.println("Not implemented instruction: " +
+			   Utils.binary16(instruction));
+      }
+      output += dumpMem(startPC, size, memory);
+      output += opstr + " " + Integer.toString(jmpOffset, 16);
+      regs = "\tSR=" + dumpSR(reg[SR]);
+      break;
+    default:
+      // ---------------------------------------------------------------
+      // Double operand instructions!
+      // ---------------------------------------------------------------
+      int dstRegister = (instruction & 0xf);
+      int srcRegister = (instruction >> 8) & 0xf;
+      int as = (instruction >> 4) & 3;
+
+      // AD: 0 => register direct, 1 => register index, e.g. X(Rn)
+      boolean dstRegMode = ((instruction >> 7) & 1) == 0;
+      int dstAddress = 0;
+      int srcAddress = 0;
+      int src = 0;
+      int dst = 0;
+      boolean write = false;
+      boolean updateStatus = true;
+      String srcadr = "";
+      String dstadr = "";
+      switch(as) {
+	// Operand in register!
+      case AM_REG:
+	if (srcRegister == CG2) {
+	  srcadr = "#0";
+	} else if (srcRegister == CG1) {
+	  srcadr = "#0";
+	} else {
+	  srcadr = getRegName(srcRegister);
+	}
+	break;
+      case AM_INDEX:
+	// Indexed if reg != PC & CG1/CG2 - will PC be incremented?
+	if (srcRegister == CG1) {
+	  srcAddress = memory[pc] + (memory[pc + 1] << 8);
+	  srcadr = "&" + Utils.hex16(srcAddress);
+	  size += 2;
+	} else if (srcRegister == CG2) {
+	  srcadr = "#1";
+	} else {
+	  srcAddress = reg[srcRegister] + memory[pc] + (memory[pc + 1] << 8);
+	  srcadr = "(R" + srcRegister + ")";
+	}
+	break;
+	// Indirect register
+      case AM_IND_REG:
+	if (srcRegister == CG2) {
+	  srcadr = "#2";
+	} else if (srcRegister == CG1) {
+	  srcadr = "#4";
+	} else {
+	  srcadr = "@" + getRegName(srcRegister);
+	}
+	break;
+      case AM_IND_AUTOINC:
+	if (srcRegister == CG2) {
+	  srcadr = "#$ffff";
+	} else if (srcRegister == CG1) {
+	  srcadr = "#8";
+	} else if (srcRegister == PC) {
+	  srcadr = "#" + Utils.hex16(memory[pc] + (memory[pc + 1] << 8));
+	  pc += 2;
+	  size += 2;
+	} else if (srcRegister == CG2) {
+	  srcadr = "#ffff";
+	} else {
+	  srcadr = "@" + getRegName(srcRegister) + "+";
+	  srcAddress = reg[srcRegister];
+	}
+	break;
+      }
+
+      if (dstRegMode) {
+	dstadr = getRegName(dstRegister);
+      } else {
+	dstAddress = memory[pc] + (memory[pc + 1] << 8);
+	if (dstRegister == 2) {
+	  dstadr = "&" + Utils.hex16(dstAddress);
+	} else {
+	  dstadr = Utils.hex16(dstAddress) + "(R" + dstRegister + ")";
+	}
+	pc += 2;
+	size += 2;
+      }
+
+      // If byte mode the source will not contain the full word...
+      if (!word) {
+	src = src & 0xff;
+	dst = dst & 0xff;
+      }
+      opstr = "";
+      switch (op) {
+      case MOV: // MOV
+	if (instruction == 0x3041) {
+	  opstr = "RET /emulated: MOV.W ";
+	} else {
+	  opstr = "MOV" + (word ? ".W" : ".B");
+	}
+	break;
+      case ADD: // ADD
+	opstr = "ADD" + (word ? ".W" : ".B");
+	break;
+      case ADDC: // ADDC
+	opstr = "ADDC" + (word ? ".W" : ".B");
+	break;
+      case SUBC: // SUBC
+	opstr = "SUBC" + (word ? ".W" : ".B");
+	break;
+      case SUB: // SUB
+	opstr = "SUB" + (word ? ".W" : ".B");
+	break;
+      case CMP: // CMP
+	opstr = "CMP" + (word ? ".W" : ".B");
+	break;
+      case DADD: // DADD
+	opstr = "DADD" + (word ? ".W" : ".B");
+	break;
+      case BIT: // BIT
+	opstr = "BIT" + (word ? ".W" : ".B");
+	break;
+      case BIC: // BIC
+	opstr = "BIC" + (word ? ".W" : ".B");
+	break;
+      case BIS: // BIS
+	opstr = "BIS" + (word ? ".W" : ".B");
+	break;
+      case XOR: // XOR
+	opstr = "XOR" + (word ? ".W" : ".B");
+	break;
+      case AND: // AND
+	opstr = "AND" + (word ? ".W" : ".B");
+	break;
+      default:
+	System.out.println(output + " DoubleOperand not implemented: " +
+			   op + " instruction: " +
+			   Utils.binary16(instruction) + " = " +
+			   Utils.hex16(instruction));
+      }
+
+
+      output += dumpMem(startPC, size, memory);
+      output += opstr + " " + srcadr + ", " + dstadr;
+
+      regs = "R" + dstRegister + "=" + Utils.hex16(reg[dstRegister]) +
+	" R" + srcRegister + "=" + Utils.hex16(reg[srcRegister]);
+      regs += " SR=" + dumpSR(reg[SR]);
+      regs += " SP=" + Utils.hex16(reg[SP]);
+      regs += "; as = " + as;
+      srcAddress &= 0xffff;
+      if (srcAddress != -1) {
+	srcAddress &= 0xffff;
+	regs += " sMem:" + Utils.hex16(memory[srcAddress] +
+				       (memory[(srcAddress + 1) % 0xffff]
+					<< 8));
+      }
+    }
+
+    dbg.setASMLine(output);
+    dbg.setRegs(regs);
+    dbg.setInstruction(instruction, size);
+    if (map != null) {
+      dbg.setFunction(map.getFunction(startPC));
+    }
+
+    if (!step) {
+      String line = "";
+      try {line = input.readLine();}catch(Exception e){}
+      if (line != null && line.length() > 0 && line.charAt(0) == 'r') {
+	System.out.println("Registers:");
+	for (int i = 0, n = 16; i < n; i++) {
+	  System.out.print("R" + i + "=" + Utils.hex16(reg[i]) + "  ");
+	  if (i % 7 == 0 && i != 0) System.out.println();
+	}
+	System.out.println();
+      }
+    }
+    return dbg;
+  }
+
+  private String getRegName(int index) {
+    if (index == 0) return "PC";
+    if (index == 1) return "SP";
+    if (index == 2) return "SR";
+    return "R" + index;
+  }
+
+  public static String getSingleOPStr(int instruction) {
+    boolean word = (instruction & 0x40) == 0;
+    switch(instruction & 0xff80) {
+    case RRC:
+      return "RRC" + (word ? ".W" : ".B");
+    case SWPB:
+      return "SWPB" + (word ? ".W" : ".B");
+    case RRA:
+      return "RRA" + (word ? ".W" : ".B");
+    case SXT:
+      return "RRA" + (word ? ".W" : ".B");
+    case PUSH:
+      return "PUSH" + (word ? ".W" : ".B");
+    case CALL:
+      return "CALL";
+    case RETI:
+      return "RETI";
+    default:
+      return "-";
+    }
+  }
+
+  private static String dumpSR(int sr) {
+    return "" +
+      (((sr & OVERFLOW) != 0) ? 'V' : '-') +
+      (((sr & NEGATIVE) != 0) ? 'N' : '-') +
+      (((sr & ZERO) != 0) ? 'Z' : '-') +
+      (((sr & CARRY) != 0) ? 'C' : '-');
+  }
+
+  private static String dumpMem(int pc, int size, int[] memory) {
+    String output = "";
+    for (int i = 0, n = 4; i < n; i++) {
+      if (size > i) {
+	output += Utils.hex8(memory[pc + i]) + " ";
+      } else {
+	output += "   ";
+      }
+    }
+    return output;
+  }
+}

Added: mspsim/se/sics/mspsim/core/IOPort.java
===================================================================
--- mspsim/se/sics/mspsim/core/IOPort.java	                        (rev 0)
+++ mspsim/se/sics/mspsim/core/IOPort.java	2007-10-24 10:44:41 UTC (rev 4)
@@ -0,0 +1,199 @@
+/**
+ * Copyright (c) 2007, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of MSPSim.
+ *
+ * $Id: IOPort.java,v 1.3 2007/10/21 21:17:34 nfi Exp $
+ *
+ * -----------------------------------------------------------------
+ *
+ * IOPort
+ *
+ * Author  : Joakim Eriksson
+ * Created : Sun Oct 21 22:00:00 2007
+ * Updated : $Date: 2007/10/21 21:17:34 $
+ *           $Revision: 1.3 $
+ */
+
+package  se.sics.mspsim.core;
+import se.sics.mspsim.util.Utils;
+
+public class IOPort extends IOUnit {
+
+  public static final int PIN_LOW = 0;
+  public static final int PIN_HI = 1;
+
+  public static final boolean DEBUG = false;
+
+  public static final String[] iNames = {
+    "P_IN","P_OUT", "P_DIR", "P_IFG", "P_IES", "P_IE", "P_SEL" };
+  public static final String[] names = {
+    "P_IN", "P_OUT", "P_DIR", "P_SEL" };
+
+  private String name;
+  private int interrupt;
+  private int interruptFlag;
+  private MSP430Core cpu;
+
+  // External pin state!
+  private int pinState[] = new int[8];
+
+  public static final int IN = 0;
+  public static final int OUT = 1;
+  public static final int DIR = 2;
+  public static final int SEL = 3;
+  public static final int IFG = 3;
+  public static final int IES = 4;
+  public static final int IE = 5;
+  public static final int ISEL = 6;
+
+  // One listener per port maximum (now at leat)
+  private PortListener listener;
+
+  /**
+   * Creates a new <code>IOPort</code> instance.
+   *
+   */
+  public IOPort(MSP430Core cpu, String portName,
+		int interrupt, int[] memory, int offset) {
+    super(memory, offset);
+    name = portName;
+    this.interrupt = interrupt;
+    this.cpu = cpu;
+  }
+
+  public void setPortListener(PortListener listener) {
+    this.listener = listener;
+  }
+
+  public int read(int address, boolean word, long cycles) {
+    if (DEBUG) {
+      System.out.println("Notify read: " + address);
+    }
+
+    int val = memory[address];
+    if (word) {
+      val |= memory[(address + 1) & 0xffff] << 8;
+    }
+    return val;
+  }
+
+  public void write(int address, int data, boolean word, long cycles) {
+    memory[address] = data & 0xff;
+    if (word) memory[address + 1] = (data >> 8) & 0xff;
+
+    // This does not handle word writes yet...
+    int iAddress = address - offset;
+
+    if (DEBUG) {
+      try {
+	System.out.println("Writing to " + getName() + ":" +
+			   (interrupt > 0? iNames[iAddress] : names[iAddress]) +
+			   "  " + Utils.hex8(address) +
+			   " => " + Utils.hex8(data) + "=#" +
+			   Utils.binary8(data) + " word: " + word);
+      } catch (Exception e) {
+	e.printStackTrace();
+      }
+    }
+
+    switch (iAddress) {
+    case IN:
+      break;
+    case OUT:
+      if (listener != null) {
+	listener.portWrite(this, data);
+      }
+      break;
+    case DIR:
+      break;
+      // SEL & IFG is the same but behaviour differs between p1,p2 and rest...
+    case SEL:
+      //   case IFG:
+      if (interrupt > 0) {
+	// IFG - writing a zero => clear the flag!
+	System.out.println(getName() + " Clearing IFlag: " + data);
+	interruptFlag &= data;
+	memory[offset + IFG] = interruptFlag;
+	cpu.flagInterrupt(interrupt, this, interruptFlag > 0);
+      } else {
+	// Samel as ISEL!!!
+      }
+      break;
+    case IES:
+      break;
+    case IE:
+      break;
+    case ISEL:
+    }
+  }
+
+  public String getName() {
+    return "Port " + name;
+  }
+
+  public void interruptServiced() {
+  }
+
+  // for HW to set hi/low on the pins...
+  public void setPinState(int pin, int state) {
+    if (interrupt > 0) {
+      if (pinState[pin] != state) {
+	pinState[pin] = state;
+	int bit = 1 << pin;
+	if ((memory[offset + IES] & bit) == 0) {
+	  // LO/HI transition
+	  if (state == PIN_HI) {
+	    interruptFlag |= bit;
+	    System.out.println(getName() + " Flagging interrupt (HI): " + bit);
+	  }
+	} else {
+	  // HI/LO transition
+	  if (state == PIN_LOW) {
+	    interruptFlag |= bit;
+	    System.out.println(getName() + " Flagging interrupt (LOW): " +
+			       bit);
+	  }
+	}
+      }
+    }
+    memory[offset + IFG] = interruptFlag;
+
+    // Maybe this is not the only place where we should flag int?
+    cpu.flagInterrupt(interrupt, this, interruptFlag > 0);
+  }
+
+
+  public void reset() {
+    for (int i = 0, n = 8; i < n; i++) {
+      pinState[i] = PIN_LOW;
+    }
+    interruptFlag = 0;
+    cpu.flagInterrupt(interrupt, this, interruptFlag > 0);
+  }
+
+}

Added: mspsim/se/sics/mspsim/core/IOUnit.java
===================================================================
--- mspsim/se/sics/mspsim/core/IOUnit.java	                        (rev 0)
+++ mspsim/se/sics/mspsim/core/IOUnit.java	2007-10-24 10:44:41 UTC (rev 4)
@@ -0,0 +1,100 @@
+/**
+ * Copyright (c) 2007, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of MSPSim.
+ *
+ * $Id: IOUnit.java,v 1.3 2007/10/21 21:17:34 nfi Exp $
+ *
+ * -----------------------------------------------------------------
+ *
+ * IOUnit
+ *
+ * Author  : Joakim Eriksson
+ * Created : Sun Oct 21 22:00:00 2007
+ * Updated : $Date: 2007/10/21 21:17:34 $
+ *           $Revision: 1.3 $
+ */
+
+package se.sics.mspsim.core;
+
+public abstract class IOUnit {
+
+  int[] memory;
+  int offset;
+
+  public IOUnit(int[] memory, int offset) {
+    this.memory = memory;
+    this.offset = offset;
+  }
+
+  public void reset() {
+  }
+
+  public boolean needsTick() {
+    return true;
+  }
+
+  // Default implementation assums notify write and read on all
+  // addresses (should be optimized for each unit)
+  public boolean needsWrite(int address) {
+    return true;
+  }
+
+  public boolean needsRead(int address) {
+    return true;
+  }
+
+  // Should return the cycle it wants the next tick...
+  public long ioTick(long cycles) {
+    return cycles + 1000000;
+  }
+
+  // write
+  // write a value to the IO unit
+  public abstract void write(int address, int value, boolean word,
+			     long cycles);
+
+  // read
+  // read a value from the IO unit
+  public abstract int read(int address, boolean word, long cycles);
+
+  public abstract String getName();
+
+  // We should add "Interrupt serviced..." to indicate that its latest
+  // Interrupt was serviced...
+  public abstract void interruptServiced();
+
+  // Utility function for converting 16 bits data to correct return
+  // value depending on address alignment and word/byte mode
+  public static int return16(int address, int data, boolean word) {
+    if (word) return data;
+    // First byte => low byte
+    if ((address & 1) == 0) return data & 0xff;
+    // Second byte => hi byte
+    return (data >> 8) & 0xff;
+  }
+}

Added: mspsim/se/sics/mspsim/core/MSP430.java
===================================================================
--- mspsim/se/sics/mspsim/core/MSP430.java	                        (rev 0)
+++ mspsim/se/sics/mspsim/core/MSP430.java	2007-10-24 10:44:41 UTC (rev 4)
@@ -0,0 +1,281 @@
+/**
+ * Copyright (c) 2007, Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Institute nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * This file is part of MSPSim.
+ *
+ * $Id: MSP430.java,v 1.4 2007/10/21 22:02:22 nfi Exp $
+ *
+ * -----------------------------------------------------------------
+ *
+ * MSP430
+ *
+ * Author  : Joakim Eriksson
+ * Created : Sun Oct 21 22:00:00 2007
+ * Updated : $Date: 2007/10/21 22:02:22 $
+ *           $Revision: 1.4 $
+ */
+
+package se.sics.mspsim.core;
+import java.util.Arrays;
+import java.util.Hashtable;
+
+import se.sics.mspsim.util.Utils;
+
+public class MSP430 extends MSP430Core {
+
+  public static final int RETURN = 0x4130;
+
+  private int[] execCounter;
+
+  private boolean debug = false;
+  private boolean running = false;
+
+  // Debug time - measure cycles
+  private long lastCycles = 0;
+  private long time;
+
+  private long instCtr = 0;
+
+  private DisAsm disAsm;
+
+  private MapTable map;
+  private Hashtable<String,CallEntry> profileData;
+  private CallEntry[] callStack;
+  private int cSP = 0;
+
+  /**
+   * Creates a new <code>MSP430</code> instance.
+   *
+   */
+  public MSP430(int type) {
+    super(type);
+    disAsm = new DisAsm();
+  }
+
+  public DisAsm getDisAsm() {
+    return disAsm;
+  }
+
+  public void cpuloop() {
+    if (running) {
+      throw new IllegalStateException("already running");
+    }
+    running = true;
+    // ??? - power-up reset should be executed?!
+    time = System.currentTimeMillis();
+    run();
+  }
+
+  private void run() {
+    while (running) {
+      // -------------------------------------------------------------------
+      // Debug information
+      // -------------------------------------------------------------------
+      if (debug) {
+	if (servicedInterrupt >= 0) {
+	  disAsm.disassemble(reg[PC], memory, reg, servicedInterrupt);
+	} else {
+	  disAsm.disassemble(reg[PC], memory, reg);
+	}
+      }
+
+      instCtr++;
+      if ((instCtr % 10000007) == 0 && !debug) {
+	printCPUSpeed(reg[PC]);
+      }
+
+      if (execCounter != null) {
+	execCounter[reg[PC]]++;
+      }
+
+      emulateOP();
+
+//       if ((instruction & 0xff80) == CALL) {
+// 	System.out.println("Call to PC = " + reg[PC]);
+//       }
+
+      if (map != null) {
+	if ((instruction & 0xff80) == CALL) {
+	  profileCall(map.getFunction(reg[PC]), cycles);
+	  // 	  System.out.println("Call," + map.getFunction(reg[PC]) + "," +
+	  // 			     cycles);
+	} else if (instruction == RETURN) {
+	  profileReturn(cycles);
+	  //System.out.println("Return," + cycles);
+	}
+      }
+    }
+  }
+
+  private void profileCall(String function, long cycles) {
+//     System.out.println("Call at: " + Utils.hex16(reg[PC]));
+    if (callStack[cSP] == null) {
+      callStack[cSP] = new CallEntry();
+    }
+    if (function == null) {
+      function = "fkn at $" + Utils.hex16(reg[PC]);
+    }
+    callStack[cSP].function = function;
+    callStack[cSP++].cycles = cycles;
+  }
+
+  private void profileReturn(long cycles) {
+    String fkn = callStack[--cSP].function;
+//     System.out.println("Profiler: return / call stack: " + cSP + ", " + fkn);
+
+    long elapsed = cycles - callStack[cSP].cycles;
+    CallEntry ce = profileData.get(fkn);
+    if (ce == null) {
+      profileData.put(fkn, ce = new CallEntry());
+      ce.function = fkn;
+      ce.cycles = elapsed;
+    } else {
+      ce.cycles += elapsed;
+    }
+  }
+
+  public void printProfile() {
+    CallEntry[] entries =
+      profileData.values().toArray(new CallEntry[0]);
+    Arrays.sort(entries);
+    for (int i = 0, n = entries.length; i < n; i++) {
+      printFkn(entries[i].function);
+      System.out.println(" " + entries[i].cycles);
+    }
+  }
+
+  public void printFkn(String f) {
+    System.out.print(f);
+    int len = f.length();
+    if (len < 40)
+      len = 40 - len;
+    else
+      len = 0;
+    for (int i = 0, n = len; i < n; i++) {
+      System.out.print(" ");
+    }
+  }
+
+  public long step() {
+    if (running) {
+      throw new IllegalStateException("step not possible when CPU is running");
+    }
+
+    // -------------------------------------------------------------------
+    // Debug information
+    // -------------------------------------------------------------------
+    if (debug) {
+      if (servicedInterrupt >= 0) {
+	disAsm.disassemble(reg[PC], memory, reg, servicedInterrupt);
+      } else {
+	disAsm.disassemble(reg[PC], memory, reg);
+      }
+    }
+
+    instCtr++;
+    if ((instCtr % 10000007) == 0 && !debug) {
+      printCPUSpeed(reg[PC]);
+    }
+
+    if (e...
 
[truncated message content]

[Mspsim-commit] SF.net SVN: mspsim: [3] mspsim/

[<jo...@us...>]

Revision: 3
          http://mspsim.svn.sourceforge.net/mspsim/?rev=3&view=rev
Author:   joxe
Date:     2007-10-24 03:33:45 -0700 (Wed, 24 Oct 2007)

Log Message:
-----------
initial add of mspsim MSP430 emulator

Added Paths:
-----------
    mspsim/


This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.

[Mspsim-commit] SF.net SVN: mspsim: [2] Makefile

[<jo...@us...>]

Revision: 2
          http://mspsim.svn.sourceforge.net/mspsim/?rev=2&view=rev
Author:   joxe
Date:     2007-10-24 03:22:11 -0700 (Wed, 24 Oct 2007)

Log Message:
-----------


Removed Paths:
-------------
    Makefile

Deleted: Makefile
===================================================================
--- Makefile	2007-10-24 10:20:52 UTC (rev 1)
+++ Makefile	2007-10-24 10:22:11 UTC (rev 2)
@@ -1,134 +0,0 @@
-###############################################################
-# $Revision: 1.11 $ $Date: 2007/10/21 19:47:53 $
-#
-# Needed stuff in the PATH:
-#  java, javac (JDK 1.2 or newer)
-#
-# Under MS-DOS/Windows 95/NT
-#  A GNU compatible Make (for example Cygnus GNU-Win 32,
-#			  http://www.cygnus.com/misc/gnu-win32/)
-# Note: might need to be called with "make --win32" under Windows!!!
-###############################################################
-
-###############################################################
-# Settings
-###############################################################
-CC=javac
-JAVACC=javacc
-JAR=jar
-RM=rm -f
-CP=cp
-
-###############################################################
-# System dependent
-###############################################################
-
-ifndef WINDIR
-  ifdef OS
-    ifneq (,$(findstring Windows,$(OS)))
-      WINDIR := Windows
-    endif
-  endif
-endif
-
-ifndef WINDIR
-  # This settings are for UNIX
-  SEPARATOR=:
-  # Add "'" around filenames when removing them because UNIX expands "$"
-  APO='#'  (last apostrophe to avoid incorrect font-lock)
-else
-  # These setting are for MS-DOS/Windows 95/Windows NT
-  SEPARATOR=;
-  APO=
-endif
-
-
-###############################################################
-# Arguments
-###############################################################
-
-CCARGS=-deprecation -classpath .
-
-
-###############################################################
-# SERVER OBJECTS
-###############################################################
-
-IHEXFILE = blinker2.ihex
-
-CPUTEST := tests/cputest.ihex
-CPUTESTMAP := $(CPUTEST:.ihex=.map)
-
-PACKAGES := ${addprefix se/sics/mspsim/,core platform/esb platform/sky util}
-
-SOURCES := ${wildcard *.java $(addsuffix /*.java,$(PACKAGES))}
-
-OBJECTS := $(SOURCES:.java=.class)
-
-
-###############################################################
-# MAKE
-###############################################################
-
-.PHONY: compile $(CPUTEST)
-
-compile:	$(OBJECTS)
-
-all:	compile
-
-help:
-	@echo "Usage: make [all,compile,clean]"
-
-.PHONY: run
-run:	compile
-	java se.sics.util.IHexReader $(IHEXFILE) $(MAPFILE)
-
-runesb:	compile
-	java se.sics.mspsim.platform.esb.ESBNode $(IHEXFILE) $(MAPFILE)
-
-runsky:	compile
-	java se.sics.mspsim.platform.sky.SkyNode $(IHEXFILE) $(MAPFILE)
-
-.PHONY: cputest test
-test:	cputest
-
-cputest:	$(CPUTEST)
-	java se.sics.util.Test $(CPUTEST) $(CPUTESTMAP)
-
-$(CPUTEST):
-	(cd tests && $(MAKE))
-
-test:
-	cd tests && make
-	java se.sics.util.Test $(CPUTEST) $(CPUTESTMAP)
-
-.PHONY: mtest
-mtest:	compile $(CPUTEST)
-	@-$(RM) mini-test_cpu.txt
-	java se.sics.util.Test -debug $(CPUTEST) $(CPUTESTMAP) >mini-test_cpu.txt
-
-
-###############################################################
-# CLASS COMPILATION
-###############################################################
-
-%.class : %.java
-	$(CC) $(CCARGS) $<
-
-
-###############################################################
-# CLEAN  (untrusted, use with great care!!!)
-###############################################################
-
-.PHONY:	clean claen clena
-
-claen:	clean
-
-clena:	clean
-
-clean:
-ifdef WINDIR
-	-$(RM) *.class ${addsuffix /*.class,$(PACKAGES)}
-else
-	-$(RM) $(foreach f,$(wildcard *.class),$(APO)$(f)$(APO)) $(foreach dir,$(PACKAGES),$(dir)/*.class)
-endif


This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.

[Mspsim-commit] SF.net SVN: mspsim: [1] Makefile

[<jo...@us...>]

Revision: 1
          http://mspsim.svn.sourceforge.net/mspsim/?rev=1&view=rev
Author:   joxe
Date:     2007-10-24 03:20:52 -0700 (Wed, 24 Oct 2007)

Log Message:
-----------
just a test of the svn repository

Added Paths:
-----------
    Makefile

Added: Makefile
===================================================================
--- Makefile	                        (rev 0)
+++ Makefile	2007-10-24 10:20:52 UTC (rev 1)
@@ -0,0 +1,134 @@
+###############################################################
+# $Revision: 1.11 $ $Date: 2007/10/21 19:47:53 $
+#
+# Needed stuff in the PATH:
+#  java, javac (JDK 1.2 or newer)
+#
+# Under MS-DOS/Windows 95/NT
+#  A GNU compatible Make (for example Cygnus GNU-Win 32,
+#			  http://www.cygnus.com/misc/gnu-win32/)
+# Note: might need to be called with "make --win32" under Windows!!!
+###############################################################
+
+###############################################################
+# Settings
+###############################################################
+CC=javac
+JAVACC=javacc
+JAR=jar
+RM=rm -f
+CP=cp
+
+###############################################################
+# System dependent
+###############################################################
+
+ifndef WINDIR
+  ifdef OS
+    ifneq (,$(findstring Windows,$(OS)))
+      WINDIR := Windows
+    endif
+  endif
+endif
+
+ifndef WINDIR
+  # This settings are for UNIX
+  SEPARATOR=:
+  # Add "'" around filenames when removing them because UNIX expands "$"
+  APO='#'  (last apostrophe to avoid incorrect font-lock)
+else
+  # These setting are for MS-DOS/Windows 95/Windows NT
+  SEPARATOR=;
+  APO=
+endif
+
+
+###############################################################
+# Arguments
+###############################################################
+
+CCARGS=-deprecation -classpath .
+
+
+###############################################################
+# SERVER OBJECTS
+###############################################################
+
+IHEXFILE = blinker2.ihex
+
+CPUTEST := tests/cputest.ihex
+CPUTESTMAP := $(CPUTEST:.ihex=.map)
+
+PACKAGES := ${addprefix se/sics/mspsim/,core platform/esb platform/sky util}
+
+SOURCES := ${wildcard *.java $(addsuffix /*.java,$(PACKAGES))}
+
+OBJECTS := $(SOURCES:.java=.class)
+
+
+###############################################################
+# MAKE
+###############################################################
+
+.PHONY: compile $(CPUTEST)
+
+compile:	$(OBJECTS)
+
+all:	compile
+
+help:
+	@echo "Usage: make [all,compile,clean]"
+
+.PHONY: run
+run:	compile
+	java se.sics.util.IHexReader $(IHEXFILE) $(MAPFILE)
+
+runesb:	compile
+	java se.sics.mspsim.platform.esb.ESBNode $(IHEXFILE) $(MAPFILE)
+
+runsky:	compile
+	java se.sics.mspsim.platform.sky.SkyNode $(IHEXFILE) $(MAPFILE)
+
+.PHONY: cputest test
+test:	cputest
+
+cputest:	$(CPUTEST)
+	java se.sics.util.Test $(CPUTEST) $(CPUTESTMAP)
+
+$(CPUTEST):
+	(cd tests && $(MAKE))
+
+test:
+	cd tests && make
+	java se.sics.util.Test $(CPUTEST) $(CPUTESTMAP)
+
+.PHONY: mtest
+mtest:	compile $(CPUTEST)
+	@-$(RM) mini-test_cpu.txt
+	java se.sics.util.Test -debug $(CPUTEST) $(CPUTESTMAP) >mini-test_cpu.txt
+
+
+###############################################################
+# CLASS COMPILATION
+###############################################################
+
+%.class : %.java
+	$(CC) $(CCARGS) $<
+
+
+###############################################################
+# CLEAN  (untrusted, use with great care!!!)
+###############################################################
+
+.PHONY:	clean claen clena
+
+claen:	clean
+
+clena:	clean
+
+clean:
+ifdef WINDIR
+	-$(RM) *.class ${addsuffix /*.class,$(PACKAGES)}
+else
+	-$(RM) $(foreach f,$(wildcard *.class),$(APO)$(f)$(APO)) $(foreach dir,$(PACKAGES),$(dir)/*.class)
+endif


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