Gcc Log

Repo status: analyzing...


Commit Date  
[a221b6] (HEADmaster) by Peter A. Bigot Peter A. Bigot

Update DEV-PHASE for release

2012-09-11 14:14:29 Tree
[631a8e] by Peter A. Bigot Peter A. Bigot

Merge branch 'trunk'

2012-09-11 14:14:28 Tree
[c26a37] (trunk) by Peter A. Bigot Peter A. Bigot

Merge branch 'msp430/trunk' into trunk

2012-09-11 14:14:27 Tree
[51db7c] (msp430/trunk) by Peter A. Bigot Peter A. Bigot

Update for release

2012-09-11 14:14:05 Tree
[37e318] by Peter A. Bigot Peter A. Bigot

SF 3559978 broken volatile peephole optimization

Pattern improperly passed arbitrary operand where indirect read was intended

2012-09-10 22:08:04 Tree
[d74f30] by Peter A. Bigot Peter A. Bigot

SF 3562647 lack of memory model results in wrong data region

Disregard memory model when determining data region: use individual target
options. Do, however, avoid referencing non-standard regions when not
targetting a CPUX MCU.

2012-09-10 20:36:30 Tree
[e1a7bb] by Peter A. Bigot Peter A. Bigot

SF 3562063 delay_cycles wrong when optimization disabled

Use a special volatile jump instruction instead of the one that generates
gratuitous compare operations when not optimizing.

2012-09-10 17:37:00 Tree
[6acad2] by Peter A. Bigot Peter A. Bigot

SF 3554285 ICE: defining a far declared array w/o far

Treat this as user error with a diagnostic.

2012-09-10 16:10:27 Tree
[cd8d8b] by Peter A. Bigot Peter A. Bigot

SF 3554291 refine FRAM ISR fix

For MCUs with 64-entry interrupt vector tables, allow the lower 32 entries
to be individually assigned based on their index. This requires an entry
that is specified in the gcc crt0ivtbl64.o object file, and a default value
that is provided by the binutils linker script.

2012-09-10 12:59:24 Tree
[a5b5c1] by Peter A. Bigot Peter A. Bigot

Update DEV-PHASE for release

2012-07-16 19:31:07 Tree
[7357c0] by Peter A. Bigot Peter A. Bigot

Merge branch 'trunk'

2012-07-16 19:31:06 Tree
[52a580] by Peter A. Bigot Peter A. Bigot

Merge branch 'msp430/trunk' into trunk

2012-07-16 19:31:03 Tree
[fb2fac] by Peter A. Bigot Peter A. Bigot

Update for release

2012-07-16 19:30:41 Tree
[b1dc3c] by Peter A. Bigot Peter A. Bigot

SF 3544338 large memory model induction variable optimization broken

Disable flag_ivopts when TARGET_D20 and TARGET_A20 have different values.
This has precedent; the m32c back end does the same thing in a similar
situation.

2012-07-15 11:25:05 Tree
[059421] by Peter A. Bigot Peter A. Bigot

SF 3540953 fram applications overwrite bsl/jtag passwords

No MSP430 chip has more than 25 valid interrupts, and they are assigned from
the top down. The FRAM chips use lower words in the interrupt vector to
hold BSL and JTAG passwords, and having real addresses in those locations
has been shown to result in problems accessing BSL and JTAG. Leave the low
32 words erased; this matches as-delivered MSP430FR5739 content for those
addresses.

2012-07-12 19:32:16 Tree
[9584b9] by Peter A. Bigot Peter A. Bigot

Stub __even_in_range intrinsic

This doesn't do anything, so we're not closing SF 3474172, but it does at
least let a bunch of code compile unmodified that didn't used to.

2012-07-09 20:19:38 Tree
[dec1bc] by Peter A. Bigot Peter A. Bigot

Pre-check expectations of MEM_VOLATILE_P

If the operand isn't one of the expected RTL types MEM_VOLATILE_P ICEs.

2012-07-09 19:36:43 Tree
[a7873c] by Peter A. Bigot Peter A. Bigot

SF 3541056 inefficient access through 20-bit pointers

Revise the predicates used to detect operands that require use of extended
word instructions, or permit substitution of CPUX address mode instructions,
to be more accurate.

2012-07-07 17:39:02 Tree
[3de8c1] by Peter A. Bigot Peter A. Bigot

Fix region selected for function rodata

Because gcc insists on using Pmode for pointers to jump tables, we can't
allow them to be placed in far memory even if the function itself is in far
memory.

2012-07-07 16:59:25 Tree
[9e935a] by Peter A. Bigot Peter A. Bigot

SF 3539829 long argument performance degraded compared to mspgcc4

Best I can tell, when MODES_TIEABLE_P(HImode, SImode) is true lower_subreg
decides it doesn't have to decompose the SImode pair. Consequently more
registers are needed, because the elements of a to-be-dead SImode pair can't
be used as the destination when that's calculated word-at-a-time. So it's
actually better to reject ties in that case.

There's no evidence of degradation when allowing ties between modes where
the sizes are equal but greater than one. There is evidence that
disallowing that increases code size. So leave it the way it was before
e9e8afbcb4358.

2012-07-06 19:10:02 Tree
[dfb6de] by Peter A. Bigot Peter A. Bigot

SF 3539033 AND optimization to BIC not optimal

Add peephole optimization converting and #X, dst to bic #Y, dst where Y=-X
and Y can be expressed as a const generator value. Validated with the
standard cg_binaryop test where multiple instances of "and #9, dst" because
"bic #8, dst".

2012-07-06 15:30:53 Tree
[85e86a] by Peter A. Bigot Peter A. Bigot

SF 3540458 optimize peripheral address size

Define a new pair of type attributes d16/d20 which record the expectation
that a pointer to the corresponding type requires a specific number of
bits. We're using type attributes instead of named address spaces because
the latter are not available in C++ or when using -ansi.

Just as the near/far declaration attributes on a function are independent of
the c16/c20 attributes, so too are near/far declaration attributes on data
objects independent of the d16/d20 attributes.

With the corresponding change to msp430mcu to add d16 to the types in
peripheral declarations it is no longer necessary to use movx when accessing
peripheral registers.

2012-07-04 18:58:03 Tree
[5b1196] by Peter A. Bigot Peter A. Bigot

Detect conflicting type attributes

2012-07-04 17:12:56 Tree
[e5dce1] by Peter A. Bigot Peter A. Bigot

Refactor replacement of type node when attribute added

Prep work for check for conflicting attributes

2012-07-04 17:01:26 Tree
[df4091] by Peter A. Bigot Peter A. Bigot

Update DEV-PHASE for release

2012-06-27 22:12:37 Tree
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