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[OMPT-svn-commit] OpenMPT r21016 - trunk/OpenMPT/build/make
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From: <sv...@op...> - 2024-06-11 06:29:27
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Author: manx Date: Tue Jun 11 08:29:13 2024 New Revision: 21016 URL: https://source.openmpt.org/browse/openmpt/?op=revision&rev=21016 Log: [Imp] build: Makefile: DJGPP: Add more external-FPU CPU variants. Modified: trunk/OpenMPT/build/make/config-djgpp.mk Modified: trunk/OpenMPT/build/make/config-djgpp.mk ============================================================================== --- trunk/OpenMPT/build/make/config-djgpp.mk Tue Jun 11 08:27:36 2024 (r21015) +++ trunk/OpenMPT/build/make/config-djgpp.mk Tue Jun 11 08:29:13 2024 (r21016) @@ -162,212 +162,217 @@ -generic/early := $(XXX) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) +generic/early := $(XXX) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) -generic/compatible:= $(XXX) -march=i386 $(FPU_387) -mtune=pentium $(OPT_UARCH_CISC) -generic/common := $(XXX) -march=i486 $(FPU_387) -mtune=pentium $(OPT_UARCH_CISC) +generic/compatible := $(XXX) -march=i386 $(FPU_387) -mtune=pentium $(OPT_UARCH_CISC) +generic/common := $(XXX) -march=i486 $(FPU_387) -mtune=pentium $(OPT_UARCH_CISC) -generic/late := $(XXX) -march=i686 $(FPU_SSE2) -mtune=generic $(OPT_UARCH_OOOE_128) +generic/late := $(XXX) -march=i686 $(FPU_SSE2) -mtune=generic $(OPT_UARCH_OOOE_128) -virtual/ibmulator := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_EMUL) +virtual/ibmulator := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_EMUL) -virtual/ao486 := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) +virtual/ao486 := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) -virtual/bochs := $(___) -march=i686 $(FPU_387) -mtune=generic $(OPT_UARCH_EMUL) +virtual/bochs := $(___) -march=i686 $(FPU_387) -mtune=generic $(OPT_UARCH_EMUL) -virtual/qemu := $(___) -march=i686 $(FPU_SSE2) -mtune=generic $(OPT_UARCH_COMP_128) +virtual/qemu := $(___) -march=i686 $(FPU_SSE2) -mtune=generic $(OPT_UARCH_COMP_128) -virtual/pcem := $(___) -march=i686 $(FPU_387) -mtune=generic $(OPT_UARCH_COMP) -virtual/86box := $(___) -march=i686 $(FPU_387) -mtune=generic $(OPT_UARCH_COMP) -virtual/varcem := $(___) -march=i686 $(FPU_387) -mtune=generic $(OPT_UARCH_COMP) -virtual/pcbox := $(___) -march=i686 $(FPU_387) -mtune=generic $(OPT_UARCH_COMP) +virtual/pcem := $(___) -march=i686 $(FPU_387) -mtune=generic $(OPT_UARCH_COMP) +virtual/86box := $(___) -march=i686 $(FPU_387) -mtune=generic $(OPT_UARCH_COMP) +virtual/varcem := $(___) -march=i686 $(FPU_387) -mtune=generic $(OPT_UARCH_COMP) +virtual/pcbox := $(___) -march=i686 $(FPU_387) -mtune=generic $(OPT_UARCH_COMP) -virtual/unipcemu := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_EMUL) +virtual/unipcemu := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_EMUL) -virtual/dosbox := $(___) -march=i486 $(FPU_387) -mtune=i386 $(OPT_UARCH_EMUL) -virtual/dosbox-svn:= $(___) -march=i486 $(FPU_387) -mtune=i386 $(OPT_UARCH_EMUL) -virtual/dosbox-ece:= $(___) -march=i486 $(FPU_387) -mtune=i386 $(OPT_UARCH_EMUL) -virtual/dosbox-sta:= $(___) -march=i486 $(FPU_387) -mtune=i386 $(OPT_UARCH_EMUL) -virtual/dosbox-x := $(___) -march=pentium-mmx $(FPU_MMX) -mtune=i386 $(OPT_UARCH_EMUL) +virtual/dosbox := $(___) -march=i486 $(FPU_387) -mtune=i386 $(OPT_UARCH_EMUL) +virtual/dosbox-svn := $(___) -march=i486 $(FPU_387) -mtune=i386 $(OPT_UARCH_EMUL) +virtual/dosbox-ece := $(___) -march=i486 $(FPU_387) -mtune=i386 $(OPT_UARCH_EMUL) +virtual/dosbox-sta := $(___) -march=i486 $(FPU_387) -mtune=i386 $(OPT_UARCH_EMUL) +virtual/dosbox-x := $(___) -march=pentium-mmx $(FPU_MMX) -mtune=i386 $(OPT_UARCH_EMUL) -generic/nofpu := $(X__) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) # 386SX, 386DX, 486SX, Cyrix Cx486SLC..Cx486S, NexGen Nx586 +generic/nofpu := $(X__) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) # 386SX, 386DX, 486SX, Cyrix Cx486SLC..Cx486S, NexGen Nx586 -generic/386 := $(X__) -march=i386 $(FPU_387) -mtune=i386 $(OPT_UARCH_CISC) # 386+387 +generic/386 := $(X__) -march=i386 $(FPU_387) -mtune=i386 $(OPT_UARCH_CISC) # 386+387 -generic/486 := $(XX_) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) # 486DX, AMD Am5x86, Cyrix Cx4x86DX..6x86L, NexGen Nx586-PF +generic/486 := $(XX_) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) # 486DX, AMD Am5x86, Cyrix Cx4x86DX..6x86L, NexGen Nx586-PF -generic/586 := $(XXX) -march=i586 $(FPU_387) -mtune=pentium $(OPT_UARCH_SCAL) # Intel Pentium, AMD K5 -generic/586-mmx := $(XX_) -march=pentium-mmx $(FPU_MMX) -mtune=pentium-mmx $(OPT_UARCH_SCAL_64) # Intel Pentium-MMX, AMD K6, IDT WinChip-C6, Rise mP6 -generic/586-3dnow := $(XX_) -march=k6-2 $(FPU_3DNOW) -mtune=k6-2 $(OPT_UARCH_SCAL_64) # AMD K6-2..K6-3, IDT WinChip-2, VIA-C3-Samuel..VIA C3-Ezra -generic/586-3dnowa:= $(___) -march=k6-3 $(FPU_3DNOWA) -mtune=k6-3 $(OPT_UARCH_SCAL_64) # AMD K6-2+..K6-3+ +generic/586 := $(XXX) -march=i586 $(FPU_387) -mtune=pentium $(OPT_UARCH_SCAL) # Intel Pentium, AMD K5 +generic/586-mmx := $(XX_) -march=pentium-mmx $(FPU_MMX) -mtune=pentium-mmx $(OPT_UARCH_SCAL_64) # Intel Pentium-MMX, AMD K6, IDT WinChip-C6, Rise mP6 +generic/586-3dnow := $(XX_) -march=k6-2 $(FPU_3DNOW) -mtune=k6-2 $(OPT_UARCH_SCAL_64) # AMD K6-2..K6-3, IDT WinChip-2, VIA-C3-Samuel..VIA C3-Ezra +generic/586-3dnowa := $(___) -march=k6-3 $(FPU_3DNOWA) -mtune=k6-3 $(OPT_UARCH_SCAL_64) # AMD K6-2+..K6-3+ -generic/686 := $(___) -march=pentiumpro $(FPU_387) -mtune=pentiumpro $(OPT_UARCH_OOOE) # Intel Pentium-Pro -generic/686-mmx := $(XXX) -march=i686 $(FPU_MMX) -mtune=pentium2 $(OPT_UARCH_OOOE_64) # Intel Pentium-2.., AMD Bulldozer.., VIA C3-Nehemiah.., Cyrix 6x86MX.., Transmeta Crusoe.., NSC Geode-GX1.. -generic/686-3dnow := $(___) -march=i686 $(FPU_3DNOW) -mtune=pentium2 $(OPT_UARCH_OOOE_64) # VIA Cyrix-3-Joshua -generic/686-3dnowa:= $(XX_) -march=athlon $(FPU_3DNOWA) -mtune=athlon $(OPT_UARCH_OOOE_64) # AMD Athlon..K10 +generic/686 := $(___) -march=pentiumpro $(FPU_387) -mtune=pentiumpro $(OPT_UARCH_OOOE) # Intel Pentium-Pro +generic/686-mmx := $(XXX) -march=i686 $(FPU_MMX) -mtune=pentium2 $(OPT_UARCH_OOOE_64) # Intel Pentium-2.., AMD Bulldozer.., VIA C3-Nehemiah.., Cyrix 6x86MX.., Transmeta Crusoe.., NSC Geode-GX1.. +generic/686-3dnow := $(___) -march=i686 $(FPU_3DNOW) -mtune=pentium2 $(OPT_UARCH_OOOE_64) # VIA Cyrix-3-Joshua +generic/686-3dnowa := $(XX_) -march=athlon $(FPU_3DNOWA) -mtune=athlon $(OPT_UARCH_OOOE_64) # AMD Athlon..K10 -generic/sse := $(___) -march=i686 $(FPU_SSE) -mtune=pentium3 $(OPT_UARCH_OOOE_128) # Intel Pentium-3, AMD Athlon-XP, VIA C3-Nehemiah, DM&P Vortex86DX3.. +generic/sse := $(___) -march=i686 $(FPU_SSE) -mtune=pentium3 $(OPT_UARCH_OOOE_128) # Intel Pentium-3, AMD Athlon-XP, VIA C3-Nehemiah, DM&P Vortex86DX3.. -generic/sse2 := $(XX_) -march=i686 $(FPU_SSE2) -mtune=generic $(OPT_UARCH_OOOE_128) # Intel Pentium-4.., AMD Athlon-64.., VIA C7-Esther.., Transmeta Efficeon.. -generic/sse3 := $(___) -march=i686 $(FPU_SSE3) -mtune=generic $(OPT_UARCH_OOOE_128) # Intel Core.., AMD Athlon-64-X2.., VIA C7-Esther.., Transmeta Efficeon-88xx.. -generic/ssse3 := $(___) -march=i686 $(FPU_SSSE3) -mtune=generic $(OPT_UARCH_OOOE_128) # Intel Core-2.., AMD Bobcat.., Via Nano-1000.. -generic/sse4_1 := $(___) -march=i686 $(FPU_SSE4_1) -mtune=generic $(OPT_UARCH_OOOE_128) # Intel Core-1st, AMD Bulldozer.., Via Nano-3000.. -generic/sse4_2 := $(___) -march=i686 $(FPU_SSE4_2) -mtune=generic $(OPT_UARCH_OOOE_128) # Intel Core-1st, AMD Bulldozer.., Via Nano-C.. +generic/sse2 := $(XX_) -march=i686 $(FPU_SSE2) -mtune=generic $(OPT_UARCH_OOOE_128) # Intel Pentium-4.., AMD Athlon-64.., VIA C7-Esther.., Transmeta Efficeon.. +generic/sse3 := $(___) -march=i686 $(FPU_SSE3) -mtune=generic $(OPT_UARCH_OOOE_128) # Intel Core.., AMD Athlon-64-X2.., VIA C7-Esther.., Transmeta Efficeon-88xx.. +generic/ssse3 := $(___) -march=i686 $(FPU_SSSE3) -mtune=generic $(OPT_UARCH_OOOE_128) # Intel Core-2.., AMD Bobcat.., Via Nano-1000.. +generic/sse4_1 := $(___) -march=i686 $(FPU_SSE4_1) -mtune=generic $(OPT_UARCH_OOOE_128) # Intel Core-1st, AMD Bulldozer.., Via Nano-3000.. +generic/sse4_2 := $(___) -march=i686 $(FPU_SSE4_2) -mtune=generic $(OPT_UARCH_OOOE_128) # Intel Core-1st, AMD Bulldozer.., Via Nano-C.. -intel/i386 := $(X__) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) -intel/i486sx := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) -intel/i386+80287 := $(___) -march=i386 $(FPU_287) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) +intel/i386 := $(X__) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) +intel/i486sx := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) +intel/i386+80287 := $(___) -march=i386 $(FPU_287) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) -intel/i386+80387 := $(X__) -march=i386 $(FPU_387) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) -intel/i486dx := $(XXX) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) -intel/pentium := $(XXX) -march=pentium $(FPU_387) -mtune=pentium $(OPT_UARCH_SCAL) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) -intel/pentium-mmx := $(XXX) -march=pentium-mmx $(FPU_MMX) -mtune=pentium-mmx $(OPT_UARCH_SCAL_64) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_S7) -intel/pentium-pro := $(___) -march=pentiumpro $(FPU_387) -mtune=pentiumpro $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_PENTIUMPRO) -intel/pentium2 := $(XX_) -march=pentium2 $(FPU_MMX) -mtune=pentium2 $(OPT_UARCH_OOOE_64) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_PENTIUM2) -intel/pentium3 := $(X__) -march=pentium3 $(FPU_SSE) -mtune=pentium3 $(OPT_UARCH_OOOE_128) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_PENTIUM3) -intel/pentium4 := $(XX_) -march=pentium4 $(FPU_SSE2) -mtune=pentium4 $(OPT_UARCH_OOOE_128) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_PENTIUM4) -intel/pentium4.1 := $(___) -march=prescott $(FPU_SSE3) -mtune=prescott $(OPT_UARCH_OOOE_128) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_PENTIUM41) -intel/core2 := $(___) -march=core2 $(FPU_SSSE3) -mtune=core2 $(OPT_UARCH_OOOE_128) --param l1-cache-size=32 --param l2-cache-size=$(CACHE_CORE2) +intel/i386+80387 := $(X__) -march=i386 $(FPU_387) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) +intel/i486sx+i487sx := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) +intel/i486dx := $(XXX) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) +intel/pentium := $(XXX) -march=pentium $(FPU_387) -mtune=pentium $(OPT_UARCH_SCAL) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) +intel/pentium-mmx := $(XXX) -march=pentium-mmx $(FPU_MMX) -mtune=pentium-mmx $(OPT_UARCH_SCAL_64) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_S7) +intel/pentium-pro := $(___) -march=pentiumpro $(FPU_387) -mtune=pentiumpro $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_PENTIUMPRO) +intel/pentium2 := $(XX_) -march=pentium2 $(FPU_MMX) -mtune=pentium2 $(OPT_UARCH_OOOE_64) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_PENTIUM2) +intel/pentium3 := $(X__) -march=pentium3 $(FPU_SSE) -mtune=pentium3 $(OPT_UARCH_OOOE_128) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_PENTIUM3) +intel/pentium4 := $(XX_) -march=pentium4 $(FPU_SSE2) -mtune=pentium4 $(OPT_UARCH_OOOE_128) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_PENTIUM4) +intel/pentium4.1 := $(___) -march=prescott $(FPU_SSE3) -mtune=prescott $(OPT_UARCH_OOOE_128) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_PENTIUM41) +intel/core2 := $(___) -march=core2 $(FPU_SSSE3) -mtune=core2 $(OPT_UARCH_OOOE_128) --param l1-cache-size=32 --param l2-cache-size=$(CACHE_CORE2) -intel/celeron := $(___) -march=pentium2 $(FPU_MMX) -mtune=pentium2 $(OPT_UARCH_OOOE_64) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_CELERON) -intel/pentium-m := $(___) -march=pentium-m $(FPU_SSE2) -mtune=pentium-m $(OPT_UARCH_OOOE_128) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_PENTIUMM) -intel/core := $(___) -march=pentium-m $(FPU_SSE3) -mtune=core2 $(OPT_UARCH_OOOE_128) --param l1-cache-size=32 --param l2-cache-size=$(CACHE_CORE) -intel/atom := $(___) -march=bonnell $(FPU_SSSE3) -mtune=bonnell $(OPT_UARCH_SCAL_128) --param l1-cache-size=24 --param l2-cache-size=$(CACHE_ATOM) +intel/celeron := $(___) -march=pentium2 $(FPU_MMX) -mtune=pentium2 $(OPT_UARCH_OOOE_64) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_CELERON) +intel/pentium-m := $(___) -march=pentium-m $(FPU_SSE2) -mtune=pentium-m $(OPT_UARCH_OOOE_128) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_PENTIUMM) +intel/core := $(___) -march=pentium-m $(FPU_SSE3) -mtune=core2 $(OPT_UARCH_OOOE_128) --param l1-cache-size=32 --param l2-cache-size=$(CACHE_CORE) +intel/atom := $(___) -march=bonnell $(FPU_SSSE3) -mtune=bonnell $(OPT_UARCH_SCAL_128) --param l1-cache-size=24 --param l2-cache-size=$(CACHE_ATOM) -intel/late := $(XX_) -march=i686 $(FPU_SSSE3) -mtune=intel $(OPT_UARCH_OOOE_128) +intel/late := $(XX_) -march=i686 $(FPU_SSSE3) -mtune=intel $(OPT_UARCH_OOOE_128) -amd/am386 := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) -amd/am486sx := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) +amd/am386 := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) +amd/am486sx := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) -amd/am386+80387 := $(___) -march=i386 $(FPU_387) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) -amd/am486dx := $(XX_) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) -amd/am486dxe := $(XX_) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_486) -amd/am5x86 := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_486) -amd/k5 := $(X__) -march=i586 $(FPU_387) -mtune=i586 $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) -amd/k5-pentium := $(X__) -march=i586 $(FPU_387) -mtune=pentium $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) -amd/k5-pentiummmx := $(X__) -march=i586 $(FPU_387) -mtune=pentium-mmx $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) -amd/k5-pentiumpro := $(X__) -march=i586 $(FPU_387) -mtune=pentiumpro $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) -amd/k5-pentium2 := $(X__) -march=i586 $(FPU_387) -mtune=pentium2 $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) -amd/k5-k6 := $(X__) -march=i586 $(FPU_387) -mtune=k6 $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) -amd/k6 := $(XX_) -march=k6 $(FPU_MMX) -mtune=k6 $(OPT_UARCH_OOOE_64) --param l1-cache-size=32 --param l2-cache-size=$(CACHE_S7) -amd/k6-2 := $(XXX) -march=k6-2 $(FPU_3DNOW) -mtune=k6-2 $(OPT_UARCH_OOOE_64) --param l1-cache-size=32 --param l2-cache-size=$(CACHE_SS7) -amd/k6-3 := $(___) -march=k6-3 $(FPU_3DNOW) -mtune=k6-3 $(OPT_UARCH_OOOE_64) --param l1-cache-size=32 --param l2-cache-size=256 -amd/k6-2+ := $(___) -march=k6-3 $(FPU_3DNOWA) -mtune=k6-3 $(OPT_UARCH_OOOE_64) --param l1-cache-size=32 --param l2-cache-size=128 -amd/k6-3+ := $(___) -march=k6-3 $(FPU_3DNOWA) -mtune=k6-3 $(OPT_UARCH_OOOE_64) --param l1-cache-size=32 --param l2-cache-size=256 -amd/athlon := $(XX_) -march=athlon $(FPU_3DNOWA) -mtune=athlon $(OPT_UARCH_OOOE_64) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_ATHLON) -amd/athlon-xp := $(XXX) -march=athlon-xp $(FPU_3DASSE) -mtune=athlon-xp $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_ATHLONXP) -amd/athlon64 := $(X__) -march=k8 $(FPU_SSE2) -mtune=k8 $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_ATHLON64) -amd/athlon64-sse3 := $(___) -march=k8-sse3 $(FPU_SSE3) -mtune=k8-sse3 $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_ATHLON64) -amd/k10 := $(___) -march=amdfam10 $(FPU_SSE4A) -mtune=amdfam10 $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=512 +amd/am386+80387 := $(___) -march=i386 $(FPU_387) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) +amd/am486sx+am487sx := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) +amd/am486dx := $(XX_) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) +amd/am486dxe := $(XX_) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_486) +amd/am5x86 := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_486) +amd/k5 := $(X__) -march=i586 $(FPU_387) -mtune=i586 $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) +amd/k5-pentium := $(X__) -march=i586 $(FPU_387) -mtune=pentium $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) +amd/k5-pentiummmx := $(X__) -march=i586 $(FPU_387) -mtune=pentium-mmx $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) +amd/k5-pentiumpro := $(X__) -march=i586 $(FPU_387) -mtune=pentiumpro $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) +amd/k5-pentium2 := $(X__) -march=i586 $(FPU_387) -mtune=pentium2 $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) +amd/k5-k6 := $(X__) -march=i586 $(FPU_387) -mtune=k6 $(OPT_UARCH_OOOE) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_S7) +amd/k6 := $(XX_) -march=k6 $(FPU_MMX) -mtune=k6 $(OPT_UARCH_OOOE_64) --param l1-cache-size=32 --param l2-cache-size=$(CACHE_S7) +amd/k6-2 := $(XXX) -march=k6-2 $(FPU_3DNOW) -mtune=k6-2 $(OPT_UARCH_OOOE_64) --param l1-cache-size=32 --param l2-cache-size=$(CACHE_SS7) +amd/k6-3 := $(___) -march=k6-3 $(FPU_3DNOW) -mtune=k6-3 $(OPT_UARCH_OOOE_64) --param l1-cache-size=32 --param l2-cache-size=256 +amd/k6-2+ := $(___) -march=k6-3 $(FPU_3DNOWA) -mtune=k6-3 $(OPT_UARCH_OOOE_64) --param l1-cache-size=32 --param l2-cache-size=128 +amd/k6-3+ := $(___) -march=k6-3 $(FPU_3DNOWA) -mtune=k6-3 $(OPT_UARCH_OOOE_64) --param l1-cache-size=32 --param l2-cache-size=256 +amd/athlon := $(XX_) -march=athlon $(FPU_3DNOWA) -mtune=athlon $(OPT_UARCH_OOOE_64) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_ATHLON) +amd/athlon-xp := $(XXX) -march=athlon-xp $(FPU_3DASSE) -mtune=athlon-xp $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_ATHLONXP) +amd/athlon64 := $(X__) -march=k8 $(FPU_SSE2) -mtune=k8 $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_ATHLON64) +amd/athlon64-sse3 := $(___) -march=k8-sse3 $(FPU_SSE3) -mtune=k8-sse3 $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_ATHLON64) +amd/k10 := $(___) -march=amdfam10 $(FPU_SSE4A) -mtune=amdfam10 $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=512 -amd/duron := $(X__) -march=athlon $(FPU_3DNOWA) -mtune=athlon $(OPT_UARCH_OOOE_64) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_DURON) -amd/duron-xp := $(___) -march=athlon-xp $(FPU_3DASSE) -mtune=athlon-xp $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_DURONXP) -amd/sempron64 := $(___) -march=k8 $(FPU_SSE2) -mtune=k8 $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_SEMPRON64) +amd/duron := $(X__) -march=athlon $(FPU_3DNOWA) -mtune=athlon $(OPT_UARCH_OOOE_64) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_DURON) +amd/duron-xp := $(___) -march=athlon-xp $(FPU_3DASSE) -mtune=athlon-xp $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_DURONXP) +amd/sempron64 := $(___) -march=k8 $(FPU_SSE2) -mtune=k8 $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=$(CACHE_SEMPRON64) -amd/geode-gx := $(___) -march=geode $(FPU_3DNOWA) -mtune=geode $(OPT_UARCH_OOOE_64) --param l1-cache-size=16 --param l2-cache-size=0 -amd/geode-lx := $(___) -march=geode $(FPU_3DNOWA) -mtune=geode $(OPT_UARCH_OOOE_64) --param l1-cache-size=64 --param l2-cache-size=128 -amd/geode-nx := $(___) -march=athlon-xp $(FPU_3DASSE) -mtune=athlon-xp $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=256 -amd/bobcat := $(X__) -march=btver1 $(FPU_SSE4A) -mtune=btver1 $(OPT_UARCH_OOOE_128) --param l1-cache-size=32 --param l2-cache-size=512 -amd/jaguar := $(___) -march=btver2 $(FPU_SSE4A) -mtune=btver2 $(OPT_UARCH_OOOE_128) --param l1-cache-size=32 --param l2-cache-size=1024 +amd/geode-gx := $(___) -march=geode $(FPU_3DNOWA) -mtune=geode $(OPT_UARCH_OOOE_64) --param l1-cache-size=16 --param l2-cache-size=0 +amd/geode-lx := $(___) -march=geode $(FPU_3DNOWA) -mtune=geode $(OPT_UARCH_OOOE_64) --param l1-cache-size=64 --param l2-cache-size=128 +amd/geode-nx := $(___) -march=athlon-xp $(FPU_3DASSE) -mtune=athlon-xp $(OPT_UARCH_OOOE_128) --param l1-cache-size=64 --param l2-cache-size=256 +amd/bobcat := $(X__) -march=btver1 $(FPU_SSE4A) -mtune=btver1 $(OPT_UARCH_OOOE_128) --param l1-cache-size=32 --param l2-cache-size=512 +amd/jaguar := $(___) -march=btver2 $(FPU_SSE4A) -mtune=btver2 $(OPT_UARCH_OOOE_128) --param l1-cache-size=32 --param l2-cache-size=1024 -amd/late := $(XX_) -march=i686 $(FPU_SSE4A) -mtune=generic $(OPT_UARCH_OOOE_128) +amd/late := $(XX_) -march=i686 $(FPU_SSE4A) -mtune=generic $(OPT_UARCH_OOOE_128) -ct/38600 := $(___) -march=i386 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) -ct/38605 := $(___) -march=i386 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=1 --param l2-cache-size=$(CACHE_386) +ct/38600 := $(___) -march=i386 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) +ct/38605 := $(___) -march=i386 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=1 --param l2-cache-size=$(CACHE_386) -nexgen/nx586 := $(___) -march=i486 $(FPU_NONE) $(TUNE_586) $(OPT_UARCH_OOOE) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_486) +nexgen/nx586 := $(___) -march=i486 $(FPU_NONE) $(TUNE_586) $(OPT_UARCH_OOOE) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_486) -nexgen/nx586pf := $(___) -march=i486 $(FPU_387) $(TUNE_586) $(OPT_UARCH_OOOE) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_486) +nexgen/nx586pf := $(___) -march=i486 $(FPU_387) $(TUNE_586) $(OPT_UARCH_OOOE) --param l1-cache-size=16 --param l2-cache-size=$(CACHE_486) -ibm/386slc := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_386) -ibm/486slc := $(___) -march=i486 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_386) -ibm/486bl := $(___) -march=i486 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_486) +ibm/386slc := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_386) +ibm/486slc := $(___) -march=i486 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_386) +ibm/486bl := $(___) -march=i486 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_486) -cyrix/cx486slc := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=1 --param l2-cache-size=$(CACHE_386) -cyrix/cx486dlc := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=1 --param l2-cache-size=$(CACHE_386) -cyrix/cx4x86s := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=2 --param l2-cache-size=$(CACHE_486) +cyrix/cx486slc := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=1 --param l2-cache-size=$(CACHE_386) +cyrix/cx486dlc := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=1 --param l2-cache-size=$(CACHE_386) +cyrix/cx4x86s := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=2 --param l2-cache-size=$(CACHE_486) -cyrix/cx4x86dx := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) -cyrix/cx5x86 := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_SCAL) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_486) -cyrix/6x86 := $(XXX) -march=i486 $(FPU_387) $(TUNE_586) $(OPT_UARCH_OOOE) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_S7) -cyrix/6x86l := $(___) -march=i486 $(FPU_387) $(TUNE_586) $(OPT_UARCH_OOOE) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_S7) -cyrix/6x86mx := $(XX_) -march=i686 $(FPU_MMX) $(TUNE_686MMX) $(OPT_UARCH_OOOE_64) --param l1-cache-size=48 --param l2-cache-size=$(CACHE_SS7) +cyrix/cx486slc+80387 := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=1 --param l2-cache-size=$(CACHE_386) +cyrix/cx486dlc+80387 := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=1 --param l2-cache-size=$(CACHE_386) +cyrix/cx4x86s+cx487s := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=2 --param l2-cache-size=$(CACHE_486) +cyrix/cx4x86dx := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) +cyrix/cx5x86 := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_SCAL) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_486) +cyrix/6x86 := $(XXX) -march=i486 $(FPU_387) $(TUNE_586) $(OPT_UARCH_OOOE) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_S7) +cyrix/6x86l := $(___) -march=i486 $(FPU_387) $(TUNE_586) $(OPT_UARCH_OOOE) --param l1-cache-size=12 --param l2-cache-size=$(CACHE_S7) +cyrix/6x86mx := $(XX_) -march=i686 $(FPU_MMX) $(TUNE_686MMX) $(OPT_UARCH_OOOE_64) --param l1-cache-size=48 --param l2-cache-size=$(CACHE_SS7) -cyrix/mediagx-gx := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_SCAL) --param l1-cache-size=9 --param l2-cache-size=0 -cyrix/mediagx-gxm := $(___) -march=i686 $(FPU_MMX) $(TUNE_686MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=9 --param l2-cache-size=0 +cyrix/mediagx-gx := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_SCAL) --param l1-cache-size=9 --param l2-cache-size=0 +cyrix/mediagx-gxm := $(___) -march=i686 $(FPU_MMX) $(TUNE_686MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=9 --param l2-cache-size=0 -nsc/geode-gx1 := $(___) -march=i686 $(FPU_MMX) $(TUNE_686MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=9 --param l2-cache-size=0 -nsc/geode-gx2 := $(___) -march=geode $(FPU_3DNOWA) -mtune=geode $(OPT_UARCH_OOOE_64) --param l1-cache-size=16 --param l2-cache-size=0 +nsc/geode-gx1 := $(___) -march=i686 $(FPU_MMX) $(TUNE_686MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=9 --param l2-cache-size=0 +nsc/geode-gx2 := $(___) -march=geode $(FPU_3DNOWA) -mtune=geode $(OPT_UARCH_OOOE_64) --param l1-cache-size=16 --param l2-cache-size=0 -idt/winchip-c6 := $(X__) -march=i586 $(FPU_MMX) -mtune=winchip-c6 $(OPT_UARCH_PIPE_64) --param l1-cache-size=32 --param l2-cache-size=$(CACHE_S7) -idt/winchip2 := $(X__) -march=i586 $(FPU_3DNOW) -mtune=winchip2 $(OPT_UARCH_SCAL_64) --param l1-cache-size=32 --param l2-cache-size=$(CACHE_SS7) +idt/winchip-c6 := $(X__) -march=i586 $(FPU_MMX) -mtune=winchip-c6 $(OPT_UARCH_PIPE_64) --param l1-cache-size=32 --param l2-cache-size=$(CACHE_S7) +idt/winchip2 := $(X__) -march=i586 $(FPU_3DNOW) -mtune=winchip2 $(OPT_UARCH_SCAL_64) --param l1-cache-size=32 --param l2-cache-size=$(CACHE_SS7) -via/cyrix3-joshua := $(___) -march=i686 $(FPU_3DNOW) $(TUNE_686MMX) $(OPT_UARCH_OOOE_64) --param l1-cache-size=48 --param l2-cache-size=256 -via/c3-samuel := $(___) -march=c3 $(FPU_3DNOW) -mtune=c3 $(OPT_UARCH_SCAL_64) --param l1-cache-size=64 --param l2-cache-size=0 -via/c3-samuel2 := $(___) -march=samuel-2 $(FPU_3DNOW) -mtune=samuel-2 $(OPT_UARCH_SCAL_64) --param l1-cache-size=64 --param l2-cache-size=64 -via/c3-ezra := $(___) -march=samuel-2 $(FPU_3DNOW) -mtune=samuel-2 $(OPT_UARCH_SCAL_64) --param l1-cache-size=64 --param l2-cache-size=64 -via/c3-nehemiah := $(___) -march=nehemiah $(FPU_SSE) -mtune=nehemiah $(OPT_UARCH_SCAL_128) --param l1-cache-size=64 --param l2-cache-size=64 -via/c7-esther := $(XX_) -march=esther $(FPU_SSE3) -mtune=esther $(OPT_UARCH_SCAL_128) --param l1-cache-size=64 --param l2-cache-size=128 +via/cyrix3-joshua := $(___) -march=i686 $(FPU_3DNOW) $(TUNE_686MMX) $(OPT_UARCH_OOOE_64) --param l1-cache-size=48 --param l2-cache-size=256 +via/c3-samuel := $(___) -march=c3 $(FPU_3DNOW) -mtune=c3 $(OPT_UARCH_SCAL_64) --param l1-cache-size=64 --param l2-cache-size=0 +via/c3-samuel2 := $(___) -march=samuel-2 $(FPU_3DNOW) -mtune=samuel-2 $(OPT_UARCH_SCAL_64) --param l1-cache-size=64 --param l2-cache-size=64 +via/c3-ezra := $(___) -march=samuel-2 $(FPU_3DNOW) -mtune=samuel-2 $(OPT_UARCH_SCAL_64) --param l1-cache-size=64 --param l2-cache-size=64 +via/c3-nehemiah := $(___) -march=nehemiah $(FPU_SSE) -mtune=nehemiah $(OPT_UARCH_SCAL_128) --param l1-cache-size=64 --param l2-cache-size=64 +via/c7-esther := $(XX_) -march=esther $(FPU_SSE3) -mtune=esther $(OPT_UARCH_SCAL_128) --param l1-cache-size=64 --param l2-cache-size=128 -via/late := $(XX_) -march=i686 $(FPU_SSE3) -mtune=esther $(OPT_UARCH_SCAL_128) +via/late := $(XX_) -march=i686 $(FPU_SSE3) -mtune=esther $(OPT_UARCH_SCAL_128) -umc/u5s := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) -umc/u5d := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) +umc/u5s := $(___) -march=i486 $(FPU_NONE) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) +umc/u5d := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=6 --param l2-cache-size=$(CACHE_486) -transmeta/crusoe := $(X__) -march=i686 $(FPU_MMX) $(TUNE_686MMX) $(OPT_UARCH_COMP) --param l1-cache-size=64 --param l2-cache-size=256 -transmeta/efficeon:= $(___) -march=i686 $(FPU_SSE2) $(TUNE_686SSE2) $(OPT_UARCH_COMP) --param l1-cache-size=64 --param l2-cache-size=1024 -transmeta/tm8800 := $(___) -march=i686 $(FPU_SSE3) $(TUNE_686SSE3) $(OPT_UARCH_COMP) --param l1-cache-size=64 --param l2-cache-size=1024 +transmeta/crusoe := $(X__) -march=i686 $(FPU_MMX) $(TUNE_686MMX) $(OPT_UARCH_COMP) --param l1-cache-size=64 --param l2-cache-size=256 +transmeta/efficeon := $(___) -march=i686 $(FPU_SSE2) $(TUNE_686SSE2) $(OPT_UARCH_COMP) --param l1-cache-size=64 --param l2-cache-size=1024 +transmeta/tm8800 := $(___) -march=i686 $(FPU_SSE3) $(TUNE_686SSE3) $(OPT_UARCH_COMP) --param l1-cache-size=64 --param l2-cache-size=1024 -uli/m6117c := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) +uli/m6117c := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) -rise/mp6 := $(X__) -march=i586 $(FPU_MMX) $(TUNE_586MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_SS7) +rise/mp6 := $(X__) -march=i586 $(FPU_MMX) $(TUNE_586MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=8 --param l2-cache-size=$(CACHE_SS7) -sis/55x := $(___) -march=i586 $(FPU_MMX) $(TUNE_586MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=8 --param l2-cache-size=0 +sis/55x := $(___) -march=i586 $(FPU_MMX) $(TUNE_586MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=8 --param l2-cache-size=0 -dmnp/m6117d := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) -dmnp/vortex86sx := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_PIPE) --param l1-cache-size=16 --param l2-cache-size=0 +dmnp/m6117d := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_CISC) --param l1-cache-size=0 --param l2-cache-size=$(CACHE_386) +dmnp/vortex86sx := $(___) -march=i386 $(FPU_NONE) -mtune=i386 $(OPT_UARCH_PIPE) --param l1-cache-size=16 --param l2-cache-size=0 -dmnp/vortex86dx := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=16 --param l2-cache-size=256 -dmnp/vortex86mx := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=16 --param l2-cache-size=256 -dmnp/vortex86 := $(___) -march=i586 $(FPU_MMX) $(TUNE_586MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=8 --param l2-cache-size=0 -dmnp/vortex86dx2 := $(___) -march=i586 $(FPU_MMX) $(TUNE_586MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=16 --param l2-cache-size=256 -dmnp/vortex86mx := $(___) -march=i586 $(FPU_MMX) $(TUNE_586MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=16 --param l2-cache-size=128 -dmnp/vortex86dx3 := $(___) -march=i686 $(FPU_SSE) $(TUNE_686SSE) $(OPT_UARCH_SCAL_128) --param l1-cache-size=32 --param l2-cache-size=512 -dmnp/vortex86mx2 := $(___) -march=i686 $(FPU_SSE) $(TUNE_686SSE) $(OPT_UARCH_SCAL_128) --param l1-cache-size=32 --param l2-cache-size=128 +dmnp/vortex86dx := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=16 --param l2-cache-size=256 +dmnp/vortex86mx := $(___) -march=i486 $(FPU_387) -mtune=i486 $(OPT_UARCH_PIPE) --param l1-cache-size=16 --param l2-cache-size=256 +dmnp/vortex86 := $(___) -march=i586 $(FPU_MMX) $(TUNE_586MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=8 --param l2-cache-size=0 +dmnp/vortex86dx2 := $(___) -march=i586 $(FPU_MMX) $(TUNE_586MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=16 --param l2-cache-size=256 +dmnp/vortex86mx := $(___) -march=i586 $(FPU_MMX) $(TUNE_586MMX) $(OPT_UARCH_SCAL_64) --param l1-cache-size=16 --param l2-cache-size=128 +dmnp/vortex86dx3 := $(___) -march=i686 $(FPU_SSE) $(TUNE_686SSE) $(OPT_UARCH_SCAL_128) --param l1-cache-size=32 --param l2-cache-size=512 +dmnp/vortex86mx2 := $(___) -march=i686 $(FPU_SSE) $(TUNE_686SSE) $(OPT_UARCH_SCAL_128) --param l1-cache-size=32 --param l2-cache-size=128 |
