Thanks for all your answers.

APPdemtp.c is located in .\Sources\App repertory

> $(DIR_OBJECTS)%.obj : %.c

I already use $@  in the recipe, but Make seems not to understand this rule because of => %.c
When I do

> $(DIR_OBJECTS)%.obj : $(ALL_C_SOURCES)

It works correctly. The current .c file is found and Make generates the corresponding .o in $(DIR_OBJECTS)

I have a list of source files to compile (in different paths) and APPdemtp.c is the first one. That is why I need VPATH to ensure that Make will find them when I write => %.c





On Thu, Nov 7, 2013 at 6:17 PM, Eli Zaretskii <eliz@gnu.org> wrote:
> From: Stephanie KOUOI <stephanie.kouoi.ext@valeo.com>
> Date: Thu, 7 Nov 2013 17:23:04 +0100
>
> By default, make put the object files generated in the same repertory as
> the .c, after compilation.
> For my purpose, I have to move the .obj in a specific repertory
> (DIR_OBJECTS). I heard that I have to use VPATH variable to help make to
> find the corresponding C source file.

I don't see why you would need to use VPATH for this purpose.  If the
target is said to be in some directory, as in this rule:

> $(DIR_OBJECTS)%.obj : %.c

then Make will generate it in that directory, provided that you use $@
in the recipe.

> COMMON_DIR           := .\sources
> TARGET_DIR              := .\$(TARGET)\sources
>
> ALL_C_SOURCES := $(shell dir $(COMMON_DIR)\*.c /a:-d /b /s)
> ALL_C_SOURCES += $(shell dir $(TARGET_DIR)\*.c /a:-d /b /s)
>
> VPATH += $(dir $(ALL_C_SOURCES))
>
> DIR_OBJECTS        := .\$(TARGET)\out\obj/
>
> ALL_OBJS := $(patsubst %.c, %.$(OBJ), $(notdir $(ALL_C_SOURCES))) # .c -> .o
> ALL_OBJS := $(patsubst %.$(OBJ), $(DIR_OBJECTS)%.$(OBJ), $(ALL_OBJS)) # .o
> _> _target/out/obj/.o
>
>
> But the following rule seems not to work because of "%.c" :
> $(DIR_OBJECTS)%.obj : %.c
>
> I have the following error :
> "mingw32-make: *** No rule to make target
> '.\_XPC560x_MICROSAR_OS\out\obj/APPdemtp.obj'"

You didn't say in which directory does APPdemtp.c live.  How can we
analyze your problem without knowing that?

Btw, a few comments about your Makefile:

  . You use backslashes in file names -- I suggest to avoid that as
    much as possible, and use forward slashes instead.  In some
    contexts, in particular file-name wildcards, a backslash is an
    escape character, so this might bite you some day.

  . You don't need to use $(shell dir ....), as you have the $wildcard
    function to do that.

> ALL_OBJS := $(patsubst %.c, %.$(OBJ), $(notdir $(ALL_C_SOURCES))) # .c -> .o

Isn't that the same as

 ALL_OBJS = $(notdir $(ALL_C_SOURCES:.c=.o))

?

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--
Cordialement / Kind regards,

Stephanie KOUOI
Software Standardization & Tools Engineer
Valeo Switches & Smart Controls
Creteil / +33148845388
stephanie.kouoi.ext@valeo.com

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