It seems that mingw32-make only partially supports the $(MAKE) variable

For example, if I want to run make with multiple jobs (-jN) from within a makefile, I usually write something like this:

    cd subdir && $(MAKE) -f Makefile.mk

Now if I execute the makefile from the command line under Linux like this:

make -j4 -f Makefile.mk

$(MAKE) will contain "make -j4"

While under Windows / CMD.EXE - *no* MSYS, 

it seems that $(MAKE) is forcing "-j 1"

I tried overriding this behavior using MAKEFLAGS and also setting MAKEOVERRIDES =
as described here:

with no luck...

 I can force it by changing the "subdir" target in the makefile to something like:

    cd subdir && mingw32-make -j4 -f Makefile.mk

and it will work.

However, I prefer not doing this.

What am I am missing here?

My make version is 3.82, installed with mingw-get (great tool btw)

Eran Ifrah
Author of codelite a cross platform open source C/C++ IDE: http://www.codelite.org