[Mesa3d-dev] Re: [Mesa3d-cvs] CVS Update: Mesa (branch: mesa_3_4_branch)

[Brian P. <br...@va...>]

"David S. Miller" wrote:
> 
> Brian Paul writes:
>  > Log message:
>  >   use unoptimized COPY_4UBV code on SPARC to avoid memory alignment problems (bug 430689)
> 
> This is surely not a Sparc specific problem.
> 
> Any RISC machine is going to take an exception if you access unaligned
> bytes as a word.  Only on x86 is this optimization going to work
> reliably.
> 
> On some RISC machines, such unaligned loads work from the user's
> perspective, but these "work" by trapping into the kernel to get
> "fixed up".  This could lead to hard to detect performance problems in
> Mesa.
> 
> I would suggest disabling this optimization on all non-x86 systems.

Good point.  Other than x86 I only occasionally test Mesa on a
MIPS-based SGI system- though it hasn't been a problem there (might
just be getting lucky).  But I know that alignment is important on
most RISC systems.  I'll change the test.

-Brian