Mecrisp Ice file downloads

[Bernard Mentink]

Hi there,

i have the latest version building and works with picocom, however files will not upload. Used ctrl-as as suggested, i am prompted for a file, i start typing and tab completion finds the file, but when i press enter it says it can't find it .... any ideas?

Also, is there any way that we can get e4thcom going with mecrisp-ice? and will it work at higher baud rates?
I was getting >900kbaud with swapforth ..

cheers

[Matthias Koch]

Maybe try giving double quotes around the file name?

Sure, you can change the baud rate divider to whatever you like and synthesise a custom bitstream.

I have not used e4thcom with Mecrisp-Ice yet, try it!

[Bernard Mentink]

Nope. Quotes does not work either .. currently I have no way to get a file to this board (hx8k breakout) How did you do it when you tested?

e4thcom does not work either as I don't know if it has a way to toggle DTR

[Bernard Mentink]

.. also, tools were much easier to install with apio .... :) "apio install --all"

[Bernard Mentink]

@m-atthias Any further idea's

[Matthias Koch]

No, sory. I have no further ideas. If you can type manually into the Forth prompt and get reactions, the UART in FPGA is working. I think you have some sort of problem with your terminal emulator. I use picocom with this invocation for file upload on HX8K:

picocom -b 115200 /dev/ttyUSB1 --imap lfcrlf,crcrlf --omap delbs,crlf --send-cmd "ascii-xfr -s -l 30 -n"

Maybe you forgot to install ascii-xfr, which comes in the minicom package on Debian? You can change the bitstream to put reset signal on any pin you wish (or just tie it high internally) to try a different terminal emulator which does not allow to toggle DTR.

[Bernard Mentink]

@m-atthias
Thanks. I have got it working. I do have the ascii-xfr program but it refuses to see the files and upload them ... so I am not using picocom at all.

I modified the reset logic to toggle the reset and then stay high. Now it works (ignoring DTR)
I can now use my favorite com program e4thcom and upload files as usual ...

By the way, I am using the hx8k-breakout board, at the moment for testing.

Thanks for the help.

PS: Will you do a build of mecrisp-ice for the TingFPGA-BX board? I did a port of swapforth for that board and wrote a usb->serial driver to run serial at 921K baud. So I could contribute that code if you like ...

[Matthias Koch]

Glad to know you got it up and running!

PS: Will you do a build of mecrisp-ice for the TingFPGA-BX board? I did a port of swapforth for that board and wrote a usb->serial driver to run serial at 921K baud. So I could contribute that code if you like ...
I do not have the TinyFPGA-BX board but it looks quite similiar in terms of USB to the FOMU on which I use https://github.com/ulixxe/usb_cdc/ as USB serial terminal. I would love to have a look at your code, and if you decide to do a Mecrisp-Ice port to this board, I am happy to include it into the next release.

[Bernard Mentink]

Interesting about usb_cdc module. Do you have an interface wrapper for the top-level of that module?

I wrote an interface wrapper for swapforth to use Luke Valenty's USB module .. that worked well ..
I would like to compare them ..

Cheers

[Matthias Koch]

For the usb_cdc module by ulixxe, no special interface wrapper was necessary:

mecrisp-ice-2.4/fomu/icestorm/j1a.v
mecrisp-ice-2.4/common-verilog/usb_cdc/ -- just a local copy of the repo

I also tried a mix of code for USB logic by Luke Valenty, Lawrie Griffiths and David Williams

https://github.com/tinyfpga/TinyFPGA-Bootloader
https://github.com/lawrie/tiny_usb_examples
https://github.com/davidthings/tinyfpga_bx_usbserial

for which I wrote some custom code to tweak it for working together with Mecrisp-Ice:

mecrisp-ice-2.4/ulx3s-usb-experimental/trellis/j1a.v
mecrisp-ice-2.4/common-verilog/usb/usb_uart_bridge_ep.v

Please let me know the results of your comparison! I found the ulixxe usb_cdc code being more flexible and consuming less resources.

[Bernard Mentink]

@m-atthias
I tried a port of Mecrisp to the Tiny_FPGA_BX board, but with my application in place, I am running out of RAM. Does Mecrisp use more ram than swapforth? It was hard for me to compare, as you define the ram quite different than the way swapforth implements it ..

My usage is:
Info: Device utilisation:
Info: ICESTORM_LC: 6658/ 7680 86%
Info: ICESTORM_RAM: 34/ 32 106%
Info: SB_IO: 13/ 256 5%
Info: SB_GB: 8/ 8 100%
Info: ICESTORM_PLL: 1/ 2 50%
Info: SB_WARMBOOT: 0/ 1 0%

Error is: ERROR: Unable to place cell '_j1.mem.7.3.0_RAM', no BELs remaining to implement cell type 'ICESTORM_RAM'

[Bernard Mentink]

Hmm, seems removing the usbuart code fixes the memory issue. (I was using the swapforth version) .. does your usbuart version not use any RAM?

[Matthias Koch]

Does Mecrisp use more ram than swapforth?

Mecrisp-Ice uses the full 15 kb available of block RAMs on the UP5K, you can change the amount of memory available with the MEMWORDS parameter. If you change it, you also need to change IRQOPCODE parameter in Verilog and in Forth both UNUSED and the location where the interrupt vector is placed in memory, both usually residing in basisdefinitions.fs and examples that wire in their own interrupt handler(s). Mecrisp-Ice itself fits in 8 kb, so you can configure total memory to be anything between 8 kb to 16 kb, the maximum executable size due to instruction set design.

does your usbuart version not use any RAM?

Correct, the ulixxe usb_cdc code decodes and generates packets on the fly without the need for RAM blocks.

Matthias

[Bernard Mentink]

Hi, I don't think I can use the ulixxe usb_cdc code, as it expects a USB driver chip. The Tiny_FPGA_BX board has direct connections to D+ and D-

[Matthias Koch]

I am running ulixxe usb_cdc on the FOMU which is a UP5K with direct connections to D+ and D-. It has no USB driver chip, only a serial SPI flash.

See documentation here, with ready-made examples for TinyFPGA-BX:

https://github.com/ulixxe/usb_cdc/
https://github.com/ulixxe/usb_cdc/tree/main/examples/TinyFPGA-BX

Changing the pin constraint file probably is all you need to port Mecrisp-Ice for FOMU to your Tiny_FPGA_BX board.

Hi, I don't think I can use the ulixxe usb_cdc code, as it expects a USB driver chip. The Tiny_FPGA_BX board has direct connections to D+ and D-

[Bernard Mentink]

Hi, tried porting the FOMU code to TinyFPGA_BX. Fails at ram placement, current ram allocation that works from swap forth is pasted below, would appreciate some guidance in the equivalent allocation in your code. It currently fails when it gets to rambank2 ..

module SB_RAM2048x2(
    output [1:0] RDATA,
    input        RCLK, RCLKE, RE,
    input  [10:0] RADDR,
    input         WCLK, WCLKE, WE,
    input  [10:0] WADDR,
    input  [1:0] MASK, WDATA
);
    parameter INIT_0 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_1 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_2 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_3 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_4 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_5 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_6 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_7 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_8 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_9 = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_A = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_B = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_C = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_D = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_E = 256'h0000000000000000000000000000000000000000000000000000000000000000;
    parameter INIT_F = 256'h0000000000000000000000000000000000000000000000000000000000000000;

  wire [15:0] rd;

  SB_RAM40_4K #(
    .WRITE_MODE(3),
    .READ_MODE(3),
    .INIT_0(INIT_0),
    .INIT_1(INIT_1),
    .INIT_2(INIT_2),
    .INIT_3(INIT_3),
    .INIT_4(INIT_4),
    .INIT_5(INIT_5),
    .INIT_6(INIT_6),
    .INIT_7(INIT_7),
    .INIT_8(INIT_8),
    .INIT_9(INIT_9),
    .INIT_A(INIT_A),
    .INIT_B(INIT_B),
    .INIT_C(INIT_C),
    .INIT_D(INIT_D),
    .INIT_E(INIT_E),
    .INIT_F(INIT_F)
  ) _ram (
    .RDATA(rd),
    .RADDR(RADDR),
    .RCLK(RCLK), .RCLKE(RCLKE), .RE(RE),
    .WCLK(WCLK), .WCLKE(WCLKE), .WE(WE),
    .WADDR(WADDR),
    .MASK(16'h0000), .WDATA({4'b0, WDATA[1], 7'b0, WDATA[0], 3'b0}));

  assign RDATA[0] = rd[3];
  assign RDATA[1] = rd[11];

endmodule

[Matthias Koch]

Swapforth was more or less abandoned by James Bowman a long time ago, when the FOSS flow still was in its early days and had no automatic RAM inference.

Initialised RAM can be defined much easier by now:

// ###### MEMORY ########################################

 wire mem_wr;
 wire [12:0] code_addr;
 reg  [15:0] insn_from_memory;

 reg [15:0] mem [0:MEMWORDS-1]; initial $readmemh("build/iceimage.hex", mem);

 always @(posedge clk) begin
     insn_from_memory  <= mem[code_addr];
     if (mem_wr) mem[io_addr[13:1]] <= io_dout;
 end

Swapforth uses a Python script that fills the initialisation bits for the memory blocks, but it is very inflexible. Better first improve the Swapforth CPU before pushing into new targets.

Matthias

[Bernard Mentink]

Ok, I am out of my depth here ...

I added the usb_cdc code to your HX8k code, which has the same memory layout as the BX, changed pin constraints etc It built fine and flashed the image, but does not work ..

Maybe you could attempt a quick port to the TinyFPGA_BX and I could try it out on my hardware? :) .... You know what you are doing ..... and I am happy to help where I can for this target ..

EDIT: One issue with the BX board, it has a bootloader which is used to flash the image via tinyprog, it does not seem to get out of the way when I try flashing any of your images as above..
(There is a flashing LED when bootloader active)

Swapforth works on the BX by flashing the image that is produced by nextpnr, it does not work using the image from icemulti ...

[Matthias Koch]

tinyfpga-bx has the same UP5K FPGA, and I already have the FOMU port included in Mecrisp-Ice... Why did you start with the HX8K port of Mecrisp-Ice instead of just changing the pin assignments in mecrisp-ice-2.4/fomu/icestorm/fomu-pvt.pcf and recompile?

You find Mecrisp-Ice releases here: https://sourceforge.net/projects/mecrisp/files/

[Bernard Mentink]

I think you might be mistaken, specs are:

• Height: 1.4 inches, width: 0.7 inches
• Programming interface: USB 2.0 full-speed (12 mbit/sec)
• ICE40LP8K FPGA
  • 7,680 four-input look-up-tables
  • 128 KBit block RAM
  • Phase Locked Loop
  • 41 user IO pins
• 8 MBit of SPI Flash
• Onboard 3.3 V (300 mA) and 1.2 V (150 mA) LDO regulators
• Low-Power 16 MHz MEMs Oscillator
  • 1.3 mA power when active
  • 50 ppm stability.

[Bernard Mentink]

That is why I used hx8k for the port. I changed the pin assignments, the
package, the part to lp8k, and used the pll with 16mhz in, 48mhz out...

[Matthias Koch]

Thank you a lot for the correction! I am thinking on it and I hope I find time at the weekend to investigate this. If you like, could you send me a tarball of your efforts so that I can search for possible issues?

[Bernard Mentink]

Hi,

I have attached my efforts so far.

Note: I have used icepll to generate the 48Mhz for the USB. There is also a
"connect" script to run e4thcom terminal, this works fine with my
hx8k-breakout board, but not with the BX. Have fun ..

Bernie

PS: Ignore the j1a* files in the root directory. Forgot to remove them, they are left over from when I was using APIO for the building (which expects all .v files in project root)

I have subsequently modified the apio config, so it search all directories for .v files to include in the build automatically .. works great..

Anyway building with apio or your script, neither produces a working image.

[Bernard Mentink]

Oh, one other thing..

I think icemulti may not be correct for this board, but you will know what
memory/flash layout should look like ..
(icemulti produces a binary that the bootloader does not boot)

EDIT: One thing to check is the Flash chip, on the BX it is an AT255F081, I am not sure what is on the hx8k ..

Using the bin file from icepack, I can confirm that I can light an LED and that the clocks are 48Mhz (usb_clk) and main clock (clk) 24Mhz, as specified, but I can't get a Forth prompt ..

EDIT2: I can confirm the the .bin image is stored in Flash ok. I uploaded the image, turned off power to the board, plugged the USB back in, executed tinyprog -b
which booted the image ... flashing LED (I set a slow 2 second flash to differentiate from bootloader led pattern)
So it seems the issues are related to Forth and maybe memory ....

[Bernard Mentink]

I tried out some of my other verilog modules like pwm/sine wave gen etc, and they all seem to work ok. It seems it is the Forth side that is not working. Does it access flash directly using SPI?, If so, that might need porting if it is a new Flash chip ..

Hope this info helps ..