From: Daniel P. <phi...@bo...> - 2001-07-25 14:43:30
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On Wednesday 25 July 2001 15:57, Juergen Doelle wrote: > I created and tried a patch for SMP which improves the scalability > for dbench on ext2 file system, especially for 8 CPUs. It has a > slight degradation for SMP kernels with 1 and 2 CPUs. > I got the idea for this patch from Anton Blanchard. > > The system used was: > 8 way 700 MHz Intel Xeon, 8x1MB L2 cache, 37 GB disk IBM Ultrastar > 36LZX on Ultra2 SCSI Controller Adaptec AIC-7896. > Main memory was limited to 1680 MB via "mem=" kernel boot parameter. > > > The kernel used was 2.4.5, the patch does the following: > > It aligns the lock variable in the spinlock structure according > to the size of a cacheline of the Xeon processor (32 byte) and > it fills up the space behind the lock with a place holder. > > This prevents that the caches playing ping-pong with cachelines > containing a spinlock and other data which are often accessed. Cool. And the reason the 1 processor (who cares) and 2 processor (care a lot) cases are degraded is that there isn't a lot of ping-ponging, whereas the extra space does exert more pressure on the cache. Now that you've demonstrated the benefit, what going back to where the spinlocks are actually used and trying to get the same effect by rearranging the struct fields? -- Daniel |