From: David W. <dw...@in...> - 2003-06-04 08:37:53
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I've done some work on kernel XIP. The basic principle of operation is that we copy any code which may need to run while the flash chips are in anything but 'read' mode into RAM, and we disable interrupts while the chips are busy. During erases, we poll not only for erase completion but also for pending IRQs. If an IRQ is pending, we suspend the erase operation, re-enable IRQs and call cond_resched(). The flash driver code is fairly simple, although it wants a little bit of cleanup and I want to be convinced that the arch-specific bits are done right before committing it. The arch-specific parts are implemented for XScale only so far, but should be relatively simple to do for new architectures. You need to ensure that parts of kernel code can be loaded into RAM instead of ROM, when marked with the '__xipram' attribute, that the udelay() function is in that section, and also your software TLB handlers if you have them -- or indeed anything else which may be needed in the critical sections of the flash chip driver. I've reintroduced the get_unaligned() macro to potentially-unaligned data loads in the critical region, so alignment fixups do _not_ need to be in RAM. You also need to provide suitable xip_cli(), xip_sti(), and xip_irqpending() functions or macros in include/linux/mtd/xip.h. I suspect that wants moving to include/asm-$(ARCH)/xip.h or similar. It's implemented for Intel command set chips only so far; adding similar support to the other command sets is left as an exercise for the reader. Two patches attached -- the arch-specific patch to 2.4.19-rmk7-pxa1 to provide the generic .xipram support, and the patch against MTD CVS to add the chip support. Comments welcome. -- dwmw2 |