Re: [linuxsh-dev] cache-sh4.c

[NIIBE Y. <gn...@m1...>]

NIIBE Yutaka wrote:
 > The change I've made works well for 7750 (in P2).  With instruction
 > cache enabled (P1), I think that loop works better.

I mean things like this.

2002-03-28  NIIBE Yutaka  <gn...@m1...>

	* arch/sh/mm/clear_page.S (__flush_cache_4096): Only define for
	SH7750.

	* arch/sh/mm/cache-sh4.c (flush_cache_4096): Plain loop for SH7751
	and ST40 (no need to go P2).

Index: arch/sh/mm/cache-sh4.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/cache-sh4.c,v
retrieving revision 1.8
diff -u -3 -p -r1.8 cache-sh4.c
--- arch/sh/mm/cache-sh4.c	27 Mar 2002 09:30:48 -0000	1.8
+++ arch/sh/mm/cache-sh4.c	28 Mar 2002 02:14:09 -0000
@@ -211,6 +211,7 @@ void flush_cache_sigtramp(unsigned long 
 static inline void flush_cache_4096(unsigned long start,
 				    unsigned long phys)
 {
+#if defined(CONFIG_CPU_SUBTYPE_SH7750)
 	register unsigned long addr __asm__ ("r4");
 	register unsigned long data __asm__ ("r0");
 	register unsigned long __r5 __asm__ ("r5") = phys;
@@ -223,6 +224,18 @@ static inline void flush_cache_4096(unsi
 		     : "0" (start), "1" (__flush_cache_4096 + 0x20000000), 
 		       "r" (__r5), "r" (__r6), "r" (__r7)
 		     : "pr");
+#else
+	/*
+	 * SH7751 and ST40 have no restriction to handle cache.
+	 * (While SH7750 must do that at P2 area.)
+	 */
+	unsigned long addr, data;
+	for (addr = start; addr < start + 4096; addr += 32) {
+		data = ctrl_inl(addr)&(0x1ffff000|CACHE_VALID);
+		if (data == phys)
+			ctrl_outl(0, addr);
+	}
+#endif
 }
 
 /*
Index: arch/sh/mm/clear_page.S
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/clear_page.S,v
retrieving revision 1.2
diff -u -3 -p -r1.2 clear_page.S
--- arch/sh/mm/clear_page.S	27 Mar 2002 09:30:48 -0000	1.2
+++ arch/sh/mm/clear_page.S	28 Mar 2002 02:14:09 -0000
@@ -180,14 +180,7 @@ ENTRY(__clear_user_page)
 	 nop
 .L4096:	.word	4096
 
-/*************
-	unsigned long addr, data;
-	for (addr = start; addr < start + 4096; addr += 32) {
-		data = ctrl_inl(addr)&(0x1ffff000|CACHE_VALID);
-		if (data == phys)
-			ctrl_outl(0, addr);
-	}
-*************/
+#if defined(CONFIG_CPU_SUBTYPE_SH7750)
 ENTRY(__flush_cache_4096)
 	.rept	128
 	mov.l	@r4,r0
@@ -206,4 +199,5 @@ ENTRY(__flush_cache_4096)
 	nop
 	rts
 	 nop
+#endif
 #endif