From: M. R. B. <mr...@0x...> - 2002-03-27 15:02:29
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* NIIBE Yutaka <gn...@m1...> on Wed, Mar 27, 2002: > Optimized the flushing.=20 >=20 > There is a requirement in SH4 to control cache from P2 area. P2 area > is the area where cache is not used at all. This means, the cycles > for instruction could be quite large. In other word, if we could > save number of instructions, we see performance improvement. >=20 > I've done: Four --> Three instruction fetch per single cache line flush. >=20 Wow ... were you planning on merging these with linux-2_4-branch also? For this and your other changes, do you have numbers to show your improvements? Thanks, M. R. |