From: M. R. B. <mr...@0x...> - 2002-03-15 04:53:55
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Paul and I have been trying to determine the best fit for the SH-5 port for 2.5. The problem lies in the SH-5's (and SH-6's) addressing - it's 32-bit versus 64-bit, so the standard kernel convention for a 64-bit port doesn't necessarily qualify it as "sh64" (but hey, we're kernel hackers, we can bend the rules :P). Moving the SH-5 port in with the sh/ arch is a challenge, but the problem is trying to plan for structuring future SH processors. Will the SH-7 and SH-8 retain the SHmedia instructions and 32-bit addressing? Or will Hitachi have a change of mind and switch to 64-bit addressing if the market calls for it? If future SH processors are "true" 64-bit machines (well addressing at least), then it makes sense for the SH-5 and SH-6 to live with the SH-3 and SH-4 code, but if the SH-7 and SH-8 retain current SHmedia and 32-bit addressing (e.g. they won't differ "externally" from the SH-5 or SH-6), then it makes sense for all SHmedia capable processors to live in "sh64". This is why we need a bit of clarification (if at all possible) of the plans to stick with 32-bit addressing, so it'll potentially save us some work down the road. Is this making sense to people? We need your insights and suggestions before we can make the formal proposal of SH-5 inclusion :). Thanks, M. R. |