Re: [linuxsh-dev] SH-4 cache problem?

[SUGIOKA T. <su...@it...>]

At 19:59 01/08/07 +0900, NIIBE Yutaka <gn...@m1...> wrote:
>SUGIOKA Toshinobu wrote:
> > Yes. it works with your patch. but performance seems went bad.
> > I think unneeded cache flush occur on simple TLB miss exception.
>
>I see.  How about this one.
>
>	* include/asm-sh/pgtable.h (PG_mapped): Renamed from
>	PG_mapped_with_alias.
>	(__flush_cache_page): Removed last argument, and add first arg.
>	* arch/sh/mm/cache-sh4.c (__flush_cache_page): Take u0 address
>	as first argument.  Don't care about I-cache.
>	(flush_dcache_page): Follow the change.
>
>	* include/asm-sh/ide.h (ide_insw): Removed.
>	* drivers/cdrom/gdrom.c (gdrom_intr): Remove __flush_wback_region.
>
>	* arch/sh/mm/fault.c (update_mmu_cache): Flush the cache when first
>	mapped, even if it has no alias.  (We needed this to for NFS).

Yes. This works good, nice performance.

----
SUGIOKA Toshinobu