From: Gareth S. L. <ga...@el...> - 2001-07-10 13:42:07
|
In message <200...@we...> Barkuson <bar...@ya...> wrote: > Thanks, Doug. > > /RDY was pulled up by an FPGA pin. After adding a > pulled down resister, the cpu now reads from the Flash > and executing the sh-ipl now (well not quite, still > need to set up the SDRAM). Thanks again. A little tip that I found useful - if you modify the CCR initialisation to use part of the cache as memory mapped RAM, you can use this area for the IPL's stack and variable storage - then you can use the debugger to test the presence of the SDRAM in area 2 or 3 without having to reflash all the time. -- Gatch |