Re: [linuxsh-dev] BUG fix for VMALLOC-ed page

[Greg B. <gb...@po...>]

NIIBE Yutaka wrote:
> 
> SH-4 TLB has feature to "wire" the entry (never been flush out, kind
> of executive class seat).

  ;-)

>  It could be used for accesssing Area 5 or
> Area 6 as PCMCIA. 

  Yep.

> I think that it's fair enough to allocate wired
> entries for PCMCIA.

  If you're using PCMCIA, yes.  But the BIOS does not (in general)
know whether the kernel will want to use the PCMCIA space, e.g. if 
no cards are inserted, or all cards are removed after boot.  In that
case you've got perhaps 6 ( cards * common, attribute, and I/O) TLB
entries out of a system total of 64 sitting around doing nothing while
the kernel is fielding extra page faults because the TLB is missed
slightly more often.

>  If accessing I/O would cause TLB-miss, it's hard
> for device drivers writer to implement routines.  Most drivers are
> not ready, I guess, and not required to be so.

  Good point, it might do bad things to timing I guess.

  But couldn't the PCMCIA TLB entries be wired into the TLB as a side
effect of the driver calling CardServices(RequestIO,) ?  I assume this
somehow trickles down into modifying TLB entries, because PCMCIA drivers can
request the mappings to be 8 or 16 bit which needs to be reflected in
the SA bits.

> When some machine designer implements hardware initialization routine
> in BIOS to enable "wired" TLB entries, we should not ignore these
> entries.  We should be conservative here.
> 
> I think that there're certainly such cases, it's very similar to BSC
> setting.

  So the idea is, instead of just writing a known value to MMUCR you
first check and preserve the URB bits, thus giving the BIOS the opportunity
to hardcode some TLB entries for ever?

> 
> This is our point.  See?

  Well I think I understand the reasoning now, but I'm still not sure I agree.

Greg.
-- 
These are my opinions not PPIs.