[linuxsh-dev] Assorted patches for Linux kernel, and the stub.

[NIIBE Y. <gn...@ch...>]

NIIBE Yutaka wrote:
 > Well done.  Please check them (except the Load Memory Addresses thing)
 > in.  May I ask you to incorporate changes of sh-sci.c,h done by
 > Stuart?

I've misunderstood the situation.  The patch is by Takeshi.  I've just
checked in following patch.

2000-07-20  YAEGASHI Takeshi  <yae...@ma...>

	* sh-sci.h (PORT_IRDA, SH3_IRDA_IRQS): New definition.
	(SCI_INIT, SCI_NPORTS): Fixed for CONFIG_CPU_SUBTYPE_SH7708.

	* sh-sci.c (sci_init_pins_irda): New Function.

Index: drivers/char/sh-sci.c
===================================================================
RCS file: /cvsroot/linuxsh/kernel/drivers/char/sh-sci.c,v
retrieving revision 1.11
diff -u -r1.11 sh-sci.c
--- drivers/char/sh-sci.c	2000/07/04 09:45:19	1.11
+++ drivers/char/sh-sci.c	2000/07/20 05:30:57
@@ -62,6 +62,7 @@
 #ifndef SCI_ONLY
 static void sci_init_pins_scif(struct sci_port* port, unsigned int cflag);
 #endif
+static void sci_init_pins_irda(struct sci_port* port, unsigned int cflag);
 static void sci_disable_tx_interrupts(void *ptr);
 static void sci_enable_tx_interrupts(void *ptr);
 static void sci_disable_rx_interrupts(void *ptr);
@@ -138,6 +139,16 @@
 		/* Set /RTS2 (bit6) = 0 */
 		ctrl_outb(data&0xbf, SCPDR);
 	}
+	sci_out(port, SCFCR, fcr_val);
+}
+
+static void sci_init_pins_irda(struct sci_port* port, unsigned int cflag)
+{
+	unsigned int fcr_val = 0;
+
+	if (cflag & CRTSCTS)
+		fcr_val |= SCFCR_MCE;
+
 	sci_out(port, SCFCR, fcr_val);
 }
 
Index: drivers/char/sh-sci.h
===================================================================
RCS file: /cvsroot/linuxsh/kernel/drivers/char/sh-sci.h,v
retrieving revision 1.9
diff -u -r1.9 sh-sci.h
--- drivers/char/sh-sci.h	2000/06/22 17:52:03	1.9
+++ drivers/char/sh-sci.h	2000/07/20 05:30:57
@@ -13,6 +13,7 @@
 /* Values for sci_port->type */
 #define PORT_SCI  0
 #define PORT_SCIF 1
+#define PORT_IRDA 1		/* XXX: temporary assignment */
 
 /* Offsets into the sci_port->irqs array */
 #define SCIx_ERI_IRQ 0
@@ -22,6 +23,7 @@
 /*                     ERI, RXI, TXI,   INTC reg, INTC pos */
 #define SCI_IRQS      { 23,  24,  25 }, INTC_IPRB, 1
 #define SH3_SCIF_IRQS { 56,  57,  59 }, INTC_IPRE, 1
+#define SH3_IRDA_IRQS { 52,  53,  55 }, INTC_IPRE, 2
 #define SH4_SCIF_IRQS { 40,  41,  43 }, INTC_IPRC, 1
 
 #if defined(CONFIG_CPU_SUBTYPE_SH7708)
@@ -33,21 +35,11 @@
 # define SCSCR_INIT(port)          0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
 # define SCI_ONLY
 #elif defined(CONFIG_CPU_SUBTYPE_SH7709)
-# define SCI_NPORTS 2
-# define SCI_INIT { \
-  { {}, PORT_SCI,  0xfffffe80, SCI_IRQS,      sci_init_pins_sci  }, \
-  { {}, PORT_SCIF, 0xA4000150, SH3_SCIF_IRQS, sci_init_pins_scif }  \
-}
-# define SCPCR  0xA4000116 /* 16 bit SCI and SCIF */
-# define SCPDR  0xA4000136 /* 8  bit SCI and SCIF */
-# define SCSCR_INIT(port)          0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
-# define SCI_AND_SCIF
-#elif defined(CONFIG_CPU_SUBTYPE_SH7709A)
 # define SCI_NPORTS 3
 # define SCI_INIT { \
   { {}, PORT_SCI,  0xfffffe80, SCI_IRQS,        sci_init_pins_sci  }, \
-  { {}, PORT_SCIF, 0xA4000150, 7709A_SCIF_IRQS, sci_init_pins_scif }  \
-  { {}, PORT_SCIF, 0xA4000140, 7709A_IRDA_IRQS, sci_init_pins_irda }  \
+  { {}, PORT_SCIF, 0xA4000150, SH3_SCIF_IRQS, sci_init_pins_scif },   \
+  { {}, PORT_SCIF, 0xA4000140, SH3_IRDA_IRQS, sci_init_pins_irda }    \
 }
 # define SCPCR  0xA4000116 /* 16 bit SCI and SCIF */
 # define SCPDR  0xA4000136 /* 8  bit SCI and SCIF */