[linuxsh-dev] SH-3 clock operationg mode

[YAEGASHI T. <yae...@ma...>]

>Some comment lines needed(pointed out by Mitch) are not included
>yet.  I found some mistakes in CPG table of SH-3 in time.c, so
>I'll submit a patch which corrects them with comments later.

Hmm... is there any way to inspect current clock operating mode,
or to sense MD pins?

--
YAEGASHI Takeshi <yae...@ma...>

You cat get this patch at:
	http://sourceforge.net/patch/download.php?id=100543

Index: arch/sh/config.in
===================================================================
RCS file: /cvsroot/linuxsh/kernel/arch/sh/config.in,v
retrieving revision 1.7
diff -u -r1.7 config.in
--- arch/sh/config.in	2000/06/10 21:45:03	1.7
+++ arch/sh/config.in	2000/06/10 23:33:19
@@ -36,6 +36,11 @@
    define_bool CONFIG_CPU_SH3 n
    define_bool CONFIG_CPU_SH4 y
 fi
+if [ "$CONFIG_SH_HP600" = "y" ]; then
+define_int CONFIG_CLOCK_MODE 3
+else
+int 'Clock operating mode' CONFIG_CLOCK_MODE 0
+fi
 bool 'Little Endian' CONFIG_LITTLE_ENDIAN
 if [ "$CONFIG_SH_SOLUTION_ENGINE" = "y" -o "$CONFIG_SH_HP600" = "y" ]; then
   define_hex CONFIG_MEMORY_START 0c000000
Index: arch/sh/kernel/time.c
===================================================================
RCS file: /cvsroot/linuxsh/kernel/arch/sh/kernel/time.c,v
retrieving revision 1.10
diff -u -r1.10 time.c
--- arch/sh/kernel/time.c	2000/06/10 21:45:18	1.10
+++ arch/sh/kernel/time.c	2000/06/10 23:33:20
@@ -389,7 +389,7 @@
 #if defined(__sh3__)
 	static int ifc_table[] = { 1, 2, 4, 1, 3, 1, 1, 1 };
 	static int pfc_table[] = { 1, 2, 4, 1, 3, 6, 1, 1 };
-	static int stc_table[] = { 1, 2, 3, 4, 6, 8, 1, 1 };
+	static int stc_table[] = { 1, 2, 4, 8, 3, 6, 1, 1 };
 #elif defined(__SH4__)
 	static int ifc_table[] = { 1, 2, 3, 4, 6, 8, 1, 1 };
 #define bfc_table ifc_table	/* Same */
@@ -421,12 +421,31 @@
 		tmp  = (frqcr & 0x2000) >> 11;
 		tmp |= frqcr & 0x0003;
 		pfc = pfc_table[tmp];
-#ifdef CONFIG_SH_HP600
-		master_clock = cpu_clock/6;
+		/* In the following master_clock and bus_clock are
+                   corresponding to outputs of PLL1 and PLL2, respectively. */
+#if 0
+		printk("frqcr=0x%x, stc=%d, ifc=%d, pfc=%d\n", frqcr, stc, ifc, pfc);
+#endif
+#if CONFIG_CLOCK_MODE == 0 || CONFIG_CLOCK_MODE == 7 || \
+    CONFIG_CLOCK_MODE == 1 || CONFIG_CLOCK_MODE == 2
+		master_clock = cpu_clock*ifc;
+		bus_clock = master_clock/stc;
+		module_clock = master_clock/pfc;
+#elif CONFIG_CLOCK_MODE == 3 || CONFIG_CLOCK_MODE == 4
+		if (frqcr & 0x0080) {
+			/* PLL1 is on */
+			master_clock = cpu_clock*ifc;
+			bus_clock = master_clock/stc;
+		}
+		else {
+			/* PLL1 is off */
+			master_clock = 0;
+			bus_clock = cpu_clock*ifc;
+		}
+		module_clock = bus_clock/pfc;
 #else
-		master_clock = cpu_clock;
+#error Unsupported clock mode(check CONFIG_CLOCK_MODE)
 #endif
-		bus_clock = master_clock/pfc;
 	}
 #elif defined(__SH4__)
 	{
@@ -437,11 +456,11 @@
 		pfc = pfc_table[frqcr & 0x0007];
 		master_clock = cpu_clock * ifc;
 		bus_clock = master_clock/bfc;
+		module_clock = master_clock/pfc;
 	}
 #endif
 	printk("Bus clock: %d.%02dMHz\n",
 	       (bus_clock/1000000), (bus_clock % 1000000)/10000);
-	module_clock = master_clock/pfc;
 	printk("Module clock: %d.%02dMHz\n",
 	       (module_clock/1000000), (module_clock % 1000000)/10000);
 	interval = (module_clock/(HZ*4));