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[linuxsh-dev] Re: Solution Engin's ATA PC-card enabler
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From: NIIBE Y. <gn...@ch...> - 2000-06-07 09:53:14
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OK. I'll leave the changes of io_se.c to confirm the intention of
changes. At this stage, it seems for me that setting sh_pcic_XXX
variables would be better placed in cf-enabler.c.
Since he doesn't have CVS access, I'll commit following changes.
2000-06-07 Toshiharu Nozawa <no...@hi...>
Compact Flash Support for SolutionEngine.
* arch/sh/kernel/cf-enabler.c (cf_init): Implemented for
SolutionEngine.
* include/asm-sh/hitachi_se.h (PA_MRSHPC_*, MRSHPC_*): Added.
* arch/sh/config.in: SolutionEngine may use enabler.
2000-06-02 NIIBE Yutaka <gn...@m1...>
* arch/sh/kernel/entry.S (Throughout): Use ".align 2" instead
Index: arch/sh/config.in
===================================================================
RCS file: /cvsroot/linuxsh/kernel/arch/sh/config.in,v
retrieving revision 1.5
diff -u -r1.5 config.in
--- arch/sh/config.in 2000/05/04 06:32:44 1.5
+++ arch/sh/config.in 2000/06/07 09:41:53
@@ -61,8 +61,8 @@
bool 'Networking support' CONFIG_NET
-if [ "$CONFIG_SH_SOLUTION_ENGINE" != "y" ]; then
- bool 'Directly Connected Compact Flash support' CONFIG_CF_ENABLER
+if [ "$CONFIG_SH_GENERIC" = "y" -o "$CONFIG_SH_SOLUTION_ENGINE" = "y" ]; then
+ bool 'Compact Flash Enabler support' CONFIG_CF_ENABLER
fi
bool 'PCI support' CONFIG_PCI
Index: arch/sh/kernel/cf-enabler.c
===================================================================
RCS file: /cvsroot/linuxsh/kernel/arch/sh/kernel/cf-enabler.c,v
retrieving revision 1.1.1.1
diff -u -r1.1.1.1 cf-enabler.c
--- arch/sh/kernel/cf-enabler.c 2000/04/14 16:49:01 1.1.1.1
+++ arch/sh/kernel/cf-enabler.c 2000/06/07 09:41:53
@@ -3,17 +3,79 @@
* linux/drivers/block/cf-enabler.c
*
* Copyright (C) 1999 Niibe Yutaka
+ * Copyright (C) 2000 Toshiharu Nozawa
*
* Enable the CF configuration.
*/
+#include <linux/config.h>
#include <linux/init.h>
#include <asm/io.h>
#include <asm/irq.h>
+#ifdef CONFIG_SH_SOLUTION_ENGINE
+#include <asm/hitachi_se.h>
+/*
+ * 0xB8400000 : Common Memory
+ * 0xB8500000 : Attribute
+ * 0xB8600000 : I/O
+ */
+
+int __init cf_init(void)
+{
+ if ((ctrl_inw(MRSHPC_CSR) & 0x000c) != 0)
+ return 0; /* Not detected */
+
+ if ((ctrl_inw(MRSHPC_CSR) & 0x0080) == 0) {
+ ctrl_outw(0x0674, MRSHPC_CPWCR); /* Card Vcc is 3.3v? */
+ } else {
+ ctrl_outw(0x0678, MRSHPC_CPWCR); /* Card Vcc is 5V */
+ }
+
+ /*
+ * PC-Card window open
+ * flag == COMMON/ATTRIBUTE/IO
+ */
+ /* common window open */
+ ctrl_outw(0x8a84, MRSHPC_MW0CR1);/* window 0xb8400000 */
+ if((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
+ /* common mode & bus width 16bit SWAP = 1*/
+ ctrl_outw(0x0b00, MRSHPC_MW0CR2);
+ else
+ /* common mode & bus width 16bit SWAP = 0*/
+ ctrl_outw(0x0300, MRSHPC_MW0CR2);
+
+ /* attribute window open */
+ ctrl_outw(0x8a85, MRSHPC_MW1CR1);/* window 0xb8500000 */
+ if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
+ /* attribute mode & bus width 16bit SWAP = 1*/
+ ctrl_outw(0x0a00, MRSHPC_MW1CR2);
+ else
+ /* attribute mode & bus width 16bit SWAP = 0*/
+ ctrl_outw(0x0200, MRSHPC_MW1CR2);
+
+ /* I/O window open */
+ ctrl_outw(0x8a86, MRSHPC_IOWCR1);/* I/O window 0xb8600000 */
+ ctrl_outw(0x0008, MRSHPC_CDCR); /* I/O card mode */
+ if ((ctrl_inw(MRSHPC_CSR) & 0x4000) != 0)
+ ctrl_outw(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/
+ else
+ ctrl_outw(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/
+
+ ctrl_outw(0x2000, MRSHPC_ICR);
+ ctrl_outb(0x00, PA_MRSHPC_MW2 + 0x206);
+ ctrl_outb(0x42, PA_MRSHPC_MW2 + 0x200);
+ return 0;
+}
+#else /* then generic system type */
#define CF_CIS_BASE 0xb8000000
/*
+ * You can connect Compact Flash directly to the bus of SuperH.
+ * This is the enabler for that.
+ */
+
+/*
* 0xB8000000 : Attribute
* 0xB8001000 : Common Memory
* 0xBA000000 : I/O
@@ -21,10 +83,12 @@
int __init cf_init(void)
{
+ /* Enable the card, and set the level interrupt */
outw(0x0042, CF_CIS_BASE+0x0200);
make_imask_irq(14);
disable_irq(14);
return 0;
}
+#endif
__initcall (cf_init);
Index: arch/sh/kernel/io_se.c
===================================================================
RCS file: /cvsroot/linuxsh/kernel/arch/sh/kernel/io_se.c,v
retrieving revision 1.4
diff -u -r1.4 io_se.c
--- arch/sh/kernel/io_se.c 2000/05/07 23:31:58 1.4
+++ arch/sh/kernel/io_se.c 2000/06/07 09:41:53
@@ -7,7 +7,6 @@
* I/O routine for Hitachi SolutionEngine.
*
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/types.h>
Index: arch/sh/kernel/irq.c
===================================================================
RCS file: /cvsroot/linuxsh/kernel/arch/sh/kernel/irq.c,v
retrieving revision 1.8
diff -u -r1.8 irq.c
--- arch/sh/kernel/irq.c 2000/05/14 08:41:25 1.8
+++ arch/sh/kernel/irq.c 2000/06/07 09:41:54
@@ -13,6 +13,7 @@
* Naturally it's not a 1:1 relation, but there are similarities.
*/
+#include <linux/config.h>
#include <linux/ptrace.h>
#include <linux/errno.h>
#include <linux/kernel_stat.h>
Index: include/asm-sh/hitachi_se.h
===================================================================
RCS file: /cvsroot/linuxsh/kernel/include/asm-sh/hitachi_se.h,v
retrieving revision 1.2
diff -u -r1.2 hitachi_se.h
--- include/asm-sh/hitachi_se.h 2000/05/09 00:14:00 1.2
+++ include/asm-sh/hitachi_se.h 2000/06/07 09:42:00
@@ -39,6 +39,22 @@
#define PA_BCR 0xb1400000 /* FPGA */
#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controler */
+#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */
+#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */
+#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */
+#define MRSHPC_OPTION (PA_MRSHPC + 6)
+#define MRSHPC_CSR (PA_MRSHPC + 8)
+#define MRSHPC_ISR (PA_MRSHPC + 10)
+#define MRSHPC_ICR (PA_MRSHPC + 12)
+#define MRSHPC_CPWCR (PA_MRSHPC + 14)
+#define MRSHPC_MW0CR1 (PA_MRSHPC + 16)
+#define MRSHPC_MW1CR1 (PA_MRSHPC + 18)
+#define MRSHPC_IOWCR1 (PA_MRSHPC + 20)
+#define MRSHPC_MW0CR2 (PA_MRSHPC + 22)
+#define MRSHPC_MW1CR2 (PA_MRSHPC + 24)
+#define MRSHPC_IOWCR2 (PA_MRSHPC + 26)
+#define MRSHPC_CDCR (PA_MRSHPC + 28)
+#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
#define BCR_ILCRA (PA_BCR + 0)
#define BCR_ILCRB (PA_BCR + 2)
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