From: NIIBE Y. <gn...@ch...> - 2000-04-22 01:03:31
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There were two bugs in time.c. When CF (carry flag) is set during reading value from RTC, we have to read it again. Clearing CF-bit should be in the loop, if not, it'd result loop forever. And setting of RCR2 was wrong. We need to set RTCEN bit when start. I'll commit it soon. Index: ChangeLog =================================================================== RCS file: /cvsroot/linuxsh/kernel/ChangeLog,v retrieving revision 1.6 diff -u -r1.6 ChangeLog --- ChangeLog 2000/04/20 22:24:13 1.6 +++ ChangeLog 2000/04/22 00:47:04 @@ -1,3 +1,14 @@ +2000-04-21 NIIBE Yutaka <gn...@m1...> + + * arch/sh/kernel/time.c (RCR1_*, RCR2_*): Defined. + (set_rtc_time, get_rtc_time, get_cpu_mhz): Use them. + + * arch/sh/kernel/time.c (get_rtc_time): Bug fix. Clear CF-bit every + time. Set RCR2_RTCEN to start RTC. + + * include/asm-sh/elf.h (SET_PERSONALITY): Follow the change + of 2.3.99-pre6-3. + 2000-04-20 NIIBE Yutaka <gn...@m1...> Change how to set syscall_nr. Index: arch/sh/kernel/time.c =================================================================== RCS file: /cvsroot/linuxsh/kernel/arch/sh/kernel/time.c,v retrieving revision 1.2 diff -u -r1.2 time.c --- arch/sh/kernel/time.c 2000/04/15 07:08:02 1.2 +++ arch/sh/kernel/time.c 2000/04/22 00:47:06 @@ -33,6 +33,23 @@ #define TMU0_TCR_INIT 0x0020 #define TMU_TSTR_INIT 1 +/* RCR1 Bits */ +#define RCR1_CF 0x80 /* Carry Flag */ +#define RCR1_CIE 0x10 /* Carry Interrupt Enable */ +#define RCR1_AIE 0x08 /* Alarm Interrupt Enable */ +#define RCR1_AF 0x01 /* Alarm Flag */ + +/* RCR2 Bits */ +#define RCR2_PEF 0x80 /* PEriodic interrupt Flag */ +#define RCR2_PESMASK 0x70 /* Periodic interrupt Set */ +#define RCR2_RTCEN 0x08 /* ENable RTC */ +#define RCR2_ADJ 0x04 /* ADJustment (30-second) */ +#define RCR2_RESET 0x02 /* Reset bit */ +#define RCR2_START 0x01 /* Start bit */ + +#define RTC_IRQ 22 +#define RTC_IPR_OFFSET 0 + #if defined(__sh3__) #define TMU_TOCR 0xfffffe90 /* Byte access */ #define TMU_TSTR 0xfffffe92 /* Byte access */ @@ -43,9 +60,6 @@ #define FRQCR 0xffffff80 -#define RTC_IRQ 22 -#define RTC_IPR_OFFSET 0 - /* SH-3 RTC */ #define R64CNT 0xfffffec0 #define RSECCNT 0xfffffec2 @@ -74,9 +88,6 @@ #define FRQCR 0xffc00000 -#define RTC_IRQ 22 -#define RTC_IPR_OFFSET 0 - /* SH-4 RTC */ #define R64CNT 0xffc80000 #define RSECCNT 0xffc80004 @@ -149,7 +160,7 @@ int retval = 0; int real_seconds, real_minutes, cmos_minutes; - ctrl_outb(0x02, RCR2); /* reset pre-scaler & stop RTC */ + ctrl_outb(RCR2_RESET, RCR2); /* Reset pre-scaler & stop RTC */ cmos_minutes = ctrl_inb(RMINCNT); BCD_TO_BIN(cmos_minutes); @@ -178,7 +189,7 @@ retval = -1; } - ctrl_outb(0x01, RCR2); /* start RTC */ + ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start RTC */ return retval; } @@ -283,8 +294,8 @@ unsigned int sec, min, hr, wk, day, mon, yr, yr100; again: - ctrl_outb(0x01, RCR1); /* clear CF bit */ do { + ctrl_outb(0, RCR1); /* Clear CF-bit */ sec = ctrl_inb(RSECCNT); min = ctrl_inb(RMINCNT); hr = ctrl_inb(RHRCNT); @@ -299,7 +310,7 @@ yr = ctrl_inb(RYRCNT); yr100 = (yr == 0x99) ? 0x19 : 0x20; #endif - } while ((ctrl_inb(RCR1) & 0x80) != 0); + } while ((ctrl_inb(RCR1) & RCR1_CF) != 0); BCD_TO_BIN(yr100); BCD_TO_BIN(yr); @@ -313,7 +324,7 @@ hr > 23 || min > 59 || sec > 59) { printk(KERN_ERR "SH RTC: invalid value, resetting to 1 Jan 2000\n"); - ctrl_outb(0x02, RCR2); /* reset, stop */ + ctrl_outb(RCR2_RESET, RCR2); /* Reset & Stop */ ctrl_outb(0, RSECCNT); ctrl_outb(0, RMINCNT); ctrl_outb(0, RHRCNT); @@ -325,7 +336,7 @@ #else ctrl_outb(0, RYRCNT); #endif - ctrl_outb(0x01, RCR2); /* start */ + ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start */ goto again; } @@ -339,7 +350,7 @@ sti(); do {} while (ctrl_inb(R64CNT) != 0); - ctrl_outb(0x11, RCR1); + ctrl_outb(RCR1_CIE, RCR1); /* Enable carry interrupt */ asm volatile( "1:\t" "tst %1,%1\n\t" @@ -373,7 +384,7 @@ static void rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs) { - ctrl_outb(0x01, RCR1); + ctrl_outb(0, RCR1); /* Disable Carry Interrupts */ regs->regs[0] = 1; } |