From: Paul M. <le...@us...> - 2006-09-07 06:55:05
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Update of /cvsroot/linuxsh/linux/arch/sh/mm In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv13078/arch/sh/mm Modified Files: cache-sh4.c Log Message: IRQs disabling in flush_cache_4096 for cache purge. Under certain workloads we would get an IRQ in the middle of a purge operation, and the cachelines would remain in an inconsistent state, leading to occasional stack corruption, debugged by Takeo Takahashi <tak...@re...>. Index: cache-sh4.c =================================================================== RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/cache-sh4.c,v retrieving revision 1.39 retrieving revision 1.40 diff -u -d -r1.39 -r1.40 --- cache-sh4.c 21 Aug 2006 02:20:15 -0000 1.39 +++ cache-sh4.c 7 Sep 2006 06:55:02 -0000 1.40 @@ -221,22 +221,20 @@ static inline void flush_cache_4096(unsigned long start, unsigned long phys) { + unsigned long flags, exec_offset = 0; + /* * All types of SH-4 require PC to be in P2 to operate on the I-cache. * Some types of SH-4 require PC to be in P2 to operate on the D-cache. */ if ((cpu_data->flags & CPU_HAS_P2_FLUSH_BUG) || - (start < CACHE_OC_ADDRESS_ARRAY)) { - unsigned long flags; + (start < CACHE_OC_ADDRESS_ARRAY)) + exec_offset = 0x20000000; - local_irq_save(flags); - __flush_cache_4096(start | SH_CACHE_ASSOC, - P1SEGADDR(phys), 0x20000000); - local_irq_restore(flags); - } else { - __flush_cache_4096(start | SH_CACHE_ASSOC, - P1SEGADDR(phys), 0); - } + local_irq_save(flags); + __flush_cache_4096(start | SH_CACHE_ASSOC, + P1SEGADDR(phys), exec_offset); + local_irq_restore(flags); } /* |