From: Paul M. <le...@us...> - 2006-08-10 10:24:35
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Update of /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/sh4 In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv7459/arch/sh/kernel/cpu/sh4 Modified Files: probe.c Log Message: Figure out the cache desc entry_mask at runtime, and remove hard-coded assumption about the cacheline size. Index: probe.c =================================================================== RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/sh4/probe.c,v retrieving revision 1.10 retrieving revision 1.11 diff -u -d -r1.10 -r1.11 --- probe.c 10 Aug 2006 10:05:46 -0000 1.10 +++ probe.c 10 Aug 2006 10:24:31 -0000 1.11 @@ -38,7 +38,6 @@ */ cpu_data->icache.way_incr = (1 << 13); cpu_data->icache.entry_shift = 5; - cpu_data->icache.entry_mask = 0x1fe0; cpu_data->icache.sets = 256; cpu_data->icache.ways = 1; cpu_data->icache.linesz = L1_CACHE_BYTES; @@ -48,7 +47,6 @@ */ cpu_data->dcache.way_incr = (1 << 14); cpu_data->dcache.entry_shift = 5; - cpu_data->dcache.entry_mask = 0x3fe0; cpu_data->dcache.sets = 512; cpu_data->dcache.ways = 1; cpu_data->dcache.linesz = L1_CACHE_BYTES; @@ -173,21 +171,26 @@ size = sizes[(cvr >> 20) & 0xf]; cpu_data->icache.way_incr = (size >> 1); cpu_data->icache.sets = (size >> 6); - cpu_data->icache.entry_mask = - (cpu_data->icache.way_incr - (1 << 5)); + } + /* Setup the rest of the I-cache info */ + cpu_data->icache.entry_mask = cpu_data->icache.way_incr - + cpu_data->icache.linesz; + cpu_data->icache.way_size = cpu_data->icache.sets * cpu_data->icache.linesz; + /* And the rest of the D-cache */ if (cpu_data->dcache.ways > 1) { size = sizes[(cvr >> 16) & 0xf]; cpu_data->dcache.way_incr = (size >> 1); cpu_data->dcache.sets = (size >> 6); - cpu_data->dcache.entry_mask = - (cpu_data->dcache.way_incr - (1 << 5)); } + cpu_data->dcache.entry_mask = cpu_data->dcache.way_incr - + cpu_data->dcache.linesz; + cpu_data->dcache.way_size = cpu_data->dcache.sets * cpu_data->dcache.linesz; @@ -209,11 +212,14 @@ cpu_data->scache.way_incr = (1 << 16); cpu_data->scache.entry_shift = 5; - cpu_data->scache.entry_mask = 0xffe0; cpu_data->scache.ways = 4; cpu_data->scache.linesz = L1_CACHE_BYTES; + cpu_data->scache.entry_mask = + (cpu_data->scache.way_incr - cpu_data->scache.linesz); cpu_data->scache.sets = size / (cpu_data->scache.linesz * cpu_data->scache.ways); + cpu_data->scache.way_size = + (cpu_data->scache.sets * cpu_data->scache.linesz); } return 0; |