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From: Paul M. <le...@us...> - 2006-08-07 02:14:12
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Update of /cvsroot/linuxsh/linux/arch/sh/boards/dreamcast In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv568/arch/sh/boards/dreamcast Modified Files: irq.c Log Message: No need to toggle interrupts for IRQ enable/disable(), the generic hardirq framework already takes care of the locking and IRQ management for us. Index: irq.c =================================================================== RCS file: /cvsroot/linuxsh/linux/arch/sh/boards/dreamcast/irq.c,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- irq.c 26 Aug 2005 20:12:14 -0000 1.5 +++ irq.c 7 Aug 2006 02:14:09 -0000 1.6 @@ -10,7 +10,6 @@ */ #include <linux/irq.h> - #include <asm/io.h> #include <asm/irq.h> #include <asm/dreamcast/sysasic.h> @@ -57,29 +56,23 @@ /* Disable the hardware event by masking its bit in its EMR */ static inline void disable_systemasic_irq(unsigned int irq) { - unsigned long flags; __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); __u32 mask; - local_irq_save(flags); mask = inl(emr); mask &= ~(1 << EVENT_BIT(irq)); outl(mask, emr); - local_irq_restore(flags); } /* Enable the hardware event by setting its bit in its EMR */ static inline void enable_systemasic_irq(unsigned int irq) { - unsigned long flags; __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); __u32 mask; - local_irq_save(flags); mask = inl(emr); mask |= (1 << EVENT_BIT(irq)); outl(mask, emr); - local_irq_restore(flags); } /* Acknowledge a hardware event by writing its bit back to its ESR */ |