Re: rts7751r2d cf_ide rework

[Paul M. <le...@li...>]

On Thu, Nov 08, 2007 at 05:30:08PM +0900, Magnus Damm wrote:
> On Nov 7, 2007 12:06 PM, Paul Mundt <le...@li...> wrote:
> > On Wed, Nov 07, 2007 at 11:38:42AM +0900, Magnus Damm wrote:
> > > I'm guessing that something is wrong with trigger level. The R2D-1
> > > documentation does say something about the CF IDE interrupt level to
> > > be H while the rest of the sources are L what ever that means. I don't
> > > think we can control it in the FPGA either.
> > >
> > That suggestions that R2D-1 is using level high. It's possible to set the
> > sense selection on this already at request_irq() time, blackfin ended up
> > having to do this, and so added the ability to pass on IRQ flags via
> > private data. See pata_platform_info->irq_flags in linux/pata_platform.h.
> > I suppose we should be setting the sense selection level high for all of
> > the R2D boards, in that case.
> 
> But does setting these flags really change anything in the interrupt
> code? There are unfortunately no registers to set the actual sense
> configuration in the fpga so whatever you pass to request_irq() will
> be ignored since we have no means to change the sense settings.
> 
No, if the IRQ controller has no ability to change the sense selection,
there's not a lot we can do with it.

FPGAs being uselessly implemented are unfortunately nothing new, and
neither are hardware designers screwing up IRQ assignments. We already
have plenty of cases where edge-only SuperIOs are interfaced to
level-only pins, leading to ethernet performance comparable to SLIP on a
broken serial cable.

At least we can fix the FPGAs. Fixing the hardware designers is generally
socially frowned upon ;-)