From: Paul M. <le...@li...> - 2007-11-08 07:57:45
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On Thu, Nov 08, 2007 at 08:26:20AM +0100, Manuel Lauss wrote: > On Mon, Nov 05, 2007 at 04:37:07PM +0900, Paul Mundt wrote: > > Well, no luck reproducing things on SH7751R or SH7760. If you have a > > reproduceable workload, that would really help. > > > > On the other hand, there was at least one bug in the page colouring, so > > I've ripped out the old code and made the kmap_coherent() interface more > > consistently used. This implementation can still be optimized with > > regards to the page's dcache state, but I'm more concerned about > > correctness at the moment. See how the following patch works for you. > > The patch seems to help. The GCC build has not finished yet but is in the > final stages; if there were problems it would've failed a _lot_ sooner. > > Thank you very much! > Good to hear, I'll queue this for -rc3 then. Magnus still reports a bug with 4k pages on SH7751R, which doesn't show up when using 64k pages, so there may still be some issues to iron out on certain workloads. There are also some additional patches to switch the lazy D-cache writeback method for even lazier writeback, but these are 2.6.25 material at this point, especially since SH7751R may still have some issues with the current interface. I look forward to the day when the L1 dcache set associativity doubles again, so we can avoid all of this colouring tedium in the future. On 4-way it's already a bit of a toss-up. Now if only people would stop using antiquated direct-mapped and 2-way CPUs.. ;-) |