Re: sh: simplify board specific interrupt code for solution engine 7780

[Nobuhiro I. <he...@t-...>]

Hi,

On Mon, 30 Jul 2007 19:38:06 +0900
Magnus Damm <mag...@gm...> wrote:

> sh: simplify board specific interrupt code for solution engine 7780
> 
> The new intc code handles IRQ3 and IRQ7 in the cpu specific code already,
> so there is no reason to duplicate that here.
> 
> Signed-off-by: Magnus Damm <da...@ig...>
> ---
Thank you for your patch.

I have some comments.
In mounting your IRQ, the priority level is not change.
(The priority level is not change from 2. )
I thought the interrupt priority level to be to be wanted change from 
the setting of the board side. 

For example ...

diff --git a/arch/sh/boards/se/7780/irq.c b/arch/sh/boards/se/7780/irq.c
index 6bd70da..e412063 100644
--- a/arch/sh/boards/se/7780/irq.c
+++ b/arch/sh/boards/se/7780/irq.c
@@ -16,11 +16,31 @@
 #include <asm/io.h>
 #include <asm/se7780.h>
 
+/* 
+ * FIXME 
+ * copy from arch/sh/kernel/cpu/sh4a/setup-sh7780.c 
+ */
+enum {
+	IRQ0 = 16 , IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
+};
+
 /*
  * Initialize IRQ setting
  */
 void __init init_se7780_IRQ(void)
 {
+	/* priority level to board */
+	static struct intc_prio plat_prio[] = {
+	        INTC_PRIO(IRQ0, 3),
+	        INTC_PRIO(IRQ1, 3),
+	        INTC_PRIO(IRQ2, 3),
+	        INTC_PRIO(IRQ3, 3),
+	        INTC_PRIO(IRQ4, 3),
+	        INTC_PRIO(IRQ5, 3),
+	        INTC_PRIO(IRQ6, 3),
+	        INTC_PRIO(IRQ7, 3),
+	};
+
 	/* enable all interrupt at FPGA */
 	ctrl_outw(0, FPGA_INTMSK1);
 	/* mask SM501 interrupt */
@@ -42,5 +62,7 @@ void __init init_se7780_IRQ(void)
 	/* FPGA + 0x0A */
 	ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
 
-	plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */
+	/* install handlers for IRQ0-7 */
+	plat_irq_setup_pins(IRQ_MODE_IRQ
+		, plat_prio, sizeof(plat_prio)/sizeof(*plat_prio)); 
 }
diff --git a/arch/sh/kernel/cpu/irq/intc.c b/arch/sh/kernel/cpu/irq/intc.c
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index a4127ec..3ffac0c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -264,10 +264,15 @@ void __init plat_irq_setup(void)
 	register_intc_controller(&intc_desc);
 }
 
-void __init plat_irq_setup_pins(int mode)
+void __init plat_irq_setup_pins(int mode , struct intc_prio *plat_prio , int plat_size)
 {
+
 	switch (mode) {
 	case IRQ_MODE_IRQ:
+        	if(plat_prio != NULL){
+                	intc_irq_desc.priorities = plat_prio;
+                	intc_irq_desc.nr_priorities = plat_size;
+        	}
 		register_intc_controller(&intc_irq_desc);
 		break;
 	case IRQ_MODE_IRL7654:
diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h
index a4086ea..0d74f30 100644
--- a/include/asm-sh/hw_irq.h
+++ b/include/asm-sh/hw_irq.h
@@ -95,6 +95,6 @@ void __init plat_irq_setup(void);
 
 enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,
        IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
-void __init plat_irq_setup_pins(int mode);
+void __init plat_irq_setup_pins(int mode , struct intc_prio *plat_prio, int plat_size);
 
 #endif /* __ASM_SH_HW_IRQ_H */

Thanks,
 Nobuhiro
-- 
Nobuhiro Iwamatsu
	he...@t-...
	iwa...@de...

	GPG ID : 3170EBE9