From: Magnus D. <mag...@gm...> - 2007-07-25 03:23:20
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Hi Kristoffer, On 7/25/07, Kristoffer Ericson <kri...@gm...> wrote: > On Mon, 23 Jul 2007 15:00:54 +0900 > "Magnus Damm" <mag...@gm...> wrote: > > I'd be happy to convert the 7709 setup code to work with the new intc > > handler. And after that I can build pint support on top of intc as > > well. This needs to be tested though and I don't have any 7709 > > hardware around. So if anyone could help out testing things that would > > be great. That would at least solve the issue of converting the 7709 > > setup code to intc. > > Ive already started but sounds great. I'll post what Ive done so far. I have machines/people to test it. Thanks for posting your work. I spent part of yesterday unifying sh7706, sh7707, sh7708 and sh7709 support into sh770x.c, and this work unfortunately conflicts with your patch. Funny that we happen to hack on irq support simultaneously for this ancient processor. =) Your latest patch looks very similar to my sh770x stuff, but with prio_regs and IRQ pins as exceptions. Each enum_id element in the prio_regs array should map to a set of bits (4 bits in this case) that represent the priority that is defined by the data sheet. So for instance, the RTC-related interrupt sources all share the same priority using the enum_id RTC which is defined in the list of groups with RTC_ATI, RTC_PRI and RTC_CUI as members. The order of the elements in the prio_regs array may seem confusing - LSB is in [0] - this allows us to input information directly from the data sheet. For intc, enum_id 0 must be unused (you do the right thing) because it is used as a special case in the generic intc code to mark pieces of registers as unused (and to terminate the group list, see the INTC_GROUP() macro). Regarding the IRQ pins, IRQ0-IRQ3 can be used in IRL mode. So my sh770x patch doesn't register these pins by default to allow each board to select whatever mode they like. Great that you have people and hardware to test things. A while there I was thinking of trying to get my hands on a hp620, but if you can test then that's a much better solution. I have many things I need to hack on, and hp620 is just one of zillion platforms unfortunately. > > The only board-specific irq constants that i can find being used on > > hp6xx seem to be located in hp6xx.h except for the IRQ number for > > hd644661 which is located in the config file as CONFIG_HD64461_IRQ=36. > > These values all seem to map to IRQ pins. The irq number 93 otoh, it > > is associated with the pata_platform setup data in > > arch/sh/boards/hp6xx/setup.c and that is pretty close to PINT_IRQ_BASE > > which seems to be set to 86. So maybe we have a pint interrupt there > > after all... > > IRQ 0 is used to drive both PCMCIA/CF it maps against 94->95 and uses demux. Good that you know things about this. I'm confused though, do you mean that the CF is connected to the IRQ0 pin? hp6xx.h says something about a BTN_IRQ mapped on IRQ0. I suspect that the CF interrupt is connected to bit 7 in the PINTER register. This bit should be associated with Port C bit 7 if I've done my 7709 pintc homework correctly. =) You are talking about 94 and 95 too, are these other card detect interrupts for pccard hotplug? Are they connected to Port C bit 5 and 6? Thanks for your help! / magnus |