Re: Why flush cache in insw/outsw ?

[<tak...@op...>]

Thank you, Paul.

> We needed these for some of the IDE cases, it was something that was hit
> in the PG_dcache_dirty conversion. <snip>
Oh, that's exactly what I guess. Happy.

> You may want to add a sensible definition for SH-3 as well, but I'm not
> sure how heavily you're hitting the libata drivers.
mmm, Because I don't have SH3 board with libata enabled, I'd like to leave it blank now.
How about following patch? I put them into io_generic.c near insw/outsw, but cache_flush.h,
 since these seems a kind of workaround.
# SH3/4 compatible cache flush API may be wanted in somewhere else, someday, though.

Regards,
/yoshii
# sorry for trivial patches always...

Signed-off-by: Takashi YOSHII <tak...@op...>

diff --git a/arch/sh/kernel/io_generic.c b/arch/sh/kernel/io_generic.c
index 66626c0..7893718 100644
--- a/arch/sh/kernel/io_generic.c
+++ b/arch/sh/kernel/io_generic.c
@@ -25,6 +25,13 @@ #else
 #define dummy_read()
 #endif
 
+#if defined(CONFIG_CPU_SH4)
+/* We need these for some of the IDE cases. */
+#define flush_cache()	flush_dcache_all()
+#else
+#define flush_cache()	/* XXX: flushing might be needed */
+#endif
+
 unsigned long generic_io_base;
 
 static inline void delay(void)
@@ -96,7 +103,7 @@ void generic_insw(unsigned long port, vo
 	while (count--)
 		*buf++ = *port_addr;
 
-	flush_dcache_all();
+	flush_cache();
 	dummy_read();
 }
 
@@ -171,7 +178,7 @@ void generic_outsw(unsigned long port, c
 	while (count--)
 		*port_addr = *buf++;
 
-	flush_dcache_all();
+	flush_cache();
 	dummy_read();
 }