Menu
▾
▴
linuxsh-dev
|
From: Magnus D. <mag...@gm...> - 2007-07-25 13:19:13
|
sh: intc - add support for SH7760
This patch converts the cpu specific interrupt setup code for sh7760 from
ipr + intc2 to intc. New vectors are also added to match the information
provided by the datasheet.
Vectors for IRQ4-IRQ7 are enabled by default. Use plat_irq_setup_pins() if
pins IRL0-3 should be used in IRLM mode.
The patch also adds the SIM block to the serial port platform data.
Signed-off-by: Magnus Damm <da...@ig...>
---
arch/sh/kernel/cpu/sh4/setup-sh7760.c | 253 +++++++++++++++++++--------------
arch/sh/mm/Kconfig | 3
2 files changed, 147 insertions(+), 109 deletions(-)
--- 0001/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ work/arch/sh/kernel/cpu/sh4/setup-sh7760.c 2007-07-25 20:54:20.000000000 +0900
@@ -12,6 +12,136 @@
#include <linux/serial.h>
#include <asm/sci.h>
+enum {
+ UNUSED = 0,
+
+ /* interrupt sources */
+ IRL0, IRL1, IRL2, IRL3,
+ HUDI, GPIOI,
+ DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2, DMAC_DMTE3,
+ DMAC_DMTE4, DMAC_DMTE5, DMAC_DMTE6, DMAC_DMTE7,
+ DMAC_DMAE,
+ IRQ4, IRQ5, IRQ6, IRQ7,
+ HCAN20, HCAN21,
+ SSI0, SSI1,
+ HAC0, HAC1,
+ I2C0, I2C1,
+ USB, LCDC,
+ DMABRG0, DMABRG1, DMABRG2,
+ SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
+ SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
+ SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
+ SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI,
+ HSPI,
+ MMCIF0, MMCIF1, MMCIF2, MMCIF3,
+ MFI, ADC, CMT,
+ TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
+ WDT,
+ REF_RCMI, REF_ROVI,
+
+ /* interrupt groups */
+ DMAC, DMABRG, SCIF0, SCIF1, SCIF2, SIM, MMCIF, TMU2, REF,
+};
+
+static struct intc_vect vectors[] = {
+ INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620),
+ INTC_VECT(DMAC_DMTE0, 0x640), INTC_VECT(DMAC_DMTE1, 0x660),
+ INTC_VECT(DMAC_DMTE2, 0x680), INTC_VECT(DMAC_DMTE3, 0x6a0),
+ INTC_VECT(DMAC_DMTE4, 0x780), INTC_VECT(DMAC_DMTE5, 0x7a0),
+ INTC_VECT(DMAC_DMTE6, 0x7c0), INTC_VECT(DMAC_DMTE7, 0x7e0),
+ INTC_VECT(DMAC_DMAE, 0x6c0),
+ INTC_VECT(IRQ4, 0x800), INTC_VECT(IRQ5, 0x820),
+ INTC_VECT(IRQ6, 0x840), INTC_VECT(IRQ6, 0x860),
+ INTC_VECT(HCAN20, 0x900), INTC_VECT(HCAN21, 0x920),
+ INTC_VECT(SSI0, 0x940), INTC_VECT(SSI1, 0x960),
+ INTC_VECT(HAC0, 0x980), INTC_VECT(HAC1, 0x9a0),
+ INTC_VECT(I2C0, 0x9c0), INTC_VECT(I2C1, 0x9e0),
+ INTC_VECT(USB, 0xa00), INTC_VECT(LCDC, 0xa20),
+ INTC_VECT(DMABRG0, 0xa80), INTC_VECT(DMABRG1, 0xaa0),
+ INTC_VECT(DMABRG2, 0xac0),
+ INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
+ INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
+ INTC_VECT(SCIF1_ERI, 0xb00), INTC_VECT(SCIF1_RXI, 0xb20),
+ INTC_VECT(SCIF1_BRI, 0xb40), INTC_VECT(SCIF1_TXI, 0xb60),
+ INTC_VECT(SCIF2_ERI, 0xb80), INTC_VECT(SCIF2_RXI, 0xba0),
+ INTC_VECT(SCIF2_BRI, 0xbc0), INTC_VECT(SCIF2_TXI, 0xbe0),
+ INTC_VECT(SIM_ERI, 0xc00), INTC_VECT(SIM_RXI, 0xc20),
+ INTC_VECT(SIM_TXI, 0xc40), INTC_VECT(SIM_TEI, 0xc60),
+ INTC_VECT(HSPI, 0xc80),
+ INTC_VECT(MMCIF0, 0xd00), INTC_VECT(MMCIF1, 0xd20),
+ INTC_VECT(MMCIF2, 0xd40), INTC_VECT(MMCIF3, 0xd60),
+ INTC_VECT(MFI, 0xe80), /* 0xf80 according to data sheet */
+ INTC_VECT(ADC, 0xf80), INTC_VECT(CMT, 0xfa0),
+ INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
+ INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
+ INTC_VECT(WDT, 0x560),
+ INTC_VECT(REF_RCMI, 0x580), INTC_VECT(REF_ROVI, 0x5a0),
+};
+
+static struct intc_group groups[] = {
+ INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2,
+ DMAC_DMTE3, DMAC_DMTE4, DMAC_DMTE5,
+ DMAC_DMTE6, DMAC_DMTE7, DMAC_DMAE),
+ INTC_GROUP(DMABRG, DMABRG0, DMABRG1, DMABRG2),
+ INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
+ INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
+ INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
+ INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI),
+ INTC_GROUP(MMCIF, MMCIF0, MMCIF1, MMCIF2, MMCIF3),
+ INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
+ INTC_GROUP(REF, REF_RCMI, REF_ROVI),
+};
+
+static struct intc_prio priorities[] = {
+ INTC_PRIO(SCIF0, 3),
+ INTC_PRIO(SCIF1, 3),
+ INTC_PRIO(SCIF2, 3),
+ INTC_PRIO(SIM, 3),
+ INTC_PRIO(DMAC, 7),
+ INTC_PRIO(DMABRG, 13),
+};
+
+static struct intc_mask_reg mask_registers[] = {
+ { 0xfe080040, 0xfe080060, 32, /* INTMSK00 / INTMSKCLR00 */
+ { IRQ4, IRQ5, IRQ6, IRQ7, 0, 0, HCAN20, HCAN21,
+ SSI0, SSI1, HAC0, HAC1, I2C0, I2C1, USB, LCDC,
+ 0, DMABRG0, DMABRG1, DMABRG2,
+ SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
+ SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
+ SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI, } },
+ { 0xfe080044, 0xfe080064, 32, /* INTMSK04 / INTMSKCLR04 */
+ { 0, 0, 0, 0, 0, 0, 0, 0,
+ SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI,
+ HSPI, MMCIF0, MMCIF1, MMCIF2,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, MFI, 0, 0, 0, 0, ADC, CMT, } },
+};
+
+static struct intc_prio_reg prio_registers[] = {
+ { 0xffd00004, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } },
+ { 0xffd00008, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
+ { 0xffd0000c, 16, 4, /* IPRC */ { GPIOI, DMAC, 0, HUDI } },
+ { 0xffd00010, 16, 4, /* IPRD */ { IRL0, IRL1, IRL2, IRL3 } },
+ { 0xfe080000, 32, 4, /* INTPRI00 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
+ { 0xfe080004, 32, 4, /* INTPRI04 */ { HCAN20, HCAN21, SSI0, SSI1,
+ HAC0, HAC1, I2C0, I2C1 } },
+ { 0xfe080008, 32, 4, /* INTPRI08 */ { USB, LCDC, DMABRG, SCIF0,
+ SCIF1, SCIF2, SIM, HSPI } },
+ { 0xfe08000c, 32, 4, /* INTPRI0C */ { 0, 0, MMCIF, 0,
+ MFI, 0, ADC, CMT } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7760", vectors, groups,
+ priorities, mask_registers, prio_registers, NULL);
+
+static struct intc_vect vectors_irq[] = {
+ INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0),
+ INTC_VECT(IRL2, 0x300), INTC_VECT(IRL3, 0x360),
+};
+
+static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
+ priorities, mask_registers, prio_registers, NULL);
+
static struct plat_sci_port sci_platform_data[] = {
{
.mapbase = 0xfe600000,
@@ -29,6 +159,11 @@ static struct plat_sci_port sci_platform
.type = PORT_SCIF,
.irqs = { 76, 77, 79, 78 },
}, {
+ .mapbase = 0xfe480000,
+ .flags = UPF_BOOT_AUTOCONF,
+ .type = PORT_SCI,
+ .irqs = { 80, 81, 82, 0 },
+ }, {
.flags = 0,
}
};
@@ -52,114 +187,18 @@ static int __init sh7760_devices_setup(v
}
__initcall(sh7760_devices_setup);
-static struct intc2_data intc2_irq_table[] = {
- {48, 0, 28, 0, 31, 3}, /* IRQ 4 */
- {49, 0, 24, 0, 30, 3}, /* IRQ 3 */
- {50, 0, 20, 0, 29, 3}, /* IRQ 2 */
- {51, 0, 16, 0, 28, 3}, /* IRQ 1 */
- {56, 4, 28, 0, 25, 3}, /* HCAN2_CHAN0 */
- {57, 4, 24, 0, 24, 3}, /* HCAN2_CHAN1 */
- {58, 4, 20, 0, 23, 3}, /* I2S_CHAN0 */
- {59, 4, 16, 0, 22, 3}, /* I2S_CHAN1 */
- {60, 4, 12, 0, 21, 3}, /* AC97_CHAN0 */
- {61, 4, 8, 0, 20, 3}, /* AC97_CHAN1 */
- {62, 4, 4, 0, 19, 3}, /* I2C_CHAN0 */
- {63, 4, 0, 0, 18, 3}, /* I2C_CHAN1 */
- {52, 8, 16, 0, 11, 3}, /* SCIF0_ERI_IRQ */
- {53, 8, 16, 0, 10, 3}, /* SCIF0_RXI_IRQ */
- {54, 8, 16, 0, 9, 3}, /* SCIF0_BRI_IRQ */
- {55, 8, 16, 0, 8, 3}, /* SCIF0_TXI_IRQ */
- {64, 8, 28, 0, 17, 3}, /* USBHI_IRQ */
- {65, 8, 24, 0, 16, 3}, /* LCDC */
- {68, 8, 20, 0, 14, 13}, /* DMABRGI0_IRQ */
- {69, 8, 20, 0, 13, 13}, /* DMABRGI1_IRQ */
- {70, 8, 20, 0, 12, 13}, /* DMABRGI2_IRQ */
- {72, 8, 12, 0, 7, 3}, /* SCIF1_ERI_IRQ */
- {73, 8, 12, 0, 6, 3}, /* SCIF1_RXI_IRQ */
- {74, 8, 12, 0, 5, 3}, /* SCIF1_BRI_IRQ */
- {75, 8, 12, 0, 4, 3}, /* SCIF1_TXI_IRQ */
- {76, 8, 8, 0, 3, 3}, /* SCIF2_ERI_IRQ */
- {77, 8, 8, 0, 2, 3}, /* SCIF2_RXI_IRQ */
- {78, 8, 8, 0, 1, 3}, /* SCIF2_BRI_IRQ */
- {79, 8, 8, 0, 0, 3}, /* SCIF2_TXI_IRQ */
- {80, 8, 4, 4, 23, 3}, /* SIM_ERI */
- {81, 8, 4, 4, 22, 3}, /* SIM_RXI */
- {82, 8, 4, 4, 21, 3}, /* SIM_TXI */
- {83, 8, 4, 4, 20, 3}, /* SIM_TEI */
- {84, 8, 0, 4, 19, 3}, /* HSPII */
- {88, 12, 20, 4, 18, 3}, /* MMCI0 */
- {89, 12, 20, 4, 17, 3}, /* MMCI1 */
- {90, 12, 20, 4, 16, 3}, /* MMCI2 */
- {91, 12, 20, 4, 15, 3}, /* MMCI3 */
- {92, 12, 12, 4, 6, 3}, /* MFI */
- {108,12, 4, 4, 1, 3}, /* ADC */
- {109,12, 0, 4, 0, 3}, /* CMTI */
-};
-
-static struct intc2_desc intc2_irq_desc __read_mostly = {
- .prio_base = 0xfe080000,
- .msk_base = 0xfe080040,
- .mskclr_base = 0xfe080060,
-
- .intc2_data = intc2_irq_table,
- .nr_irqs = ARRAY_SIZE(intc2_irq_table),
-
- .chip = {
- .name = "INTC2-sh7760",
- },
-};
-
-static struct ipr_data ipr_irq_table[] = {
- /* IRQ, IPR-idx, shift, priority */
- { 16, 0, 12, 2 }, /* TMU0 TUNI*/
- { 17, 0, 8, 2 }, /* TMU1 TUNI */
- { 18, 0, 4, 2 }, /* TMU2 TUNI */
- { 19, 0, 4, 2 }, /* TMU2 TIPCI */
- { 27, 1, 12, 2 }, /* WDT ITI */
- { 28, 1, 8, 2 }, /* REF RCMI */
- { 29, 1, 8, 2 }, /* REF ROVI */
- { 32, 2, 0, 7 }, /* HUDI */
- { 33, 2, 12, 7 }, /* GPIOI */
- { 34, 2, 8, 7 }, /* DMAC DMTE0 */
- { 35, 2, 8, 7 }, /* DMAC DMTE1 */
- { 36, 2, 8, 7 }, /* DMAC DMTE2 */
- { 37, 2, 8, 7 }, /* DMAC DMTE3 */
- { 38, 2, 8, 7 }, /* DMAC DMAE */
- { 44, 2, 8, 7 }, /* DMAC DMTE4 */
- { 45, 2, 8, 7 }, /* DMAC DMTE5 */
- { 46, 2, 8, 7 }, /* DMAC DMTE6 */
- { 47, 2, 8, 7 }, /* DMAC DMTE7 */
-/* these here are only valid if INTC_ICR bit 7 is set to 1!
- * XXX: maybe CONFIG_SH_IRLMODE symbol? SH7751 could use it too */
-#if 0
- { 2, 3, 12, 3 }, /* IRL0 */
- { 5, 3, 8, 3 }, /* IRL1 */
- { 8, 3, 4, 3 }, /* IRL2 */
- { 11, 3, 0, 3 }, /* IRL3 */
-#endif
-};
-
-static unsigned long ipr_offsets[] = {
- 0xffd00004UL, /* 0: IPRA */
- 0xffd00008UL, /* 1: IPRB */
- 0xffd0000cUL, /* 2: IPRC */
- 0xffd00010UL, /* 3: IPRD */
-};
-
-static struct ipr_desc ipr_irq_desc = {
- .ipr_offsets = ipr_offsets,
- .nr_offsets = ARRAY_SIZE(ipr_offsets),
-
- .ipr_data = ipr_irq_table,
- .nr_irqs = ARRAY_SIZE(ipr_irq_table),
-
- .chip = {
- .name = "IPR-sh7760",
- },
-};
+void __init plat_irq_setup_pins(int mode)
+{
+ switch (mode) {
+ case IRQ_MODE_IRQ:
+ register_intc_controller(&intc_desc_irq);
+ break;
+ default:
+ BUG();
+ }
+}
void __init plat_irq_setup(void)
{
- register_intc2_controller(&intc2_irq_desc);
- register_ipr_controller(&ipr_irq_desc);
+ register_intc_controller(&intc_desc);
}
--- 0001/arch/sh/mm/Kconfig
+++ work/arch/sh/mm/Kconfig 2007-07-25 20:54:43.000000000 +0900
@@ -156,8 +156,7 @@ config CPU_SUBTYPE_SH7751R
config CPU_SUBTYPE_SH7760
bool "Support SH7760 processor"
select CPU_SH4
- select CPU_HAS_INTC2_IRQ
- select CPU_HAS_IPR_IRQ
+ select CPU_HAS_INTC_IRQ
config CPU_SUBTYPE_SH4_202
bool "Support SH4-202 processor"
|
|
From: Manuel L. <ma...@ro...> - 2007-07-25 13:43:27
|
Hi Magnus, On Wed, Jul 25, 2007 at 10:17:39PM +0900, Magnus Damm wrote: > sh: intc - add support for SH7760 > + INTC_GROUP(MMCIF, MMCIF0, MMCIF1, MMCIF2, MMCIF3), With this patch my mmcif driver not longer works, since no mmcif irq is generated. In the driver I only request MMCIF0-2; MMCIF3 is unused. Does the grouping above mask all grouped IRQs unless all have been enabled/requested? Thanks, Manuel Lauss |
|
From: Manuel L. <ma...@ro...> - 2007-07-25 13:53:08
|
Hi Magnus, > On Wed, Jul 25, 2007 at 10:17:39PM +0900, Magnus Damm wrote: > > sh: intc - add support for SH7760 > > > + INTC_GROUP(MMCIF, MMCIF0, MMCIF1, MMCIF2, MMCIF3), > > With this patch my mmcif driver not longer works, since no > mmcif irq is generated. In the driver I only request > MMCIF0-2; MMCIF3 is unused. Does the grouping above mask all > grouped IRQs unless all have been enabled/requested? Nevermind, figured it out already. Yes, all 4 have to be requested. Thanks, Manuel Lauss |
|
From: Magnus D. <mag...@gm...> - 2007-07-25 14:16:41
|
Hi Manuel, Thanks for the feedback! On 7/25/07, Manuel Lauss <ma...@ro...> wrote: > Hi Magnus, > > On Wed, Jul 25, 2007 at 10:17:39PM +0900, Magnus Damm wrote: > > sh: intc - add support for SH7760 > > > + INTC_GROUP(MMCIF, MMCIF0, MMCIF1, MMCIF2, MMCIF3), > > With this patch my mmcif driver not longer works, since no > mmcif irq is generated. In the driver I only request > MMCIF0-2; MMCIF3 is unused. Does the grouping above mask all > grouped IRQs unless all have been enabled/requested? It should be possible to request a single interrupt only. The grouping is there because the priority value is shared between all MMCIF interrupts. We need some way to tell the intc code which interrupt sources that are bundled together, and that's what the groups are used for. The sh7780 device supports both masking with both priorities and bitmaps. The common intc code should prefer to use the per-interrupt source bitmap for MMCIF0-3 over the priority group to mask and unmask. So interrupts should be masked per-interrupt source for MMCIF. So.. are things working as before, or have i mistakenly introduced some new behavior? =) Thanks! / magnus |
|
From: Manuel L. <ma...@ro...> - 2007-07-25 14:26:49
|
On Wed, Jul 25, 2007 at 11:16:39PM +0900, Magnus Damm wrote: > Hi Manuel, > > Thanks for the feedback! > > On 7/25/07, Manuel Lauss <ma...@ro...> wrote: > > Hi Magnus, > > > > On Wed, Jul 25, 2007 at 10:17:39PM +0900, Magnus Damm wrote: > > > sh: intc - add support for SH7760 > > > > > + INTC_GROUP(MMCIF, MMCIF0, MMCIF1, MMCIF2, MMCIF3), > > > > With this patch my mmcif driver not longer works, since no > > mmcif irq is generated. In the driver I only request > > MMCIF0-2; MMCIF3 is unused. Does the grouping above mask all > > grouped IRQs unless all have been enabled/requested? > > It should be possible to request a single interrupt only. > > The grouping is there because the priority value is shared between all > MMCIF interrupts. We need some way to tell the intc code which > interrupt sources that are bundled together, and that's what the > groups are used for. > > The sh7780 device supports both masking with both priorities and > bitmaps. The common intc code should prefer to use the per-interrupt > source bitmap for MMCIF0-3 over the priority group to mask and unmask. > So interrupts should be masked per-interrupt source for MMCIF. > > So.. are things working as before, or have i mistakenly introduced > some new behavior? =) New behavior -- unless all 4 of the grouped MMCIF irqs are requested, none trigger. They show up in /proc/interrupts but count does not change. Thanks, Manuel Lauss |
|
From: Magnus D. <mag...@gm...> - 2007-07-26 16:56:11
|
Hi again Manuel, On 7/25/07, Manuel Lauss <ma...@ro...> wrote: > On Wed, Jul 25, 2007 at 11:16:39PM +0900, Magnus Damm wrote: > > On 7/25/07, Manuel Lauss <ma...@ro...> wrote: > > > On Wed, Jul 25, 2007 at 10:17:39PM +0900, Magnus Damm wrote: > > > > sh: intc - add support for SH7760 > > > > > > > + INTC_GROUP(MMCIF, MMCIF0, MMCIF1, MMCIF2, MMCIF3), > > > > > > With this patch my mmcif driver not longer works, since no > > > mmcif irq is generated. In the driver I only request > > > MMCIF0-2; MMCIF3 is unused. Does the grouping above mask all > > > grouped IRQs unless all have been enabled/requested? > > > > It should be possible to request a single interrupt only. > > > > The grouping is there because the priority value is shared between all > > MMCIF interrupts. We need some way to tell the intc code which > > interrupt sources that are bundled together, and that's what the > > groups are used for. > > > > The sh7780 device supports both masking with both priorities and > > bitmaps. The common intc code should prefer to use the per-interrupt > > source bitmap for MMCIF0-3 over the priority group to mask and unmask. > > So interrupts should be masked per-interrupt source for MMCIF. > > > > So.. are things working as before, or have i mistakenly introduced > > some new behavior? =) > > New behavior -- unless all 4 of the grouped MMCIF irqs are requested, > none trigger. They show up in /proc/interrupts but count does not change. I have two ideas: 1. Please try to add MMCIF3 to mask_registers[]. I must have missed that one. The "0" after MMCIF2 should be replaced with MMCIF3. This is a pretty obvious miss that I made when I created the tables from the data sheet. I hope that this fix helps. 2. If number 1 above doesn't help, please try replacing all MMCIF0-3 with 0 in mask_registers[]. That should force masking via the priority register. Could you please check if the ideas above help? Number 1 is preferred over 2. Thanks! / magnus |
|
From: Manuel L. <ma...@ro...> - 2007-07-27 04:52:57
|
Hi Magnus, > >New behavior -- unless all 4 of the grouped MMCIF irqs are requested, > >none trigger. They show up in /proc/interrupts but count does not change. > > I have two ideas: > > 1. Please try to add MMCIF3 to mask_registers[]. I must have missed > that one. The "0" after MMCIF2 should be replaced with MMCIF3. This is > a pretty obvious miss that I made when I created the tables from the > data sheet. I hope that this fix helps. Yes that fixed it! Thanks, Manuel Lauss |
×
Want the latest updates on software, tech news, and AI?
Get latest updates about software, tech news, and AI from SourceForge directly in your inbox once a month.
Thanks for helping keep SourceForge clean.
X