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From: Kristoffer E. <kri...@ho...> - 2007-03-23 19:40:44
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Greetings,
Here's the first bunch of patches. All against git-current.
---------------------------------------------------------------------------------------------------------
sh7709-setup.c
* Addition of IPRC(n) and IPRD(n) macros
* Addition of IRQ0 -> IRQ5 in the ipr_map
signed-off-by: Kristoffer Ericson <Kri...@ho...>
hp6xx-setup.c-overhaul.patch
* Added needed include linux/platform_device.h
* Adds resource cf_ide_resources to enable us to use our compact flash
through
the generic pata_platform. Also moves the adresses from PIO into MMIO
style.
* Reduces the use of non-generic functions in machine vector. Which in turn
makes io.c more or less obselete.
* Removes obselete comment about the mach_vector. see above.
signed-off-by: Kristoffer Ericson <Kri...@ho...>
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From: Paul M. <le...@li...> - 2007-03-25 23:24:18
|
On Fri, Mar 23, 2007 at 07:40:31PM +0000, Kristoffer Ericson wrote:
> diff --git a/arch/sh/boards/hp6xx/setup.c b/arch/sh/boards/hp6xx/setup.c
> index b5a9664..266c338 100644
> --- a/arch/sh/boards/hp6xx/setup.c
> +++ b/arch/sh/boards/hp6xx/setup.c
> @@ -15,10 +15,45 @@
> #include <asm/irq.h>
> #include <asm/hp6xx.h>
> #include <asm/cpu/dac.h>
> +#include <linux/platform_device.h>
>
linux/ includes before asm/ includes..
> +static struct resource cf_ide_resources[] = {
> + [0] = {
> + .start = 0xb5000000 + 0x1f0,
> + .end = 0xb5000000 + 0x1f0 + 0x08 - 1,
> + .flags = IORESOURCE_MEM,
> + },
> + [1] = {
> + .start = 0xb5000000 + 0x1fe,
> + .end = 0xb5000000 + 0x1fe + 1,
> + .flags = IORESOURCE_MEM,
> + },
> + [2] = {
> + .start = 93,
> + .flags = IORESOURCE_IRQ,
> + },
> +};
> +
This has some very strange whitespace, please check for space errors
before making the diff.
I suspect you also ant to use 0x15000000 here rather than 0xb5, since you
set the resouce type to MEM it will be remapped and you'll get back
0xb5.. anyways.
> .mv_irq_demux = hd64461_irq_demux,
> + .mv_readw = hd64461_readw,
> + .mv_writew = hd64461_writew,
> };
Any reason for keeping these?
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From: Kristoffer E. <kri...@ho...> - 2007-03-26 19:02:45
|
Thoughts?
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7709.c
b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
index dc9b211..a76777f 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7709.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
@@ -55,6 +55,8 @@ __initcall(sh7709_devices_setup);
#define IPRx(A,N) .addr=A, .shift=0*N*-1
#define IPRA(N) IPRx(0xfffffee2UL,N)
#define IPRB(N) IPRx(0xfffffee4UL,N)
+#define IPRC(N) IPRx(0xa4000016UL,N)
+#define IPRD(N) IPRx(0xa4000018UL,N)
#define IPRE(N) IPRx(0xa400001aUL,N)
static struct ipr_data sh7709_ipr_map[] = {
@@ -63,6 +65,12 @@ static struct ipr_data sh7709_ipr_map[] = {
[22] = { IPRA(3-0), 2 }, /* RTC CUI */
[23 ... 26] = { IPRB(7-4), 3 }, /* SCI */
[27] = { IPRB(15-12), 2 }, /* WDT ITI */
+ [32] = { IPRC(0), 1 }, /* IRQ 0 */
+ [33] = { IPRC(1), 1 }, /* IRQ 1 */
+ [34] = { IPRC(2), 1 }, /* IRQ 2 */
+ [35] = { IPRC(3), 1 }, /* IRQ 3 */
+ [36] = { IPRD(0), 1 }, /* IRQ 4 */
+ [37] = { IPRD(1), 1 }, /* IRQ 5 */
[48 ... 51] = { IPRE(15-12), 7 }, /* DMA */
[52 ... 55] = { IPRE(11-8), 3 }, /* IRDA */
[56 ... 59] = { IPRE(7-4), 3 }, /* SCIF */
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From: <tak...@op...> - 2007-03-27 17:46:36
|
Hi, Kristoffer, and lists,
# This is not a patch commit.
There is a issue whether external interrupts should be initialized in CPU setup code, or not.
I initialize them in board setup code (boards/shmin/setup.c) now.
I don't know the answer, perhaps CPU do definition, and board should do all of initialization, or
ipr initialization and priority setting should be separated, or this is pin mux issue, or ... I don't know.
So, forget it now, please :) Here is another topic.
> + [33] = { IPRC(1), 1 }, /* IRQ 1 */
> ...
Perhaps, what you want is like a patch at the end.
Argument of IPR* macro is like "11-8".
It's not a number, nor a mathematical notation(like 15-8=7), because of "0*N*-1" in IPRx macro
definition. I'm sorry to have commited such a dain bramaged macros.
I explain on this occasion.
This was a kind of objection against the comment in asm-sh/irq.h. It says
| * The shift value is now the number of bits to shift, not the number of
| * bits/4. This is to make it easier to read the value directly from the
| * datasheets. <snip>
I don't think (12,8,4,0) is easier than (3,2,1,0). And what you read direct from the
datasheet is (15-12,11-8,7-4,3-0). Hence the weired math.
But, this is ugry, sorry. I will fix the macro to (12,8,4,0) style. It seems this is the majority.
More important is later part.
| <snip> The IPR address, addr, will be set from ipr_idx via the
| * map_ipridx_to_addr function.
I don't agree this method. Symbol reference back from core part is not good.
I don't understand what this is intended to. If it is to abstract hardware, it's not enough.
IRQx macro provids the way to setup IPRs without map_ipridx_to_addr().
I think .address and .shift is a set, and is the hardware description.
The macro packs them, at least for the eyes. The real one should come later, perhaps when
we introduce IRQ number abstraction.
That's why I end whth this implementation.
So, could you please test this patch on your target ? > Kristoffer.
Here on my board(shmin/7706), it seems no problem, so far.
Best regards,
/yoshii
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7709.c b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
index dc9b211..47c7cf6 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7709.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
@@ -52,20 +52,30 @@ static int __init sh7709_devices_setup(v
}
__initcall(sh7709_devices_setup);
-#define IPRx(A,N) .addr=A, .shift=0*N*-1
+#define IPRx(A,N) .addr=A, .shift=N
#define IPRA(N) IPRx(0xfffffee2UL,N)
#define IPRB(N) IPRx(0xfffffee4UL,N)
+#define IPRC(N) IPRx(0xa4000016UL,N)
+#define IPRD(N) IPRx(0xa4000018UL,N)
#define IPRE(N) IPRx(0xa400001aUL,N)
static struct ipr_data sh7709_ipr_map[] = {
- [16] = { IPRA(15-12), 2 }, /* TMU TUNI0 */
- [17] = { IPRA(11-8), 4 }, /* TMU TUNI1 */
- [22] = { IPRA(3-0), 2 }, /* RTC CUI */
- [23 ... 26] = { IPRB(7-4), 3 }, /* SCI */
- [27] = { IPRB(15-12), 2 }, /* WDT ITI */
- [48 ... 51] = { IPRE(15-12), 7 }, /* DMA */
- [52 ... 55] = { IPRE(11-8), 3 }, /* IRDA */
- [56 ... 59] = { IPRE(7-4), 3 }, /* SCIF */
+ [16] = { IPRA(12), 2 }, /* TMU TUNI0 */
+ [17] = { IPRA( 8), 4 }, /* TMU TUNI1 */
+ [18 ... 19] = { IPRA( 4), 1 }, /* TMU2 */
+ [20 ... 22] = { IPRA( 0), 2 }, /* RTC */
+ [23 ... 26] = { IPRB( 4), 3 }, /* SCI */
+ [27] = { IPRB(12), 2 }, /* WDT ITI */
+ [28 ... 29] = { IPRB( 8), 1 }, /* REF */
+ [32] = { IPRC( 0), 1 }, /* IRQ0 */
+ [33] = { IPRC( 4), 1 }, /* IRQ1 */
+ [34] = { IPRC( 8), 1 }, /* IRQ2 */
+ [35] = { IPRC(12), 1 }, /* IRQ3 */
+ [36] = { IPRD( 0), 1 }, /* IRQ4 */
+ [37] = { IPRD( 4), 1 }, /* IRQ5 */
+ [48 ... 51] = { IPRE(12), 7 }, /* DMA */
+ [52 ... 55] = { IPRE( 8), 3 }, /* IRDA */
+ [56 ... 59] = { IPRE( 4), 3 }, /* SCIF */
};
void __init init_IRQ_ipr()
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From: Paul M. <le...@li...> - 2007-03-27 19:41:16
|
On Wed, Mar 28, 2007 at 02:46:25AM +0900, tak...@op... wrote: > There is a issue whether external interrupts should be initialized in CPU setup code, or not. > I initialize them in board setup code (boards/shmin/setup.c) now. > I don't know the answer, perhaps CPU do definition, and board should do all of initialization, or > ipr initialization and priority setting should be separated, or this is pin mux issue, or ... I don't know. > So, forget it now, please :) Here is another topic. > Agreed, this does need to be overhauled. For the IPR scheme, perhaps your macro solution is really the most sensible way to go. There's not much in the way of meaningful mapping we can accomplish with the map_ipridx_to_addr() approach, so there's not a lot of point in keeping it around. INTC2 is going to need something similar as well, since the new-style INTC2s place their mask/clear registers at completely different locations depending on the IRQ offset. Irritating, but not a lot we can do about it, it's just going to have to be something that's swalled up by the mapping code. SH7785 INTC2 has this problem, for example. I would rather not have this stuff visible in the board-level configuration, at least. Boards should only care about their special IRQ controllers, and whether they need to kick a parent IRQ in to a certain mode for cascade or not. |
|
From: Kristoffer E. <kri...@ho...> - 2007-03-28 11:51:58
|
I'll be glad to try it out once I get back to uni on monday. Big thanks at
cleaning up it abit, had a few braincell losses figuring it out. :)
Best wishes
Kristoffer
>From: tak...@op...
>To: "Kristoffer Ericson" <kri...@ho...>
>CC: lin...@li...
>Subject: Re: Setup-sh7709.c
>Date: Wed, 28 Mar 2007 02:46:25 +0900
>
>Hi, Kristoffer, and lists,
># This is not a patch commit.
>
>There is a issue whether external interrupts should be initialized in CPU
>setup code, or not.
>I initialize them in board setup code (boards/shmin/setup.c) now.
>I don't know the answer, perhaps CPU do definition, and board should do all
>of initialization, or
>ipr initialization and priority setting should be separated, or this is pin
>mux issue, or ... I don't know.
>So, forget it now, please :) Here is another topic.
>
> > + [33] = { IPRC(1), 1 }, /* IRQ 1 */
> > ...
>Perhaps, what you want is like a patch at the end.
>Argument of IPR* macro is like "11-8".
>It's not a number, nor a mathematical notation(like 15-8=7), because of
>"0*N*-1" in IPRx macro
>definition. I'm sorry to have commited such a dain bramaged macros.
>
>I explain on this occasion.
>This was a kind of objection against the comment in asm-sh/irq.h. It says
>| * The shift value is now the number of bits to shift, not the number of
>| * bits/4. This is to make it easier to read the value directly from the
>| * datasheets. <snip>
>I don't think (12,8,4,0) is easier than (3,2,1,0). And what you read direct
>from the
>datasheet is (15-12,11-8,7-4,3-0). Hence the weired math.
>But, this is ugry, sorry. I will fix the macro to (12,8,4,0) style. It
>seems this is the majority.
>
>More important is later part.
>| <snip> The IPR address, addr, will be set from ipr_idx via the
>| * map_ipridx_to_addr function.
>I don't agree this method. Symbol reference back from core part is not
>good.
>I don't understand what this is intended to. If it is to abstract
>hardware, it's not enough.
>
>IRQx macro provids the way to setup IPRs without map_ipridx_to_addr().
>I think .address and .shift is a set, and is the hardware description.
>The macro packs them, at least for the eyes. The real one should come
>later, perhaps when
>we introduce IRQ number abstraction.
>That's why I end whth this implementation.
>
>So, could you please test this patch on your target ? > Kristoffer.
>Here on my board(shmin/7706), it seems no problem, so far.
>
>Best regards,
>/yoshii
>
>diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7709.c
>b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
>index dc9b211..47c7cf6 100644
>--- a/arch/sh/kernel/cpu/sh3/setup-sh7709.c
>+++ b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
>@@ -52,20 +52,30 @@ static int __init sh7709_devices_setup(v
> }
> __initcall(sh7709_devices_setup);
>
>-#define IPRx(A,N) .addr=A, .shift=0*N*-1
>+#define IPRx(A,N) .addr=A, .shift=N
> #define IPRA(N) IPRx(0xfffffee2UL,N)
> #define IPRB(N) IPRx(0xfffffee4UL,N)
>+#define IPRC(N) IPRx(0xa4000016UL,N)
>+#define IPRD(N) IPRx(0xa4000018UL,N)
> #define IPRE(N) IPRx(0xa400001aUL,N)
>
> static struct ipr_data sh7709_ipr_map[] = {
>- [16] = { IPRA(15-12), 2 }, /* TMU TUNI0 */
>- [17] = { IPRA(11-8), 4 }, /* TMU TUNI1 */
>- [22] = { IPRA(3-0), 2 }, /* RTC CUI */
>- [23 ... 26] = { IPRB(7-4), 3 }, /* SCI */
>- [27] = { IPRB(15-12), 2 }, /* WDT ITI */
>- [48 ... 51] = { IPRE(15-12), 7 }, /* DMA */
>- [52 ... 55] = { IPRE(11-8), 3 }, /* IRDA */
>- [56 ... 59] = { IPRE(7-4), 3 }, /* SCIF */
>+ [16] = { IPRA(12), 2 }, /* TMU TUNI0 */
>+ [17] = { IPRA( 8), 4 }, /* TMU TUNI1 */
>+ [18 ... 19] = { IPRA( 4), 1 }, /* TMU2 */
>+ [20 ... 22] = { IPRA( 0), 2 }, /* RTC */
>+ [23 ... 26] = { IPRB( 4), 3 }, /* SCI */
>+ [27] = { IPRB(12), 2 }, /* WDT ITI */
>+ [28 ... 29] = { IPRB( 8), 1 }, /* REF */
>+ [32] = { IPRC( 0), 1 }, /* IRQ0 */
>+ [33] = { IPRC( 4), 1 }, /* IRQ1 */
>+ [34] = { IPRC( 8), 1 }, /* IRQ2 */
>+ [35] = { IPRC(12), 1 }, /* IRQ3 */
>+ [36] = { IPRD( 0), 1 }, /* IRQ4 */
>+ [37] = { IPRD( 4), 1 }, /* IRQ5 */
>+ [48 ... 51] = { IPRE(12), 7 }, /* DMA */
>+ [52 ... 55] = { IPRE( 8), 3 }, /* IRDA */
>+ [56 ... 59] = { IPRE( 4), 3 }, /* SCIF */
> };
>
> void __init init_IRQ_ipr()
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From: Kristoffer E. <kri...@ho...> - 2007-04-04 11:38:44
|
Greetings,
Its hard to tell wether the patch is working or not, since Pata doesnt work
for hp6xx yet. But if it works for you then it should be fine.
Best wishes
Kristoffer Ericson
>From: tak...@op...
>To: "Kristoffer Ericson" <kri...@ho...>
>CC: lin...@li...
>Subject: Re: Setup-sh7709.c
>Date: Wed, 28 Mar 2007 02:46:25 +0900
>
>Hi, Kristoffer, and lists,
># This is not a patch commit.
>
>There is a issue whether external interrupts should be initialized in CPU
>setup code, or not.
>I initialize them in board setup code (boards/shmin/setup.c) now.
>I don't know the answer, perhaps CPU do definition, and board should do all
>of initialization, or
>ipr initialization and priority setting should be separated, or this is pin
>mux issue, or ... I don't know.
>So, forget it now, please :) Here is another topic.
>
> > + [33] = { IPRC(1), 1 }, /* IRQ 1 */
> > ...
>Perhaps, what you want is like a patch at the end.
>Argument of IPR* macro is like "11-8".
>It's not a number, nor a mathematical notation(like 15-8=7), because of
>"0*N*-1" in IPRx macro
>definition. I'm sorry to have commited such a dain bramaged macros.
>
>I explain on this occasion.
>This was a kind of objection against the comment in asm-sh/irq.h. It says
>| * The shift value is now the number of bits to shift, not the number of
>| * bits/4. This is to make it easier to read the value directly from the
>| * datasheets. <snip>
>I don't think (12,8,4,0) is easier than (3,2,1,0). And what you read direct
>from the
>datasheet is (15-12,11-8,7-4,3-0). Hence the weired math.
>But, this is ugry, sorry. I will fix the macro to (12,8,4,0) style. It
>seems this is the majority.
>
>More important is later part.
>| <snip> The IPR address, addr, will be set from ipr_idx via the
>| * map_ipridx_to_addr function.
>I don't agree this method. Symbol reference back from core part is not
>good.
>I don't understand what this is intended to. If it is to abstract
>hardware, it's not enough.
>
>IRQx macro provids the way to setup IPRs without map_ipridx_to_addr().
>I think .address and .shift is a set, and is the hardware description.
>The macro packs them, at least for the eyes. The real one should come
>later, perhaps when
>we introduce IRQ number abstraction.
>That's why I end whth this implementation.
>
>So, could you please test this patch on your target ? > Kristoffer.
>Here on my board(shmin/7706), it seems no problem, so far.
>
>Best regards,
>/yoshii
>
>diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7709.c
>b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
>index dc9b211..47c7cf6 100644
>--- a/arch/sh/kernel/cpu/sh3/setup-sh7709.c
>+++ b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
>@@ -52,20 +52,30 @@ static int __init sh7709_devices_setup(v
> }
> __initcall(sh7709_devices_setup);
>
>-#define IPRx(A,N) .addr=A, .shift=0*N*-1
>+#define IPRx(A,N) .addr=A, .shift=N
> #define IPRA(N) IPRx(0xfffffee2UL,N)
> #define IPRB(N) IPRx(0xfffffee4UL,N)
>+#define IPRC(N) IPRx(0xa4000016UL,N)
>+#define IPRD(N) IPRx(0xa4000018UL,N)
> #define IPRE(N) IPRx(0xa400001aUL,N)
>
> static struct ipr_data sh7709_ipr_map[] = {
>- [16] = { IPRA(15-12), 2 }, /* TMU TUNI0 */
>- [17] = { IPRA(11-8), 4 }, /* TMU TUNI1 */
>- [22] = { IPRA(3-0), 2 }, /* RTC CUI */
>- [23 ... 26] = { IPRB(7-4), 3 }, /* SCI */
>- [27] = { IPRB(15-12), 2 }, /* WDT ITI */
>- [48 ... 51] = { IPRE(15-12), 7 }, /* DMA */
>- [52 ... 55] = { IPRE(11-8), 3 }, /* IRDA */
>- [56 ... 59] = { IPRE(7-4), 3 }, /* SCIF */
>+ [16] = { IPRA(12), 2 }, /* TMU TUNI0 */
>+ [17] = { IPRA( 8), 4 }, /* TMU TUNI1 */
>+ [18 ... 19] = { IPRA( 4), 1 }, /* TMU2 */
>+ [20 ... 22] = { IPRA( 0), 2 }, /* RTC */
>+ [23 ... 26] = { IPRB( 4), 3 }, /* SCI */
>+ [27] = { IPRB(12), 2 }, /* WDT ITI */
>+ [28 ... 29] = { IPRB( 8), 1 }, /* REF */
>+ [32] = { IPRC( 0), 1 }, /* IRQ0 */
>+ [33] = { IPRC( 4), 1 }, /* IRQ1 */
>+ [34] = { IPRC( 8), 1 }, /* IRQ2 */
>+ [35] = { IPRC(12), 1 }, /* IRQ3 */
>+ [36] = { IPRD( 0), 1 }, /* IRQ4 */
>+ [37] = { IPRD( 4), 1 }, /* IRQ5 */
>+ [48 ... 51] = { IPRE(12), 7 }, /* DMA */
>+ [52 ... 55] = { IPRE( 8), 3 }, /* IRDA */
>+ [56 ... 59] = { IPRE( 4), 3 }, /* SCIF */
> };
>
> void __init init_IRQ_ipr()
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