linuxsh-dev

[PATCH 2/2] libata: pata_platform: Support polling-mode configuration.

[Paul M. <le...@li...>]

Some SH boards (old R2D-1 boards) have generally not had working CF
under libata, due to both buswidth issues (handled by Aoi Shinkai
in 43f4b8c7578b928892b6f01d374346ae14e5eb70), and buggy interrupt
controllers. For these sorts of boards simply disabling the IRQ and
polling ends up working fine.

This conditionalizes the IRQ resource for pata_platform and lets
platforms that want to use polling mode simply omit the resource
entirely.

Signed-off-by: Paul Mundt <le...@li...>

---

 drivers/ata/pata_platform.c |   33 ++++++++++++++++++++++++++-------
 1 file changed, 26 insertions(+), 7 deletions(-)

diff --git a/drivers/ata/pata_platform.c b/drivers/ata/pata_platform.c
index fc72a96..6b2d731 100644
--- a/drivers/ata/pata_platform.c
+++ b/drivers/ata/pata_platform.c
@@ -1,7 +1,7 @@
 /*
  * Generic platform device PATA driver
  *
- * Copyright (C) 2006  Paul Mundt
+ * Copyright (C) 2006 - 2007  Paul Mundt
  *
  * Based on pata_pcmcia:
  *
@@ -22,7 +22,7 @@
 #include <linux/pata_platform.h>
 
 #define DRV_NAME "pata_platform"
-#define DRV_VERSION "1.1"
+#define DRV_VERSION "1.2"
 
 static int pio_mask = 1;
 
@@ -120,15 +120,20 @@ static void pata_platform_setup_port(struct ata_ioports *ioaddr,
  *	Register a platform bus IDE interface. Such interfaces are PIO and we
  *	assume do not support IRQ sharing.
  *
- *	Platform devices are expected to contain 3 resources per port:
+ *	Platform devices are expected to contain at least 2 resources per port:
  *
  *		- I/O Base (IORESOURCE_IO or IORESOURCE_MEM)
  *		- CTL Base (IORESOURCE_IO or IORESOURCE_MEM)
+ *
+ *	and optionally:
+ *
  *		- IRQ	   (IORESOURCE_IRQ)
  *
  *	If the base resources are both mem types, the ioremap() is handled
  *	here. For IORESOURCE_IO, it's assumed that there's no remapping
  *	necessary.
+ *
+ *	If no IRQ resource is present, PIO polling mode is used instead.
  */
 static int __devinit pata_platform_probe(struct platform_device *pdev)
 {
@@ -137,11 +142,12 @@ static int __devinit pata_platform_probe(struct platform_device *pdev)
 	struct ata_port *ap;
 	struct pata_platform_info *pp_info;
 	unsigned int mmio;
+	int irq;
 
 	/*
 	 * Simple resource validation ..
 	 */
-	if (unlikely(pdev->num_resources != 3)) {
+	if ((pdev->num_resources != 3) && (pdev->num_resources != 2)) {
 		dev_err(&pdev->dev, "invalid number of resources\n");
 		return -EINVAL;
 	}
@@ -173,6 +179,11 @@ static int __devinit pata_platform_probe(struct platform_device *pdev)
 		(ctl_res->flags == IORESOURCE_MEM));
 
 	/*
+	 * And the IRQ
+	 */
+	irq = platform_get_irq(pdev, 0);
+
+	/*
 	 * Now that that's out of the way, wire up the port..
 	 */
 	host = ata_host_alloc(&pdev->dev, 1);
@@ -185,6 +196,14 @@ static int __devinit pata_platform_probe(struct platform_device *pdev)
 	ap->flags |= ATA_FLAG_SLAVE_POSS;
 
 	/*
+	 * Use polling mode if there's no IRQ
+	 */
+	if (irq < 0) {
+		ap->flags |= ATA_FLAG_PIO_POLLING;
+		ata_port_desc(ap, "no IRQ, using PIO polling");
+	}
+
+	/*
 	 * Handle the MMIO case
 	 */
 	if (mmio) {
@@ -213,9 +232,9 @@ static int __devinit pata_platform_probe(struct platform_device *pdev)
 		      (unsigned long long)ctl_res->start);
 
 	/* activate */
-	return ata_host_activate(host, platform_get_irq(pdev, 0),
-				 ata_interrupt, pp_info ? pp_info->irq_flags
-				 : 0, &pata_platform_sht);
+	return ata_host_activate(host, irq, ata_interrupt,
+				 pp_info ? pp_info->irq_flags : 0,
+				 &pata_platform_sht);
 }
 
 /**

[PATCH 1/2] libata: Support PIO polling-only hosts.

[Paul M. <le...@li...>]

By default ata_host_activate() expects a valid IRQ in order to
successfully register the host. This patch enables a special case
for registering polling-only hosts that either don't have IRQs
or have buggy IRQ generation (either in terms of handling or
sensing), which otherwise work fine.

Hosts that want to use polling mode can simply set ATA_FLAG_PIO_POLLING
and pass in a NULL IRQ handler or invalid (< 0) IRQ.

Signed-off-by: Paul Mundt <le...@li...>

---

 drivers/ata/libata-core.c |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index ec3ce12..a0cd6bb 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -7178,6 +7178,9 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
  *	request IRQ and register it.  This helper takes necessasry
  *	arguments and performs the three steps in one go.
  *
+ *	A NULL @irq_handler or invalid IRQ skips the IRQ registration
+ *	and expects the host to have set polling mode on the port.
+ *
  *	LOCKING:
  *	Inherited from calling layer (may sleep).
  *
@@ -7194,6 +7197,10 @@ int ata_host_activate(struct ata_host *host, int irq,
 	if (rc)
 		return rc;
 
+	/* Special case for polling mode */
+	if (!irq_handler || irq < 0)
+		return ata_host_register(host, sht);
+
 	rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
 			      dev_driver_string(host->dev), host);
 	if (rc)

The great ST40 purge of 2007

[Paul M. <le...@li...>]

On Wed, Jul 25, 2007 at 12:10:12PM +0900, Paul Mundt wrote:
> On Wed, Jul 25, 2007 at 09:51:22AM +0900, Paul Mundt wrote:
> > On Tue, Jul 24, 2007 at 11:46:52PM +0900, Magnus Damm wrote:
> > > sh: remove support for sh73180 and solution engine 73180
> > > 
> > > This patch removes old dead code:
> > > - kill off sh73180 cpu support
> > > - get rid of broken solution engine 73180 board support
> > > 
> > > Signed-off-by: Magnus Damm <da...@ig...>
> > 
> > Looks fine, thanks.
> > 
> Since we're in the purging mood, perhaps it's also worth looking at some
> others:
> 
I've also ripped out the left over ST40 cruft, which has been broken
in-tree the majority of the time since its last update, over 3 years ago
(at present it randomly breaks randconfigs, which is simply not good
form). I'll push the ST40 purge for 2.6.24-rc3, it's basically pretty
uninteresting:

 arch/sh/drivers/pci/Makefile   |    1
 arch/sh/drivers/pci/pci-st40.c |  488 ----------------------------------------- arch/sh/drivers/pci/pci-st40.h |  136 -----------
 arch/sh/kernel/cpu/sh4/probe.c |    8
 arch/sh/kernel/setup.c         |    1
 arch/sh/mm/Kconfig             |   21 -
 drivers/serial/sh-sci.h        |   18 -
 include/asm-sh/processor.h     |    2
 8 files changed, 3 insertions(+), 672 deletions(-)

ST can resurrect the ST40 support for 2.6.25 if they feel like it, or
simply continue to keep it out-of-tree.

Re: [patch] audit support for SH

[Paul M. <le...@li...>]

On Wed, Nov 07, 2007 at 02:04:46PM +0900, Yuichi Nakamura wrote:
> I found syscall audit does not work on SH(SuperH).
> I made patch to support syscall audit for SH.
> 
> Signed-off-by: Yuichi Nakamura<yn...@hi...>

Looks fine, but it's too late for 2.6.24. So this will go in to the 2.6.25
queue when I open up the 2.6.25 development tree. Thanks.

[patch] audit support for SH

[Yuichi N. <yn...@hi...>]

I found syscall audit does not work on SH(SuperH).
I made patch to support syscall audit for SH.

Signed-off-by: Yuichi Nakamura<yn...@hi...>
---
 arch/sh/kernel/entry-common.S |    8 ++++++--
 arch/sh/kernel/ptrace.c       |   19 +++++++++++++++----
 include/asm-sh/thread_info.h  |    2 ++
 init/Kconfig                  |    2 +-
 4 files changed, 24 insertions(+), 7 deletions(-)
diff -purN -X linux-2.6.24.rc1/Documentation/dontdiff linux-2.6.24.rc1.orig/arch/sh/kernel/entry-common.S linux-2.6.24.rc1/arch/sh/kernel/entry-common.S
--- linux-2.6.24.rc1.orig/arch/sh/kernel/entry-common.S	2007-11-06 16:03:17.000000000 +0900
+++ linux-2.6.24.rc1/arch/sh/kernel/entry-common.S	2007-11-06 18:16:11.000000000 +0900
@@ -224,7 +224,7 @@ work_resched:
 syscall_exit_work:
 	! r0: current_thread_info->flags
 	! r8: current_thread_info
-	tst	#_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP, r0
+	tst	#_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP |_TIF_SYSCALL_AUDIT, r0
 	bt/s	work_pending
 	 tst	#_TIF_NEED_RESCHED, r0
 #ifdef CONFIG_TRACE_IRQFLAGS
@@ -234,6 +234,8 @@ syscall_exit_work:
 #endif
 	sti
 	! XXX setup arguments...
+	mov	r15, r4
+	mov	#1, r5
 	mov.l	4f, r0			! do_syscall_trace
 	jsr	@r0
 	 nop
@@ -244,6 +246,8 @@ syscall_exit_work:
 syscall_trace_entry:
 	!                     	Yes it is traced.
 	! XXX setup arguments...
+	mov     r15, r4
+	mov     #0, r5
 	mov.l	4f, r11		! Call do_syscall_trace which notifies
 	jsr	@r11	    	! superior (will chomp R[0-7])
 	 nop
@@ -366,7 +370,7 @@ ENTRY(system_call)
 	!
 	get_current_thread_info r8, r10
 	mov.l	@(TI_FLAGS,r8), r8
-	mov	#_TIF_SYSCALL_TRACE, r10
+	mov	#(_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT), r10
 	tst	r10, r8
 	bf	syscall_trace_entry
 	!
diff -purN -X linux-2.6.24.rc1/Documentation/dontdiff linux-2.6.24.rc1.orig/arch/sh/kernel/ptrace.c linux-2.6.24.rc1/arch/sh/kernel/ptrace.c
--- linux-2.6.24.rc1.orig/arch/sh/kernel/ptrace.c	2007-11-06 16:03:17.000000000 +0900
+++ linux-2.6.24.rc1/arch/sh/kernel/ptrace.c	2007-11-07 08:46:14.000000000 +0900
@@ -6,7 +6,7 @@
  *	edited by Linus Torvalds
  *
  * SuperH version:   Copyright (C) 1999, 2000  Kaz Kojima & Niibe Yutaka
- *
+ * Audit support: Yuichi Nakamura <yn...@hi...>
  */
 #include <linux/kernel.h>
 #include <linux/sched.h>
@@ -24,6 +24,7 @@
 #include <asm/system.h>
 #include <asm/processor.h>
 #include <asm/mmu_context.h>
+#include <linux/audit.h>
 
 /*
  * does not yet catch signals sent when the child dies.
@@ -248,15 +249,18 @@ long arch_ptrace(struct task_struct *chi
 	return ret;
 }
 
-asmlinkage void do_syscall_trace(void)
+asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
 {
 	struct task_struct *tsk = current;
+	if (unlikely(current->audit_context) && entryexit)
+		audit_syscall_exit(AUDITSC_RESULT(regs->regs[0]),
+				   regs->regs[0]);
 
 	if (!test_thread_flag(TIF_SYSCALL_TRACE) &&
 	    !test_thread_flag(TIF_SINGLESTEP))
-		return;
+		goto out;
 	if (!(tsk->ptrace & PT_PTRACED))
-		return;
+		goto out;
 	/* the 0x80 provides a way for the tracing parent to distinguish
 	   between a syscall stop and SIGTRAP delivery */
 	ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) &&
@@ -271,4 +275,11 @@ asmlinkage void do_syscall_trace(void)
 		send_sig(tsk->exit_code, tsk, 1);
 		tsk->exit_code = 0;
 	}
+
+out:
+	if (unlikely(current->audit_context) && !entryexit)
+		audit_syscall_entry(AUDIT_ARCH_SH, regs->regs[3],
+				    regs->regs[4], regs->regs[5],
+				    regs->regs[6], regs->regs[7]);
+
 }
--- linux-2.6.24.rc1.orig/include/asm-sh/thread_info.h	2007-10-10 05:31:38.000000000 +0900
+++ linux-2.6.24.rc1/include/asm-sh/thread_info.h	2007-11-07 08:46:37.000000000 +0900
@@ -111,6 +111,7 @@ static inline struct thread_info *curren
 #define TIF_NEED_RESCHED	2	/* rescheduling necessary */
 #define TIF_RESTORE_SIGMASK	3	/* restore signal mask in do_signal() */
 #define TIF_SINGLESTEP		4	/* singlestepping active */
+#define TIF_SYSCALL_AUDIT	5
 #define TIF_USEDFPU		16	/* FPU was used by this task this quantum (SMP) */
 #define TIF_POLLING_NRFLAG	17	/* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE		18
@@ -121,6 +122,7 @@ static inline struct thread_info *curren
 #define _TIF_NEED_RESCHED	(1<<TIF_NEED_RESCHED)
 #define _TIF_RESTORE_SIGMASK	(1<<TIF_RESTORE_SIGMASK)
 #define _TIF_SINGLESTEP		(1<<TIF_SINGLESTEP)
+#define _TIF_SYSCALL_AUDIT		(1<<TIF_SYSCALL_AUDIT)
 #define _TIF_USEDFPU		(1<<TIF_USEDFPU)
 #define _TIF_POLLING_NRFLAG	(1<<TIF_POLLING_NRFLAG)
 #define _TIF_FREEZE		(1<<TIF_FREEZE)
--- linux-2.6.24.rc1.orig/init/Kconfig	2007-11-06 16:03:31.000000000 +0900
+++ linux-2.6.24.rc1/init/Kconfig	2007-11-06 16:19:08.000000000 +0900
@@ -226,7 +226,7 @@ config AUDIT
 
 config AUDITSYSCALL
 	bool "Enable system-call auditing support"
-	depends on AUDIT && (X86 || PPC || PPC64 || S390 || IA64 || UML || SPARC64)
+	depends on AUDIT && (X86 || PPC || PPC64 || S390 || IA64 || UML || SPARC64|| SUPERH)
 	default y if SECURITY_SELINUX
 	help
 	  Enable low-overhead system-call auditing infrastructure that


Regards,
-- 
Yuichi Nakamura
Hitachi Software Engineering Co., Ltd.
Japan SELinux Users Group(JSELUG): http://www.selinux.gr.jp/
SELinux Policy Editor: http://seedit.sourceforge.net/

Re: rts7751r2d cf_ide rework

[Paul M. <le...@li...>]

On Wed, Nov 07, 2007 at 11:38:42AM +0900, Magnus Damm wrote:
> On Nov 7, 2007 8:49 AM, Paul Mundt <le...@li...> wrote:
> > On Tue, Nov 06, 2007 at 08:43:16PM +0900, Magnus Damm wrote:
> > > I happen to have two of these R2D-1 boards and I can't get CF working
> > > using the latest kernel (latest sh-2.6 git, post 2.6.24-rc1) :
> > >
> > > ...
> > > irq 107: nobody cared (try booting with the "irqpoll" option)
> > > [stack dump]
> > > [call trace]
> > > handlers:
> > > [<8c24f660>] (ata_interrupt+0x0/0x240)
> > > Disabling IRQ #107
> > > ...
> > >
> > Did R2D-1 CF work for you with IRQs prior to this change? And does
> > reverting it fix get R2D-1 CF working again? The nobody cared thing is
> > curious, if you can provide the stack dump/call trace and register state
> > it might shed some light on why ata_interrupt isn't handling it.
> 
> The CF for R2D-1 was disabled without this patch - mainly because I
> had trouble trying to use it. I thought it had something to do with
> the access size and this patch would solve it, but apparently not. I
> wonder if CF support in 2.6.24-rc2 works on R2D-1 for other people...
> 
The access size problem causes a bus lock, so that's still a problem,
even if IRQs are hosed.

> I'm guessing that something is wrong with trigger level. The R2D-1
> documentation does say something about the CF IDE interrupt level to
> be H while the rest of the sources are L what ever that means. I don't
> think we can control it in the FPGA either.
> 
That suggestions that R2D-1 is using level high. It's possible to set the
sense selection on this already at request_irq() time, blackfin ended up
having to do this, and so added the ability to pass on IRQ flags via
private data. See pata_platform_info->irq_flags in linux/pata_platform.h.
I suppose we should be setting the sense selection level high for all of
the R2D boards, in that case.

> > > I can get things working by hacking in code to enable polling in
> > > pata_platform.c though, so I assume that the IO-ports are ok.
> > >
> > It might be worthwhile making the polling configurable, if you want to
> > tidy up a patch for that we can see if it's something work abstracting.
> > It's handy for debugging, at least.
> 
> The generic ata code needed an IRQ last time i checked. Otherwise i'd
> prefer to not set the interrupt in the platform data to enable
> polling. In the end the only thing required is this (mangled patch
> hunk):
> 
That's easy enough to fix. How about this?

---

 drivers/ata/libata-core.c   |    7 +++++++
 drivers/ata/pata_platform.c |   26 ++++++++++++++++++++------
 2 files changed, 27 insertions(+), 6 deletions(-)

diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index ec3ce12..a0cd6bb 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -7178,6 +7178,9 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
  *	request IRQ and register it.  This helper takes necessasry
  *	arguments and performs the three steps in one go.
  *
+ *	A NULL @irq_handler or invalid IRQ skips the IRQ registration
+ *	and expects the host to have set polling mode on the port.
+ *
  *	LOCKING:
  *	Inherited from calling layer (may sleep).
  *
@@ -7194,6 +7197,10 @@ int ata_host_activate(struct ata_host *host, int irq,
 	if (rc)
 		return rc;
 
+	/* Special case for polling mode */
+	if (!irq_handler || irq < 0)
+		return ata_host_register(host, sht);
+
 	rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
 			      dev_driver_string(host->dev), host);
 	if (rc)
diff --git a/drivers/ata/pata_platform.c b/drivers/ata/pata_platform.c
index fc72a96..1d712ec 100644
--- a/drivers/ata/pata_platform.c
+++ b/drivers/ata/pata_platform.c
@@ -1,7 +1,7 @@
 /*
  * Generic platform device PATA driver
  *
- * Copyright (C) 2006  Paul Mundt
+ * Copyright (C) 2006 - 2007  Paul Mundt
  *
  * Based on pata_pcmcia:
  *
@@ -22,7 +22,7 @@
 #include <linux/pata_platform.h>
 
 #define DRV_NAME "pata_platform"
-#define DRV_VERSION "1.1"
+#define DRV_VERSION "1.2"
 
 static int pio_mask = 1;
 
@@ -137,11 +137,12 @@ static int __devinit pata_platform_probe(struct platform_device *pdev)
 	struct ata_port *ap;
 	struct pata_platform_info *pp_info;
 	unsigned int mmio;
+	int irq;
 
 	/*
 	 * Simple resource validation ..
 	 */
-	if (unlikely(pdev->num_resources != 3)) {
+	if ((pdev->num_resources != 3) && (pdev->num_resources != 2)) {
 		dev_err(&pdev->dev, "invalid number of resources\n");
 		return -EINVAL;
 	}
@@ -173,6 +174,11 @@ static int __devinit pata_platform_probe(struct platform_device *pdev)
 		(ctl_res->flags == IORESOURCE_MEM));
 
 	/*
+	 * And the IRQ
+	 */
+	irq = platform_get_irq(pdev, 0);
+
+	/*
 	 * Now that that's out of the way, wire up the port..
 	 */
 	host = ata_host_alloc(&pdev->dev, 1);
@@ -185,6 +191,14 @@ static int __devinit pata_platform_probe(struct platform_device *pdev)
 	ap->flags |= ATA_FLAG_SLAVE_POSS;
 
 	/*
+	 * Use polling mode if there's no IRQ
+	 */
+	if (irq < 0) {
+		ap->flags |= ATA_FLAG_PIO_POLLING;
+		ata_port_desc(ap, "no IRQ, using PIO polling");
+	}
+
+	/*
 	 * Handle the MMIO case
 	 */
 	if (mmio) {
@@ -213,9 +227,9 @@ static int __devinit pata_platform_probe(struct platform_device *pdev)
 		      (unsigned long long)ctl_res->start);
 
 	/* activate */
-	return ata_host_activate(host, platform_get_irq(pdev, 0),
-				 ata_interrupt, pp_info ? pp_info->irq_flags
-				 : 0, &pata_platform_sht);
+	return ata_host_activate(host, irq, ata_interrupt,
+				 pp_info ? pp_info->irq_flags : 0,
+				 &pata_platform_sht);
 }
 
 /**

Re: rts7751r2d cf_ide rework

[Magnus D. <mag...@gm...>]

On Nov 7, 2007 8:49 AM, Paul Mundt <le...@li...> wrote:
> On Tue, Nov 06, 2007 at 08:43:16PM +0900, Magnus Damm wrote:
> > On Sep 21, 2007 3:07 PM, Paul Mundt <le...@li...> wrote:
> > > On Sat, Sep 15, 2007 at 11:00:46AM +0900, shinkoi2005 wrote:
> > > >  > Is the libata code working properly with 8 bit reads? Is this patch
> > > >  > all it takes to get CF working on R2D-1?
> > > >
> > > > At least, cf_ide_resources[](register map) is also incorrect with R2D-PLUS.
> > > > Please check follow kernel which support P2D-PLUS and AT/PC arch's ATA register map.
> > > > <http://www.superh-linux.org/archive/bsp/sh7751r_r2d/linux-2.6.14.4-R2D+_20060906.tar.bz2>
> > > > R2D* board's ide register map is compatible without register access size.
> > > >
> > > > Here is the same patch...
> > > > I can boot R2D-1 from IDE's rootfs with this patch.
> > > >
> > > I suppose we can do this, I'll tidy up the patch a bit and apply it,
> > > thanks. It's probably worth doing the same thing for R7780RP, at least
> > > for the 2 or 3 people that have one of those antiquated things :-)
> >
> > I happen to have two of these R2D-1 boards and I can't get CF working
> > using the latest kernel (latest sh-2.6 git, post 2.6.24-rc1) :
> >
> > ...
> > irq 107: nobody cared (try booting with the "irqpoll" option)
> > [stack dump]
> > [call trace]
> > handlers:
> > [<8c24f660>] (ata_interrupt+0x0/0x240)
> > Disabling IRQ #107
> > ...
> >
> Did R2D-1 CF work for you with IRQs prior to this change? And does
> reverting it fix get R2D-1 CF working again? The nobody cared thing is
> curious, if you can provide the stack dump/call trace and register state
> it might shed some light on why ata_interrupt isn't handling it.

The CF for R2D-1 was disabled without this patch - mainly because I
had trouble trying to use it. I thought it had something to do with
the access size and this patch would solve it, but apparently not. I
wonder if CF support in 2.6.24-rc2 works on R2D-1 for other people...

I played around with trying to move the enable-bit in the R2D-specific
IRLMON register to see if we are enabling the wrong interrupt, but it
seems like we are using the correct bit. It's the same bit used for CF
IDE as on R2D-PLUS btw. The interrupt documentation for R2D is pretty
vague though.

I'm guessing that something is wrong with trigger level. The R2D-1
documentation does say something about the CF IDE interrupt level to
be H while the rest of the sources are L what ever that means. I don't
think we can control it in the FPGA either.

Again, R2D-PLUS works just fine. I'm using the same CF card for the test too.

> You may also want to hack up some debug stuff that dumps out the IRQ desc
> state for IRQ #107, to make sure that nothing is being clobbered.

I've disabled all other interrupts in the fpga and just using the
single CF IDE source still makes the code bomb out. If I keep the IRQ
107 source but assigns it to a non-existing mask bit then no
interrupts are delivered and no crash - just as expected. The ata code
takes forever and eventually times out. Adding polling makes things
work again.

> > I can get things working by hacking in code to enable polling in
> > pata_platform.c though, so I assume that the IO-ports are ok.
> >
> It might be worthwhile making the polling configurable, if you want to
> tidy up a patch for that we can see if it's something work abstracting.
> It's handy for debugging, at least.

The generic ata code needed an IRQ last time i checked. Otherwise i'd
prefer to not set the interrupt in the platform data to enable
polling. In the end the only thing required is this (mangled patch
hunk):

+++ work/drivers/ata/pata_platform.c    2007-10-03 09:22:17.000000000 +0900
@@ -188,6 +188,10 @@ static int __devinit pata_platform_probe
        ap->pio_mask = pio_mask;
        ap->flags |= ATA_FLAG_SLAVE_POSS;

+#ifdef CONFIG_PATA_PLATFORM_POLLING
+       ap->flags |= ATA_FLAG_PIO_POLLING;
+#endif
+
        /*
         * Handle the MMIO case
         */

/ magnus

Re: rts7751r2d cf_ide rework

[Paul M. <le...@li...>]

On Tue, Nov 06, 2007 at 08:43:16PM +0900, Magnus Damm wrote:
> On Sep 21, 2007 3:07 PM, Paul Mundt <le...@li...> wrote:
> > On Sat, Sep 15, 2007 at 11:00:46AM +0900, shinkoi2005 wrote:
> > >  > Is the libata code working properly with 8 bit reads? Is this patch
> > >  > all it takes to get CF working on R2D-1?
> > >
> > > At least, cf_ide_resources[](register map) is also incorrect with R2D-PLUS.
> > > Please check follow kernel which support P2D-PLUS and AT/PC arch's ATA register map.
> > > <http://www.superh-linux.org/archive/bsp/sh7751r_r2d/linux-2.6.14.4-R2D+_20060906.tar.bz2>
> > > R2D* board's ide register map is compatible without register access size.
> > >
> > > Here is the same patch...
> > > I can boot R2D-1 from IDE's rootfs with this patch.
> > >
> > I suppose we can do this, I'll tidy up the patch a bit and apply it,
> > thanks. It's probably worth doing the same thing for R7780RP, at least
> > for the 2 or 3 people that have one of those antiquated things :-)
> 
> I happen to have two of these R2D-1 boards and I can't get CF working
> using the latest kernel (latest sh-2.6 git, post 2.6.24-rc1) :
> 
> ...
> irq 107: nobody cared (try booting with the "irqpoll" option)
> [stack dump]
> [call trace]
> handlers:
> [<8c24f660>] (ata_interrupt+0x0/0x240)
> Disabling IRQ #107
> ...
> 
Did R2D-1 CF work for you with IRQs prior to this change? And does
reverting it fix get R2D-1 CF working again? The nobody cared thing is
curious, if you can provide the stack dump/call trace and register state
it might shed some light on why ata_interrupt isn't handling it.

You may also want to hack up some debug stuff that dumps out the IRQ desc
state for IRQ #107, to make sure that nothing is being clobbered.

> I can get things working by hacking in code to enable polling in
> pata_platform.c though, so I assume that the IO-ports are ok.
> 
It might be worthwhile making the polling configurable, if you want to
tidy up a patch for that we can see if it's something work abstracting.
It's handy for debugging, at least.

Re: rts7751r2d cf_ide rework

[Magnus D. <mag...@gm...>]

On Sep 21, 2007 3:07 PM, Paul Mundt <le...@li...> wrote:
> On Sat, Sep 15, 2007 at 11:00:46AM +0900, shinkoi2005 wrote:
> >  > Is the libata code working properly with 8 bit reads? Is this patch
> >  > all it takes to get CF working on R2D-1?
> >
> > At least, cf_ide_resources[](register map) is also incorrect with R2D-PLUS.
> > Please check follow kernel which support P2D-PLUS and AT/PC arch's ATA register map.
> > <http://www.superh-linux.org/archive/bsp/sh7751r_r2d/linux-2.6.14.4-R2D+_20060906.tar.bz2>
> > R2D* board's ide register map is compatible without register access size.
> >
> > Here is the same patch...
> > I can boot R2D-1 from IDE's rootfs with this patch.
> >
> I suppose we can do this, I'll tidy up the patch a bit and apply it,
> thanks. It's probably worth doing the same thing for R7780RP, at least
> for the 2 or 3 people that have one of those antiquated things :-)

I happen to have two of these R2D-1 boards and I can't get CF working
using the latest kernel (latest sh-2.6 git, post 2.6.24-rc1) :

...
irq 107: nobody cared (try booting with the "irqpoll" option)
[stack dump]
[call trace]
handlers:
[<8c24f660>] (ata_interrupt+0x0/0x240)
Disabling IRQ #107
...

I can get things working by hacking in code to enable polling in
pata_platform.c though, so I assume that the IO-ports are ok.

The CF seems just fine on my R2D-PLUS board. CF on R2D-1 is broken for me.

/ magnus

Re: [PATCH] sh: Fix compression method when made uImage

[Paul M. <le...@li...>]

On Tue, Nov 06, 2007 at 12:52:02AM +0900, Nobuhiro Iwamatsu wrote:
> When uImage is made by using 'make uImage', zImage is used.
> If zImage is used, the compression method need not be set.
> However, it is set for "gzip" for a compression method.
> I corrected to set "none".
> 
> Signed-off-by: Nobuhiro Iwamatsu <iwa...@ni...>

Applied, thanks,

Re: RTE EDOSK7780 support?

[Manuel L. <ma...@ro...>]

On Tue, Nov 06, 2007 at 06:25:49AM +0900, Paul Mundt wrote:
> On Mon, Nov 05, 2007 at 09:52:30PM +0100, Manuel Lauss wrote:
> > I found a Renesas Europe EDOSK7780 board sitting unused on a shelf.
> > (Surprise! The 7780 _does_ exist outside of Japan after all ;-) )
> > Before I start to write some board support I'd like to ask if anyone
> > on this list has already done some preliminary support?
> > 
> MPC Data seems to have done a preliminary port to this board (they seem
> to regularly port to obscure RTE boards and never bother submitting
> patches back). You can find a kernel tree at http://www.shlinux.com once
> you go through their tedious registration process. Might give you a
> starting point, at least.

Thanks, I'll have a look
 
> Ironically you now have the opposite problem, in that we don't have any
> of the RTE boards here in Japan :-)

But you have access to newer and faster chips ;-) It seems I'm stuck
with the 7760 forever.


Regards,
	Manuel Lauss

Re: RTE EDOSK7780 support?

[Manuel L. <ma...@ro...>]

On Mon, Nov 05, 2007 at 10:15:51PM +0100, Fabio Giovagnini wrote:
> Do you work directly for Renesas?

No; but from what I understand my employer is also distributor for
renesas micros so that may explain this one board lying around ;-)
 
Regards,
	Manuel Lauss

Re: RTE EDOSK7780 support?

[Paul M. <le...@li...>]

On Mon, Nov 05, 2007 at 09:52:30PM +0100, Manuel Lauss wrote:
> I found a Renesas Europe EDOSK7780 board sitting unused on a shelf.
> (Surprise! The 7780 _does_ exist outside of Japan after all ;-) )
> Before I start to write some board support I'd like to ask if anyone
> on this list has already done some preliminary support?
> 
MPC Data seems to have done a preliminary port to this board (they seem
to regularly port to obscure RTE boards and never bother submitting
patches back). You can find a kernel tree at http://www.shlinux.com once
you go through their tedious registration process. Might give you a
starting point, at least.

Ironically you now have the opposite problem, in that we don't have any
of the RTE boards here in Japan :-)

Re: RTE EDOSK7780 support?

[Fabio G. <fab...@au...>]

Do you work directly for Renesas?


Alle 22:14, luned=EC 5 novembre 2007, Manuel Lauss ha scritto:
> On Mon, Nov 05, 2007 at 10:05:19PM +0100, Fabio Giovagnini wrote:
> > Where did you buy it?
> > Could buy one me too?
> > Thanks
>
> I didn't buy it, I found it on a shelf in the hw lab at the company.
>
> Regards,
> 	Manuel Lauss
>
> -------------------------------------------------------------------------
> This SF.net email is sponsored by: Splunk Inc.
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=2D-=20
=46abio Giovagnini

Aurion s.r.l.
via degli orti 11,
40050 Funo di Argelato (BO)
P.I e C.F.
00885711200
Tel. +39.335.8350919
=46ax +39.051.8659009

www.aurion-tech.com

account telefono VoIP skype (www.skype.com):
aurion.giovagnini

Re: RTE EDOSK7780 support?

[Manuel L. <ma...@ro...>]

On Mon, Nov 05, 2007 at 10:05:19PM +0100, Fabio Giovagnini wrote:
> Where did you buy it?
> Could buy one me too?
> Thanks

I didn't buy it, I found it on a shelf in the hw lab at the company.

Regards,
	Manuel Lauss

Re: RTE EDOSK7780 support?

[Fabio G. <fab...@au...>]

Where did you buy it?
Could buy one me too?
Thanks


Alle 21:52, luned=EC 5 novembre 2007, Manuel Lauss ha scritto:
> Hello,
>
> I found a Renesas Europe EDOSK7780 board sitting unused on a shelf.
> (Surprise! The 7780 _does_ exist outside of Japan after all ;-) )
> Before I start to write some board support I'd like to ask if anyone
> on this list has already done some preliminary support?
>
> Google gives a few hits but no real sources.
>
> Thanks,
> 	Manuel Lauss
>
> -------------------------------------------------------------------------
> This SF.net email is sponsored by: Splunk Inc.
> Still grepping through log files to find problems?  Stop.
> Now Search log events and configuration files using AJAX and a browser.
> Download your FREE copy of Splunk now >> http://get.splunk.com/
> _______________________________________________
> linuxsh-dev mailing list
> lin...@li...
> https://lists.sourceforge.net/lists/listinfo/linuxsh-dev

=2D-=20
=46abio Giovagnini

Aurion s.r.l.
via degli orti 11,
40050 Funo di Argelato (BO)
P.I e C.F.
00885711200
Tel. +39.335.8350919
=46ax +39.051.8659009

www.aurion-tech.com

account telefono VoIP skype (www.skype.com):
aurion.giovagnini

RTE EDOSK7780 support?

[Manuel L. <ma...@ro...>]

Hello,

I found a Renesas Europe EDOSK7780 board sitting unused on a shelf.
(Surprise! The 7780 _does_ exist outside of Japan after all ;-) )
Before I start to write some board support I'd like to ask if anyone
on this list has already done some preliminary support?

Google gives a few hits but no real sources.

Thanks,
	Manuel Lauss

Re: [RFC PATCH] I2C bus driver for SH7760 SoC, #2

[Paul M. <le...@li...>]

On Mon, Nov 05, 2007 at 06:23:13PM +0100, Manuel Lauss wrote:
> I2C master driver for the 2 I2C interfaces on the Renesas SH7760 SoC.
> 
> Signed-off-by: Manuel Lauss <ma...@ro...>
> 
Looks good, thanks for cleaning it up!

Acked-by: Paul Mundt <le...@li...>

Re: [RFC PATCH] I2C bus driver for SH7760 SoC

[Paul M. <le...@li...>]

On Mon, Nov 05, 2007 at 06:17:17PM +0100, Manuel Lauss wrote:
> On Tue, Oct 30, 2007 at 09:27:17AM +0900, Paul Mundt wrote:
> > > +	id->iobase = (void __iomem *)res->start;
> > 
> > You should be ioremap()'ing or ioport_map()'ing this. Either one should
> > be sane here. Presently this will whine if you use 64-bit resources. The
> > existing in-tree users that do this casting need to be changed also.
> 
> Hm, who'd want to enable 64bit resources on a CPU with a 29bit external
> address space? ;)

SH-X and later cores extend this to 32-bit physical, and it's likely that
this will be expanded in the not so distant future. We already need to
use 64-bit PTEs all over the place on SH-X2 and later, and it's
forseeable that the addressing bits will follow.

The 29-bit physical thing is purely legacy cruft at this point, even if
the SH-X cores do an abysmal job of breaking the native 32-bit boot pin
out of the package ;-)

[RFC PATCH] I2C bus driver for SH7760 SoC, #2

[Manuel L. <ma...@ro...>]

Hello,

Here goes try #2 for the sh7760 i2c bus driver.

Changes sind #1:
- incorporate Paul Mundt's suggestions

Comments appreciated!

Thanks,
	Manuel Lauss

---


I2C master driver for the 2 I2C interfaces on the Renesas SH7760 SoC.

Signed-off-by: Manuel Lauss <ma...@ro...>

---
 drivers/i2c/busses/Kconfig      |   11 +
 drivers/i2c/busses/Makefile     |    1 +
 drivers/i2c/busses/i2c-sh7760.c |  627 +++++++++++++++++++++++++++++++++++++++
 include/asm-sh/i2c-sh7760.h     |   23 ++
 4 files changed, 662 insertions(+), 0 deletions(-)

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index c466c6c..94d6cc9 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -675,4 +675,15 @@ config I2C_PMCMSP
 	  This driver can also be built as module. If so, the module
 	  will be called i2c-pmcmsp.
 
+config I2C_SH7760
+	tristate "Renesas SH7760 I2C Controller"
+	depends on I2C && CPU_SUBTYPE_SH7760
+	default n
+	help
+	  If you say yes to this option, support will be included for the
+	  built-in I2C interface of the Renesas SH7760 processor.
+
+	  This driver can also be built as a module.  If so, the module
+	  will be called i2c-sh7760.
+
 endmenu
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 81d43c2..95d6284 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_I2C_PROSAVAGE)	+= i2c-prosavage.o
 obj-$(CONFIG_I2C_PXA)		+= i2c-pxa.o
 obj-$(CONFIG_I2C_S3C2410)	+= i2c-s3c2410.o
 obj-$(CONFIG_I2C_SAVAGE4)	+= i2c-savage4.o
+obj-$(CONFIG_I2C_SH7760)	+= i2c-sh7760.o
 obj-$(CONFIG_I2C_SIBYTE)	+= i2c-sibyte.o
 obj-$(CONFIG_I2C_SIMTEC)	+= i2c-simtec.o
 obj-$(CONFIG_I2C_SIS5595)	+= i2c-sis5595.o
diff --git a/drivers/i2c/busses/i2c-sh7760.c b/drivers/i2c/busses/i2c-sh7760.c
new file mode 100644
index 0000000..cd2b183
--- /dev/null
+++ b/drivers/i2c/busses/i2c-sh7760.c
@@ -0,0 +1,627 @@
+/*
+ * I2C bus driver for the SH7760 I2C Interfaces.
+ *
+ * (c) 2005-2007 MSC Vertriebsges.m.b.H.
+ *	<ml...@ms...>., <ma...@ro...>
+ *
+ * licensed under the terms outlined in the file COPYING.
+ *
+ */
+
+/* NOTE: SMBus QUICK Probe feature is "emulated" by reading 1 byte from
+ *	 the slave address, because the SH7760 I2C cannot be programmed
+ *	 to send a stop immediately after receiving the slave ACK/NACK.
+ *	 If this behavior is not wanted, set platform_data.noquick to 1.
+ */
+
+#include <linux/completion.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/types.h>
+
+#include <asm/clock.h>
+#include <asm/i2c-sh7760.h>
+#include <asm/io.h>
+
+/* register offsets */
+#define I2CSCR		0x0		/* slave ctrl */
+#define I2CMCR		0x4		/* master ctrl */
+#define I2CSSR		0x8		/* slave status */
+#define I2CMSR		0xC		/* master status */
+#define I2CSIER		0x10		/* slave irq enable */
+#define I2CMIER		0x14		/* master irq enable */
+#define I2CCCR		0x18		/* clock dividers */
+#define I2CSAR		0x1c		/* slave address */
+#define I2CMAR		0x20		/* master address */
+#define I2CRXTX		0x24		/* data port */
+#define I2CFCR		0x28		/* fifo control */
+#define I2CFSR		0x2C		/* fifo status */
+#define I2CFIER		0x30		/* fifo irq enable */
+#define I2CRFDR		0x34		/* rx fifo count */
+#define I2CTFDR		0x38		/* tx fifo count */
+
+#define REGSIZE		0x3C
+
+#define MCR_MDBS	0x80
+#define MCR_FSCL	0x40		/* override SCL pin */
+#define MCR_FSDA	0x20		/* override SDA pin */
+#define MCR_OBPC	0x10		/* override pins */
+#define MCR_MIE		0x08		/* master if enable */
+#define MCR_TSBE	0x04
+#define MCR_FSB		0x02		/* force stop bit */
+#define MCR_ESG		0x01		/* enable start generation */
+
+#define MSR_MNR		0x40		/* nack received */
+#define MSR_MAL		0x20		/* arbitration lost */
+#define MSR_MST		0x10		/* sent a stop */
+#define MSR_MDE		0x08
+#define MSR_MDT		0x04
+#define MSR_MDR		0x02
+#define MSR_MAT		0x01		/* sent out slave addr */
+
+#define MIE_MNRE	0x40		/* nack irq en */
+#define MIE_MALE	0x20		/* arblos irq en */
+#define MIE_MSTE	0x10		/* stop irq en */
+#define MIE_MDEE	0x08
+#define MIE_MDTE	0x04
+#define MIE_MDRE	0x02
+#define MIE_MATE	0x01		/* address sent irq en */
+
+#define FCR_RFRST	0x02		/* reset rx fifo */
+#define FCR_TFRST	0x01		/* reset tx fifo */
+
+#define FSR_TEND	0x04
+#define FSR_RDF		0x02		/* rx fifo trigger */
+#define FSR_TDFE	0x01
+
+#define FIER_TEIE	0x04		/* tx fifo empty irq en */
+#define FIER_RXIE	0x02		/* rx fifo trig irq en */
+#define FIER_TXIE	0x01		/* tx fifo trig irq en */
+
+#define FIFO_SIZE	16
+
+struct cami2c {
+	void __iomem *iobase;	/* channel base address */
+	struct i2c_adapter adap;
+
+	/* message processing */
+	struct i2c_msg	*msg;
+#define IDF_SEND	1
+#define IDF_RECV	2
+#define IDF_STOP	4
+	int		flags;
+
+#define IDS_DONE	1
+#define IDS_ARBLOST	2
+#define IDS_NACK	4
+	int		status;
+	struct completion xfer_done;
+
+	u32 func;		/* supported functions */
+	int irq;		/* IRQ vector */
+	struct resource *ioarea;
+};
+
+static inline void OUT32(struct cami2c *cam, int reg, unsigned long val)
+{
+	ctrl_outl(val, (unsigned long)cam->iobase + reg);
+}
+
+static inline unsigned long IN32(struct cami2c *cam, int reg)
+{
+	return ctrl_inl((unsigned long)cam->iobase + reg);
+}
+
+static irqreturn_t sh7760_i2c_irq(int irq, void *ptr)
+{
+	struct cami2c *id = ptr;
+	struct i2c_msg *msg;
+	unsigned long msr, fsr, fier, len;
+	char *data;
+
+	msg = id->msg;
+	data = msg->buf;
+
+	msr = IN32(id, I2CMSR);
+	fsr = IN32(id, I2CFSR);
+
+	/* arbitration lost */
+	if (msr & MSR_MAL) {
+		OUT32(id, I2CMCR, 0);
+		OUT32(id, I2CSCR, 0);
+		OUT32(id, I2CSAR, 0);
+		id->status |= IDS_DONE | IDS_ARBLOST;
+		goto out;
+	}
+
+	if (msr & MSR_MNR) {
+		/* NACK handling is very screwed up.  After receiving a
+		 * NAK IRQ one has to wait a bit  before writing to any
+		 * registers, or the ctl will lock up. After that delay
+		 * do a normal i2c stop. Then wait at least 1 ms before
+		 * attempting another xfer or risk another ctl hang.
+		 */
+		udelay(100);	/* wait or risk ctl hang */
+		OUT32(id, I2CFCR, FCR_RFRST | FCR_TFRST);
+		OUT32(id, I2CMCR, MCR_MIE | MCR_FSB);
+		OUT32(id, I2CFIER, 0);
+		OUT32(id, I2CMIER, MIE_MSTE);
+		OUT32(id, I2CSCR, 0);
+		OUT32(id, I2CSAR, 0);
+		id->status |= IDS_NACK;
+		msr &= ~MSR_MAT;
+		fsr = 0;
+		/* In some cases the MST bit is also set; so don't go
+		 * to the end of the handler
+		 */
+	}
+
+	/* i2c-stop was sent */
+	if (msr & MSR_MST) {
+		id->status |= IDS_DONE;
+		goto out;
+	}
+
+	/* i2c slave addr was sent; set to "normal" operation */
+	if (msr & MSR_MAT)
+		OUT32(id, I2CMCR, MCR_MIE);
+
+	fier = IN32(id, I2CFIER);
+
+	if (fsr & FSR_RDF) {
+		/* data in rx fifo */
+		len = IN32(id, I2CRFDR);
+		if (msg->len <= len) {
+			/* all data received, stop if required */
+			if (id->flags & IDF_STOP) {
+				OUT32(id, I2CMCR, MCR_MIE | MCR_FSB);
+				OUT32(id, I2CFIER, 0);
+				/* manual says: wait >= 0.5 SCL times */
+				udelay(5);
+				/* next int should be MST */
+			} else {
+				id->status |= IDS_DONE;
+				/* keep the RDF bit: ctrl holds SCL low
+				 * until the setup for the next i2c_msg
+				 * clears this bit and ctl resumes work.
+				 */
+				fsr &= ~FSR_RDF;
+			}
+		}
+		/* read fifo */
+		while (msg->len && len) {
+			*data++ = IN32(id, I2CRXTX);
+			msg->len--;
+			len--;
+		}
+
+		if (msg->len) {
+			/* (re)adjust rx-fifo trigger */
+			len = (msg->len >= FIFO_SIZE) ? FIFO_SIZE - 1
+						      : msg->len - 1;
+
+			OUT32(id, I2CFCR, FCR_TFRST | ((len & 0xf) << 4));
+		}
+
+	} else if (id->flags & IDF_SEND) {
+		if ((fsr & FSR_TEND) && (msg->len < 1)) {
+			/* transfer has ended, and no more data to send */
+			if (id->flags & IDF_STOP) {
+				OUT32(id, I2CMCR, MCR_MIE | MCR_FSB);
+			} else {
+				id->status |= IDS_DONE;
+				/* keep the TEND bit: ctl holds SCL low
+				 * until the setup for the next i2c_msg
+				 * clears this bit and ctl resumes work.
+				 */
+				fsr &= ~FSR_TEND;
+			}
+		}
+		if (fsr & FSR_TDFE) {
+			/* free space in tx fifo */
+			while (msg->len && (IN32(id, I2CTFDR) < FIFO_SIZE)) {
+				OUT32(id, I2CRXTX, *data++);
+				msg->len--;
+			}
+
+			if (msg->len < 1) {
+				fier &= ~FIER_TXIE;
+				OUT32(id, I2CFIER, fier);
+			} else {
+				/* adjust tx-fifo trigger */
+				len = (msg->len >= FIFO_SIZE) ? 2 : 0;
+				OUT32(id, I2CFCR,
+					  FCR_RFRST | ((len & 3) << 2));
+			}
+		}
+	}
+out:
+	if (id->status & IDS_DONE) {
+		OUT32(id, I2CMIER, 0);
+		OUT32(id, I2CFIER, 0);
+		id->msg = NULL;
+		complete(&id->xfer_done);
+	}
+	/* clear status flags and ctrl resumes work */
+	OUT32(id, I2CMSR, ~msr);
+	OUT32(id, I2CFSR, ~fsr);
+	OUT32(id, I2CSSR, 0);
+
+	return IRQ_HANDLED;
+}
+
+
+/* prepare and start a master receive operation */
+static void sh7760_i2c_mrecv(struct cami2c *id)
+{
+	int len;
+
+	/* set the slave addr reg; otherwise rcv wont work! */
+	OUT32(id, I2CSAR, 0xfe);
+	OUT32(id, I2CMAR, (id->msg->addr << 1) | 1);
+
+	/* adjust rx fifo trigger */
+	if (id->msg->len >= FIFO_SIZE)
+		len = FIFO_SIZE - 1;	/* trigger at fifo full */
+	else
+		len = id->msg->len - 1;	/* trigger before all received */
+
+	OUT32(id, I2CFCR, FCR_RFRST | FCR_TFRST);
+	OUT32(id, I2CFCR, FCR_TFRST | ((len & 0xF) << 4));
+
+	id->flags |= IDF_RECV;
+
+	OUT32(id, I2CMSR, 0);
+	if (id->msg->flags & I2C_M_NOSTART)
+		OUT32(id, I2CMCR, MCR_MIE);
+	else
+		OUT32(id, I2CMCR, MCR_MIE | MCR_ESG);
+
+	OUT32(id, I2CMIER, MIE_MNRE | MIE_MALE | MIE_MSTE | MIE_MATE);
+	OUT32(id, I2CFIER, FIER_RXIE);
+}
+
+/* prepare and start a master send operation */
+static void sh7760_i2c_msend(struct cami2c *id)
+{
+	int len;
+
+	/* set the slave addr reg; otherwise xmit wont work! */
+	OUT32(id, I2CSAR, 0xfe);
+	OUT32(id, I2CMAR, (id->msg->addr << 1) | 0);
+
+	/* adjust tx fifo trigger */
+	if (id->msg->len >= FIFO_SIZE)
+		len = 2;	/* trig: 2 bytes left in TX fifo */
+	else
+		len = 0;	/* trig: 8 bytes left in TX fifo */
+
+	OUT32(id, I2CFCR, FCR_RFRST | FCR_TFRST);
+	OUT32(id, I2CFCR, FCR_RFRST | ((len & 3) << 2));
+
+	while (id->msg->len && IN32(id, I2CTFDR) < FIFO_SIZE) {
+		OUT32(id, I2CRXTX, *(id->msg->buf));
+		(id->msg->len)--;
+		(id->msg->buf)++;
+	}
+
+	id->flags |= IDF_SEND;
+
+	OUT32(id, I2CMSR, 0);
+	if (id->msg->flags & I2C_M_NOSTART)
+		OUT32(id, I2CMCR, MCR_MIE);
+	else
+		OUT32(id, I2CMCR, MCR_MIE | MCR_ESG);
+
+	OUT32(id, I2CFSR, 0);
+
+	OUT32(id, I2CMIER, MIE_MNRE | MIE_MALE | MIE_MSTE | MIE_MATE);
+	OUT32(id, I2CFIER, FIER_TEIE | (id->msg->len ? FIER_TXIE : 0));
+}
+
+static inline int sh7760_i2c_busy_check(struct cami2c *id)
+{
+	return (IN32(id, I2CMCR) & MCR_FSDA);
+}
+
+static int sh7760_i2c_master_xfer(struct i2c_adapter *adap,
+				  struct i2c_msg *msgs,
+				  int num)
+{
+	struct cami2c *id = adap->algo_data;
+	struct i2c_msg *msg = msgs, qmsg;
+	int i, addr, retr;
+	unsigned char buf;	/* dummy for qmsg */
+
+	if (sh7760_i2c_busy_check(id)) {
+		pr_debug("sh7760-i2c%d: bus is busy!\n", adap->nr);
+		num = -EBUSY;
+	}
+
+	i = 0;
+	while ((i < num) && (num > 0)) {
+		addr = msg->addr << 1;
+		if (msg->len < 1) {
+			/* SMBus Quick "emulation":
+			 * setup a dummy msg to read 1 byte from addr.
+			 */
+			qmsg.addr = msg->addr;
+			qmsg.len = 1;
+			qmsg.flags = msg->flags;
+			qmsg.buf = &buf;
+			addr |= 1;
+			id->msg = &qmsg;
+		} else {
+			if (msg->flags & I2C_M_RD)
+				addr |= 1;
+			if (msg->flags & I2C_M_REV_DIR_ADDR)
+				addr ^= 1;
+			msg->addr = addr >> 1;
+			id->msg = msg;
+		}
+		retr = adap->retries;
+
+retry:
+		id->flags = ((i == (num-1)) ? IDF_STOP : 0);
+		id->status = 0;
+		init_completion(&id->xfer_done);
+
+		if (addr & 1)
+			sh7760_i2c_mrecv(id);
+		else
+			sh7760_i2c_msend(id);
+
+		wait_for_completion(&id->xfer_done);
+
+		if (id->status == 0) {
+			num = -EIO;
+			break;
+		}
+
+		if (id->status & IDS_NACK) {
+			/* little delay. Without it, subsequent transfers
+			 * hang the i2c ctl... */
+			mdelay(1);
+			num = -EREMOTEIO;
+			break;
+		}
+
+		if (id->status & IDS_ARBLOST) {
+			if (retr--) {
+				mdelay(2);
+				goto retry;
+			}
+			num = -EREMOTEIO;
+			break;
+		}
+
+		/* message successfully processed. YAY! */
+		msg++;
+		i++;
+	}
+
+	id->msg = NULL;
+	id->flags = 0;
+	id->status = 0;
+
+	OUT32(id, I2CMCR, 0);
+	OUT32(id, I2CMSR, 0);
+	OUT32(id, I2CMIER, 0);
+	OUT32(id, I2CFIER, 0);
+
+	/* important: reset slave regs too: master mode enables slave
+	 * module for receive ops (ack, data). Without this reset,
+	 * eternal bus activity might be reported after NACK / ARBLOST.
+	 */
+	OUT32(id, I2CSCR, 0);
+	OUT32(id, I2CSAR, 0);
+	OUT32(id, I2CSSR, 0);
+
+	return num;
+}
+
+static u32 sh7760_i2c_func(struct i2c_adapter *adap)
+{
+	struct cami2c *id = adap->algo_data;
+	return id->func;
+}
+
+static struct i2c_algorithm sh7760_i2c_algo = {
+	.master_xfer	= sh7760_i2c_master_xfer,
+	.functionality	= sh7760_i2c_func,
+};
+
+/* calculate CCR register setting for a desired scl clock */
+static int __devinit calc_CCR(unsigned long scl_hz)
+{
+	struct clk *mclk;
+	unsigned long mck, m1, dff, odff, iclk;
+	signed char cdf, cdfm = 0;
+	int scgd, scgdm;
+
+	mclk = clk_get(NULL, "module_clk");
+	if (IS_ERR(mclk)) {
+		return PTR_ERR(mclk);
+	} else {
+		mck = mclk->rate;
+		clk_put(mclk);
+	}
+
+	/* pclock/CDF = i2c_module clock (iclk)/SCGD = SCL */
+	odff = scl_hz;
+	scgdm = cdfm = m1 = 0;
+	for (cdf = 3; cdf >= 0; cdf--) {
+		iclk = mck / (1 + cdf);
+		/* iclk must not be > 20MHz */
+		if (iclk >= 20000000)
+			continue;
+		for (scgd = 0; scgd < 63; scgd++) {
+			m1 = iclk / (20 + (scgd << 3));
+			dff = abs(scl_hz - m1);
+			if (dff < odff) {
+				odff = dff;
+				cdfm = cdf;
+				scgdm = scgd;
+			}
+		}
+	}
+	/* fail if more than 25% off of requested SCL */
+	if (odff > (scl_hz >> 2))
+		return -EINVAL;
+
+	/* create a CCR register value */
+	m1 = ((scgdm & 63) << 2) | (cdfm & 3);
+
+	return m1;
+}
+
+/* register a channel with the i2c core */
+static int __devinit sh7760_i2c_probe(struct platform_device *pdev)
+{
+	struct sh7760_i2c_platdata *pd;
+	struct resource *res;
+	struct cami2c *id;
+	int ret;
+
+	pd = pdev->dev.platform_data;
+	if (!pd) {
+		ret = -ENODEV;
+		dev_err(&pdev->dev, "no platform_data!\n");
+		goto out0;
+	}
+
+	ret = -ENOMEM;
+	id = kzalloc(sizeof(struct cami2c), GFP_KERNEL);
+	if (!id) {
+		dev_err(&pdev->dev, "no mem for private data\n");
+		goto out0;
+	}
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res) {
+		dev_err(&pdev->dev, "no mmio resources\n");
+		goto out1;
+	}
+
+	id->ioarea = request_mem_region(res->start, REGSIZE, pdev->name);
+	if (!id->ioarea) {
+		dev_err(&pdev->dev, "mmio already reserved\n");
+		ret = -EBUSY;
+		goto out1;
+	}
+
+	id->iobase = ioremap(res->start, REGSIZE);
+	if (!id->iobase) {
+		dev_err(&pdev->dev, "cannot ioremap\n");
+		goto out2;
+	}
+
+	id->irq = platform_get_irq(pdev, 0);
+	id->func = I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+	if (pd->noquick)
+		id->func &= ~I2C_FUNC_SMBUS_QUICK;
+
+	id->adap.nr = pdev->id;
+	id->adap.algo = &sh7760_i2c_algo;
+	id->adap.class = I2C_CLASS_ALL;
+	id->adap.timeout = 100;
+	id->adap.retries = 3;
+	id->adap.algo_data = id;
+	id->adap.dev.parent = &pdev->dev;
+	strcpy(id->adap.name, SH7760_I2C_DEVNAME);
+
+	OUT32(id, I2CMCR, 0);
+	OUT32(id, I2CMSR, 0);
+	OUT32(id, I2CMIER, 0);
+	OUT32(id, I2CMAR, 0);
+	OUT32(id, I2CSIER, 0);
+	OUT32(id, I2CSAR, 0);
+	OUT32(id, I2CSCR, 0);
+	OUT32(id, I2CSSR, 0);
+	OUT32(id, I2CFIER, 0);
+	OUT32(id, I2CFCR, FCR_RFRST | FCR_TFRST);
+	OUT32(id, I2CFSR, 0);
+
+	ret = calc_CCR(pd->speed_khz * 1000);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "invalid SCL clock\n");
+		goto out3;
+	}
+	OUT32(id, I2CCCR, ret);
+
+	if (request_irq(id->irq, sh7760_i2c_irq, IRQF_DISABLED,
+			SH7760_I2C_DEVNAME, id)) {
+		dev_err(&pdev->dev, "cannot get irq %d\n", id->irq);
+		ret = -EBUSY;
+		goto out3;
+	}
+
+	ret = i2c_add_numbered_adapter(&id->adap);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "reg adap failed: %d\n", ret);
+		goto out4;
+	}
+
+	platform_set_drvdata(pdev, id);
+
+	printk(KERN_INFO "SH7760 I2C-%d, %d kHz, mmio %08x, irq %d\n",
+		id->adap.nr, pd->speed_khz, res->start, id->irq);
+
+	return 0;
+
+out4:
+	free_irq(id->irq, id);
+out3:
+	iounmap(id->iobase);
+out2:
+	release_resource(id->ioarea);
+	kfree(id->ioarea);
+out1:
+	kfree(id);
+out0:
+	return ret;
+}
+
+static int __devexit sh7760_i2c_remove(struct platform_device *pdev)
+{
+	struct cami2c *id = platform_get_drvdata(pdev);
+
+	i2c_del_adapter(&id->adap);
+	free_irq(id->irq, id);
+	iounmap(id->iobase);
+	release_resource(id->ioarea);
+	kfree(id->ioarea);
+	kfree(id);
+	platform_set_drvdata(pdev, NULL);
+
+	return 0;
+}
+
+static struct platform_driver sh7760_i2c_drv = {
+	.driver	= {
+		.name	= SH7760_I2C_DEVNAME,
+		.owner	= THIS_MODULE,
+	},
+	.probe		= sh7760_i2c_probe,
+	.remove		= __devexit_p(sh7760_i2c_remove),
+};
+
+static int __init sh7760_i2c_init(void)
+{
+	return platform_driver_register(&sh7760_i2c_drv);
+}
+
+static void __exit sh7760_i2c_exit(void)
+{
+	platform_driver_unregister(&sh7760_i2c_drv);
+}
+
+module_init(sh7760_i2c_init);
+module_exit(sh7760_i2c_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("SH7760 I2C bus driver");
+MODULE_AUTHOR("Manuel Lauss <ma...@ro...>");
diff --git a/include/asm-sh/i2c-sh7760.h b/include/asm-sh/i2c-sh7760.h
new file mode 100644
index 0000000..d2a86bd
--- /dev/null
+++ b/include/asm-sh/i2c-sh7760.h
@@ -0,0 +1,23 @@
+/*
+ * MMIO/IRQ and platform data for SH7760 I2C channels
+ */
+
+#ifndef _I2C_SH7760_H_
+#define _I2C_SH7760_H_
+
+#define SH7760_I2C_DEVNAME	"i2c-sh7760"
+
+#define SH7760_I2C0_MMIO	0xFE140000
+#define SH7760_I2C0_MMIOEND	0xFE14003B
+#define SH7760_I2C0_IRQ		62
+
+#define SH7760_I2C1_MMIO	0xFE150000
+#define SH7760_I2C1_MMIOEND	0xFE15003B
+#define SH7760_I2C1_IRQ		63
+
+struct sh7760_i2c_platdata {
+	unsigned int speed_khz;
+	unsigned int noquick;
+};
+
+#endif
-- 
1.5.3.4

Re: [RFC PATCH] I2C bus driver for SH7760 SoC

[Manuel L. <ma...@ro...>]

Hi Paul,

On Tue, Oct 30, 2007 at 09:27:17AM +0900, Paul Mundt wrote:
> Basically this looks good to me, though a few minor nits:
> 
> On Thu, Oct 25, 2007 at 08:23:27PM +0200, Manuel Lauss wrote:
> > +struct cami2c {
> > +	void __iomem *iobase;	/* channel base address */
> > +	struct i2c_adapter adap;
> > +	u32 func;		/* supported functions */
> > +	int irq;		/* IRQ vector */
> > +	int chan;		/* channel number (0 or 1) */
> > +
> chan should be a bitfield? Or dynamically calculated based on the number
> of registered platform devices?

It's useless junk now. Removed.

 
> > +/* calculate CCR register setting for a desired scl clock */
> > +static int __devinit calc_CCR(unsigned long scl_freq)
> > +{
> > +	struct clk *mclk;
> > +	unsigned long mck, m1, dff, odff, iclk;
> > +	signed char cdf, cdfm = 0;
> > +	int scgd, scgdm;
> > +
> > +	mclk = clk_get(NULL, "module_clk");
> > +	if (!mclk) {
> > +		mck = CONFIG_SH_PCLK_FREQ;
> 
> If the module_clk isn't valid, the system is going to be in bad enough
> shape as it is. You should error out on this rather than using
> SH_PCLK_FREQ directly. ie,
> 
> 	if (IS_ERR(mclk))
> 		return PTR_ERR(mclk);

done.


> > +	id->iobase = (void __iomem *)res->start;
> 
> You should be ioremap()'ing or ioport_map()'ing this. Either one should
> be sane here. Presently this will whine if you use 64-bit resources. The
> existing in-tree users that do this casting need to be changed also.

Hm, who'd want to enable 64bit resources on a CPU with a 29bit external
address space? ;)
Added ioremap() for good measure.

 
> > +out2:	free_irq(id->irq, (void *)id);
> 
> Useless cast.

Gone.


> > +static int __devexit sh7760_i2c_remove(struct platform_device *pdev)
> > +{
> > +	struct cami2c *id = platform_get_drvdata(pdev);
> > +
> > +	if (id) {
> > +		i2c_del_adapter(&id->adap);
> > +		free_irq(id->irq, (void *)id);
> 
> Likewise.

Gone too.

Thank you!
	Manuel Lauss

[PATCH] sh: Fix compression method when made uImage

[Nobuhiro I. <iwa...@ni...>]

When uImage is made by using 'make uImage', zImage is used.
If zImage is used, the compression method need not be set.
However, it is set for "gzip" for a compression method.
I corrected to set "none".

Signed-off-by: Nobuhiro Iwamatsu <iwa...@ni...>
---
 arch/sh/boot/Makefile |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile
index 4c5ffdc..1b0f5be 100644
--- a/arch/sh/boot/Makefile
+++ b/arch/sh/boot/Makefile
@@ -39,7 +39,7 @@ KERNEL_LOAD	:= $(shell /bin/bash -c 'printf "0x%8x" \
 
 quiet_cmd_uimage = UIMAGE  $@
       cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \
-		   -C gzip -a $(KERNEL_LOAD) -e $(KERNEL_LOAD) \
+		   -C none -a $(KERNEL_LOAD) -e $(KERNEL_LOAD) \
 		   -n 'Linux-$(KERNELRELEASE)' -d $< $@
 
 $(obj)/uImage: $(obj)/zImage FORCE
-- 
1.5.3.1

Re: 2.6.23: random segfaults

[Paul M. <le...@li...>]

On Mon, Nov 05, 2007 at 08:49:54AM +0100, Manuel Lauss wrote:
> On Mon, Nov 05, 2007 at 04:37:07PM +0900, Paul Mundt wrote:
> > On Wed, Oct 17, 2007 at 12:32:45PM -0400, Mike Frysinger wrote:
> > > On Wednesday 17 October 2007, Paul Mundt wrote:
> > > i'm seeing random crashes on my lantank running 2.6.23 ... rebooting into 
> > > 2.6.16.xx works fine.
> > > 
> > > that has a SH7751R with 2-way caches in write-back mode ... havent had time to 
> > Well, no luck reproducing things on SH7751R or SH7760. If you have a
> > reproduceable workload, that would really help.
> 
> Usually I let it compile GCC or other large codebases (qt-4, openssl). When
> the gcc compilejob survives (after ~48 hours) I assume the system is stable ;)
> 
On 4-way dcache I don't see any problems at least. My SH7785 has been
building various toolchains for about a week straight without any issues,
though that has been off of SATA, I have not tried alternate roots.

I also wrote an exerciser for breaking COW pages, which stresses the
kmap_coherent() path pretty well, but have likewise not hit issues there
either (on 2-way or 4-way). Looks like the next step is large builds on
2-way or direct-mapped, then.

Re: 2.6.23: random segfaults

[Manuel L. <ma...@ro...>]

Hi Paul,

On Mon, Nov 05, 2007 at 04:37:07PM +0900, Paul Mundt wrote:
> On Wed, Oct 17, 2007 at 12:32:45PM -0400, Mike Frysinger wrote:
> > On Wednesday 17 October 2007, Paul Mundt wrote:
> > i'm seeing random crashes on my lantank running 2.6.23 ... rebooting into 
> > 2.6.16.xx works fine.
> > 
> > that has a SH7751R with 2-way caches in write-back mode ... havent had time to 
> Well, no luck reproducing things on SH7751R or SH7760. If you have a
> reproduceable workload, that would really help.

Usually I let it compile GCC or other large codebases (qt-4, openssl). When
the gcc compilejob survives (after ~48 hours) I assume the system is stable ;)

> On the other hand, there was at least one bug in the page colouring, so
> I've ripped out the old code and made the kmap_coherent() interface more
> consistently used. This implementation can still be optimized with
> regards to the page's dcache state, but I'm more concerned about
> correctness at the moment. See how the following patch works for you.

I'll let it run for a few days.

Thanks!
	Manuel Lauss

Re: 2.6.23: random segfaults

[Paul M. <le...@li...>]

On Wed, Oct 17, 2007 at 12:32:45PM -0400, Mike Frysinger wrote:
> On Wednesday 17 October 2007, Paul Mundt wrote:
> i'm seeing random crashes on my lantank running 2.6.23 ... rebooting into 
> 2.6.16.xx works fine.
> 
> that has a SH7751R with 2-way caches in write-back mode ... havent had time to 
Well, no luck reproducing things on SH7751R or SH7760. If you have a
reproduceable workload, that would really help.

On the other hand, there was at least one bug in the page colouring, so
I've ripped out the old code and made the kmap_coherent() interface more
consistently used. This implementation can still be optimized with
regards to the page's dcache state, but I'm more concerned about
correctness at the moment. See how the following patch works for you.

---

 arch/sh/mm/clear_page.S     |   45 --------------------------
 arch/sh/mm/copy_page.S      |   61 -----------------------------------
 arch/sh/mm/pg-sh4.c         |   75 ++++++++++++++++++++++++++++++--------------
 include/asm-sh/cacheflush.h |   18 ++++++++--
 include/asm-sh/page.h       |   11 ++++--
 5 files changed, 73 insertions(+), 137 deletions(-)

diff --git a/arch/sh/mm/clear_page.S b/arch/sh/mm/clear_page.S
index 8a70613..7a7c81e 100644
--- a/arch/sh/mm/clear_page.S
+++ b/arch/sh/mm/clear_page.S
@@ -150,48 +150,3 @@ ENTRY(__clear_user)
 	.long	8b, .Lbad_clear_user
 	.long	9b, .Lbad_clear_user
 .previous
-
-#if defined(CONFIG_CPU_SH4)
-/*
- * __clear_user_page
- * @to: P3 address (with same color)
- * @orig_to: P1 address
- *
- * void __clear_user_page(void *to, void *orig_to)
- */
-
-/*
- * r0 --- scratch 
- * r4 --- to
- * r5 --- orig_to
- * r6 --- to + PAGE_SIZE
- */
-ENTRY(__clear_user_page)
-	mov.l	.Lpsz,r0
-	mov	r4,r6
-	add	r0,r6
-	mov	#0,r0
-	!
-1:	ocbi	@r5
-	add	#32,r5
-	movca.l	r0,@r4
-	mov	r4,r1
-	add	#32,r4
-	mov.l	r0,@-r4
-	mov.l	r0,@-r4
-	mov.l	r0,@-r4
-	mov.l	r0,@-r4
-	mov.l	r0,@-r4
-	mov.l	r0,@-r4
-	mov.l	r0,@-r4
-	add	#28,r4
-	cmp/eq	r6,r4
-	bf/s	1b
-	 ocbwb	@r1
-	!
-	rts
-	 nop
-.Lpsz:	.long	PAGE_SIZE
-
-#endif
-
diff --git a/arch/sh/mm/copy_page.S b/arch/sh/mm/copy_page.S
index 3d8409d..4068501 100644
--- a/arch/sh/mm/copy_page.S
+++ b/arch/sh/mm/copy_page.S
@@ -68,67 +68,6 @@ ENTRY(copy_page_slow)
 	rts
 	 nop
 
-#if defined(CONFIG_CPU_SH4)
-/*
- * __copy_user_page
- * @to: P1 address (with same color)
- * @from: P1 address
- * @orig_to: P1 address
- *
- * void __copy_user_page(void *to, void *from, void *orig_to)
- */
-
-/*
- * r0, r1, r2, r3, r4, r5, r6, r7 --- scratch 
- * r8 --- from + PAGE_SIZE
- * r9 --- orig_to
- * r10 --- to
- * r11 --- from
- */
-ENTRY(__copy_user_page)
-	mov.l	r8,@-r15
-	mov.l	r9,@-r15
-	mov.l	r10,@-r15
-	mov.l	r11,@-r15
-	mov	r4,r10
-	mov	r5,r11
-	mov	r6,r9
-	mov	r5,r8
-	mov.l	.Lpsz,r0
-	add	r0,r8
-	!
-1:	ocbi	@r9
-	add	#32,r9
-	mov.l	@r11+,r0
-	mov.l	@r11+,r1
-	mov.l	@r11+,r2
-	mov.l	@r11+,r3
-	mov.l	@r11+,r4
-	mov.l	@r11+,r5
-	mov.l	@r11+,r6
-	mov.l	@r11+,r7
-	movca.l	r0,@r10
-	mov	r10,r0
-	add	#32,r10
-	mov.l	r7,@-r10
-	mov.l	r6,@-r10
-	mov.l	r5,@-r10
-	mov.l	r4,@-r10
-	mov.l	r3,@-r10
-	mov.l	r2,@-r10
-	mov.l	r1,@-r10
-	ocbwb	@r0
-	cmp/eq	r11,r8
-	bf/s	1b
-	 add	#28,r10
-	!
-	mov.l	@r15+,r11
-	mov.l	@r15+,r10
-	mov.l	@r15+,r9
-	mov.l	@r15+,r8
-	rts
-	 nop
-#endif
 	.align 2
 .Lpsz:	.long	PAGE_SIZE
 /*
diff --git a/arch/sh/mm/pg-sh4.c b/arch/sh/mm/pg-sh4.c
index 25f5c6f..8c7a9ca 100644
--- a/arch/sh/mm/pg-sh4.c
+++ b/arch/sh/mm/pg-sh4.c
@@ -9,6 +9,8 @@
 #include <linux/mm.h>
 #include <linux/mutex.h>
 #include <linux/fs.h>
+#include <linux/highmem.h>
+#include <linux/module.h>
 #include <asm/mmu_context.h>
 #include <asm/cacheflush.h>
 
@@ -50,34 +52,61 @@ static inline void kunmap_coherent(struct page *page)
 void clear_user_page(void *to, unsigned long address, struct page *page)
 {
 	__set_bit(PG_mapped, &page->flags);
-	if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
-		clear_page(to);
-	else {
-		void *vto = kmap_coherent(page, address);
-		__clear_user_page(vto, to);
-		kunmap_coherent(vto);
-	}
+
+	clear_page(to);
+	if ((((address & PAGE_MASK) ^ (unsigned long)to) & CACHE_ALIAS))
+		__flush_wback_region(to, PAGE_SIZE);
 }
 
-/*
- * copy_user_page
- * @to: P1 address
- * @from: P1 address
- * @address: U0 address to be mapped
- * @page: page (virt_to_page(to))
- */
-void copy_user_page(void *to, void *from, unsigned long address,
-		    struct page *page)
+void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
+		       unsigned long vaddr, void *dst, const void *src,
+		       unsigned long len)
 {
+	void *vto;
+
 	__set_bit(PG_mapped, &page->flags);
-	if (((address ^ (unsigned long)to) & CACHE_ALIAS) == 0)
-		copy_page(to, from);
-	else {
-		void *vfrom = kmap_coherent(page, address);
-		__copy_user_page(vfrom, from, to);
-		kunmap_coherent(vfrom);
-	}
+
+	vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
+	memcpy(vto, src, len);
+	kunmap_coherent(vto);
+
+	if (vma->vm_flags & VM_EXEC)
+		flush_cache_page(vma, vaddr, page_to_pfn(page));
+}
+
+void copy_from_user_page(struct vm_area_struct *vma, struct page *page,
+			 unsigned long vaddr, void *dst, const void *src,
+			 unsigned long len)
+{
+	void *vfrom;
+
+	__set_bit(PG_mapped, &page->flags);
+
+	vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
+	memcpy(dst, vfrom, len);
+	kunmap_coherent(vfrom);
+}
+
+void copy_user_highpage(struct page *to, struct page *from,
+			unsigned long vaddr, struct vm_area_struct *vma)
+{
+	void *vfrom, *vto;
+
+	__set_bit(PG_mapped, &to->flags);
+
+	vto = kmap_atomic(to, KM_USER1);
+	vfrom = kmap_coherent(from, vaddr);
+	copy_page(vto, vfrom);
+	kunmap_coherent(vfrom);
+
+	if (((vaddr ^ (unsigned long)vto) & CACHE_ALIAS))
+		__flush_wback_region(vto, PAGE_SIZE);
+
+	kunmap_atomic(vto, KM_USER1);
+	/* Make sure this page is cleared on other CPU's too before using it */
+	smp_wmb();
 }
+EXPORT_SYMBOL(copy_user_highpage);
 
 /*
  * For SH-4, we have our own implementation for ptep_get_and_clear
diff --git a/include/asm-sh/cacheflush.h b/include/asm-sh/cacheflush.h
index aa558da..b912461 100644
--- a/include/asm-sh/cacheflush.h
+++ b/include/asm-sh/cacheflush.h
@@ -43,21 +43,31 @@ extern void __flush_purge_region(void *start, int size);
 extern void __flush_invalidate_region(void *start, int size);
 #endif
 
-#define flush_cache_vmap(start, end)		flush_cache_all()
-#define flush_cache_vunmap(start, end)		flush_cache_all()
+#ifdef CONFIG_CPU_SH4
+extern void copy_to_user_page(struct vm_area_struct *vma,
+	struct page *page, unsigned long vaddr, void *dst, const void *src,
+	unsigned long len);
 
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
+extern void copy_from_user_page(struct vm_area_struct *vma,
+	struct page *page, unsigned long vaddr, void *dst, const void *src,
+	unsigned long len);
+#else
+#define copy_to_user_page(vma, page, vaddr, dst, src, len)	\
 	do {							\
 		flush_cache_page(vma, vaddr, page_to_pfn(page));\
 		memcpy(dst, src, len);				\
 		flush_icache_user_range(vma, page, vaddr, len);	\
 	} while (0)
 
-#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
+#define copy_from_user_page(vma, page, vaddr, dst, src, len)	\
 	do {							\
 		flush_cache_page(vma, vaddr, page_to_pfn(page));\
 		memcpy(dst, src, len);				\
 	} while (0)
+#endif
+
+#define flush_cache_vmap(start, end)		flush_cache_all()
+#define flush_cache_vunmap(start, end)		flush_cache_all()
 
 #define HAVE_ARCH_UNMAPPED_AREA
 
diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h
index 3aa8b07..d00a8fd 100644
--- a/include/asm-sh/page.h
+++ b/include/asm-sh/page.h
@@ -73,10 +73,13 @@ extern void copy_page_nommu(void *to, void *from);
 #if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) && \
 	(defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB))
 struct page;
-extern void clear_user_page(void *to, unsigned long address, struct page *pg);
-extern void copy_user_page(void *to, void *from, unsigned long address, struct page *pg);
-extern void __clear_user_page(void *to, void *orig_to);
-extern void __copy_user_page(void *to, void *from, void *orig_to);
+struct vm_area_struct;
+extern void clear_user_page(void *to, unsigned long address, struct page *page);
+#ifdef CONFIG_CPU_SH4
+extern void copy_user_highpage(struct page *to, struct page *from,
+			       unsigned long vaddr, struct vm_area_struct *vma);
+#define __HAVE_ARCH_COPY_USER_HIGHPAGE
+#endif
 #else
 #define clear_user_page(page, vaddr, pg)	clear_page(page)
 #define copy_user_page(to, from, vaddr, pg)	copy_page(to, from)