linuxsh-dev

[linuxsh-dev] GCC 3.0 for SH

[Michael E. <ea...@mv...>]

I was comparing the gcc-20001120 version of GCC from www.sh-linux.org
with the gcc 3.0.  There seem to be (many?) patches which are not included 
in the released gcc-3.0 version.  The first one that I noticed are in
the config/sh directory, where sh[3]-linux.h and sh[34]eb-linux.h are
missing.

Anyone know why these are not in gcc-3.0?

--
Michael Eager     ea...@mv...	408-328-8426	
MontaVista Software, Inc. 1237 E. Arques Ave., Sunnyvale, CA  94085

Re: [linux-sh:01865] [linuxsh-dev] 2.4.7 unaligned user space access problems

[Stuart M. <Stu...@st...>]

Folks

I've not had a chance to test the new 2.4.7, but one failure we found a
few weeks ago may be relevant.

Just before the major revamp of the cache handling code started, an
optimisation was put into __flush_tlb_phys() which stoped things working
on our hardware when under heavy load.

This piece of code loops over TLB entries looking for ones to be flushed,
and this has to be done from P2. The optimisation was to only perform
the write to the memory mapped TLB registers from P2, and the rest of the
loop from P1 (previously the whole function was run from P1). Even though
this code followed all the guidelines in the SH7750 and SH7751 manuals, it
still appeared to cause cache corruption when the optimisation was in
place (we were seeing 'code' in the data cache, but I can't be any more
specific), and didn't using the previous version.

We never pinned this down any further, and its been on the TODO list for
a while now (although there is nothing to look at now!). However it
sounds like some of the optimisations which have been done recently may
be similar, so it might be worth a look.

Just an idea

Stuart



On Jul 24,  9:07am, du...@se... wrote:
> Subject: RE: [linux-sh:01865] [linuxsh-dev] 2.4.7 unaligned user space acc
> I've tried the new patch, but I'm still getting unaligned access faults.
> The faults seem to be generated in somewhat random locations within the
> bootup.  I don't know if 'stale' cache information is causing this, but it
> would explain the randomness of the errors.  I'll back up to 2.4.6 and look
> for these faults.
> 
> Dustin.
> 
> -----Original Message-----
> From: NIIBE Yutaka [mailto:gn...@m1...]
> Sent: Tuesday, July 24, 2001 3:59 AM
> To: linux-sh; linuxsh-dev
> Subject: [linux-sh:01865] [linuxsh-dev] 2.4.7 unaligned user space
> access problems
> 
> 
> I've tested some kernels.  My conclusion is: either CqREEK is broken
> or kernel is broken.
> 
> Folks, please test the current CVS version and if you have time test
> stock 2.4.6 kernel.  Then, please let me know it works well or not.
> 
> 
> CVS current (2.4.7+change):
>     CqREEK	SolutionEngine
>     Bad		OK
> 
> vanilla 2.4.7+atomic+ksoftirq:
>     CqREEK	SolutionEngine
>     Bad
> 
> vanilla 2.4.6
>     CqREEK	SolutionEngine
>     Bad
> 
> vanilla 2.4.6-pre6
>     CqREEK	SolutionEngine
>     Bad
> 
> vanilla 2.4.6-pre4
>     CqREEK	SolutionEngine
>     Bad
> 
> vanilla 2.4.6-pre2+fix(bitops,semaphore,irq.c,entry.S,hardirq.h,softirq.h)
>     CqREEK	SolutionEngine
>     Bad
> 
> vanilla 2.4.6-pre1+fix(bitops,semaphore,softirq.h)
>     CqREEK	SolutionEngine
>     Bad
> 
> vanilla 2.4.5+fix(bitops,semaphore)
>     CqREEK	SolutionEngine
>     Bad
> --
> 
> 
> _______________________________________________
> linuxsh-dev mailing list
> lin...@li...
> http://lists.sourceforge.net/lists/listinfo/linuxsh-dev
> 
>-- End of excerpt from du...@se...

RE: [linux-sh:01865] [linuxsh-dev] 2.4.7 unaligned user space access problems

[Dustin M. <du...@se...>]

I've tried the new patch, but I'm still getting unaligned access faults.
The faults seem to be generated in somewhat random locations within the
bootup.  I don't know if 'stale' cache information is causing this, but it
would explain the randomness of the errors.  I'll back up to 2.4.6 and look
for these faults.

Dustin.

-----Original Message-----
From: NIIBE Yutaka [mailto:gn...@m1...]
Sent: Tuesday, July 24, 2001 3:59 AM
To: linux-sh; linuxsh-dev
Subject: [linux-sh:01865] [linuxsh-dev] 2.4.7 unaligned user space
access problems


I've tested some kernels.  My conclusion is: either CqREEK is broken
or kernel is broken.

Folks, please test the current CVS version and if you have time test
stock 2.4.6 kernel.  Then, please let me know it works well or not.


CVS current (2.4.7+change):
    CqREEK	SolutionEngine
    Bad		OK

vanilla 2.4.7+atomic+ksoftirq:
    CqREEK	SolutionEngine
    Bad

vanilla 2.4.6
    CqREEK	SolutionEngine
    Bad

vanilla 2.4.6-pre6
    CqREEK	SolutionEngine
    Bad

vanilla 2.4.6-pre4
    CqREEK	SolutionEngine
    Bad

vanilla 2.4.6-pre2+fix(bitops,semaphore,irq.c,entry.S,hardirq.h,softirq.h)
    CqREEK	SolutionEngine
    Bad

vanilla 2.4.6-pre1+fix(bitops,semaphore,softirq.h)
    CqREEK	SolutionEngine
    Bad

vanilla 2.4.5+fix(bitops,semaphore)
    CqREEK	SolutionEngine
    Bad
--

[linux-sh:01862] [linuxsh-dev] 2.4.7 unaligned user space access problems

[NIIBE Y. <gn...@m1...>]

I've tested some kernels.  My conclusion is: either CqREEK is broken
or kernel is broken.

Folks, please test the current CVS version and if you have time test
stock 2.4.6 kernel.  Then, please let me know it works well or not.


CVS current (2.4.7+change):
    CqREEK	SolutionEngine
    Bad		OK

vanilla 2.4.7+atomic+ksoftirq:
    CqREEK	SolutionEngine
    Bad	

vanilla 2.4.6
    CqREEK	SolutionEngine
    Bad

vanilla 2.4.6-pre6
    CqREEK	SolutionEngine
    Bad

vanilla 2.4.6-pre4
    CqREEK	SolutionEngine
    Bad

vanilla 2.4.6-pre2+fix(bitops,semaphore,irq.c,entry.S,hardirq.h,softirq.h)
    CqREEK	SolutionEngine
    Bad

vanilla 2.4.6-pre1+fix(bitops,semaphore,softirq.h)
    CqREEK	SolutionEngine
    Bad

vanilla 2.4.5+fix(bitops,semaphore)
    CqREEK	SolutionEngine
    Bad
-- 

[linux-sh:01861] [linuxsh-dev] 2.4.7 unaligned user space access problems

[NIIBE Y. <gn...@m1...>]

NIIBE Yutaka wrote:
 > I've confirmed that the cause of this problem is interrupt.  The code
 > I've tested is like this:
 > 
 > 	save_and_cli(flags);
 > 	if (open) __sti();
 > 	/* cache flush procedure ... */
 > 	restore_flage(flags);
 > 
 > When I set open==1, I see "unaligend memory access" while open==0
 > works fine.

No.  I answered too early.  I still see occasional "unaligend memory
access".  I'll look around whole the code...
-- 

[linux-sh:01860] [linuxsh-dev] 2.4.7 unaligned user space access problems

[NIIBE Y. <gn...@m1...>]

I've just commited tha patch, please try it out.

My main development is SH7750 SolutionEngine, and I don't see this
issue.  Getting your report, I've tested CqREEK SH-4 and see the
problem.  I don't know why I didn't see the problem in SolutionEngine, 
perhaps some memory timing issue or so.

I've confirmed that the cause of this problem is interrupt.  The code
I've tested is like this:

	save_and_cli(flags);
	if (open) __sti();
	/* cache flush procedure ... */
	restore_flage(flags);

When I set open==1, I see "unaligend memory access" while open==0
works fine.

My guess is after we clear out the cache address memory, we need to
guarantee we don't use the cache for some period.
-- 

[linuxsh-dev] 2.4.7 unaligned user space access problems

[NIIBE Y. <gn...@m1...>]

Thanks for testing.

I think I've found a problem, In 07-18, I removed the
save_and_cli/restore_flags in __flush_dcache_region.  It's bad
decision.  It seems for me that if interrupt occurs when we are
touching cache, it causes bad behavior.

I'll do some fix on this.  Please wait.
-- 

[linuxsh-dev] 2.4.7 unaligned user space access problems

[Dustin M. <du...@se...>]

Hi all.
First let me say thank you to everyone working on optimizing the caches.
The speed improvement in incredible.  Good job.
I've just moved to 2.4.7 from 2.4.5, and I am having some troubles with
unaligned user space accesses though.  I can't seem to figure out why.  I'm
booting up OK, all the way to the starting of init.  Once I get here, the
system will usually hang, and I get numerous unaligned user space access
violations (handle_unaligned_access).  I have not changed the filesystem at
all from 2.4.5.  Does anyone have an idea what may cause these alignment
problems or how I should find the culprit?

Thanks for any assistance.

Dustin.

[linuxsh-dev] Eliminate warning

[NIIBE Y. <gn...@m1...>]

Please go ahead.
-- 

[linuxsh-dev] Eliminate warning

[Masahiro A. <m-...@aa...>]

Here is the patch to eliminate "unused variable" warning in
arch/sh/kernel/setup.c. OK to commit?

-----
Index: kernel/ChangeLog
===================================================================
RCS file: /cvsroot/linuxsh/kernel/ChangeLog,v
retrieving revision 1.277
diff -u -r1.277 ChangeLog
--- kernel/ChangeLog	2001/07/23 10:43:42	1.277
+++ kernel/ChangeLog	2001/07/24 00:54:43
@@ -1,3 +1,8 @@
+2001-07-24  Masahiro ABE <m-...@aa...>
+
+	* arch/sh/kernel/setup.c (setup_arch): #ifdef mv_unknown to eliminate
+	warning.
+
 2001-07-23  NIIBE Yutaka  <gn...@m1...>
 
 	* arch/sh/kernel/time.c (do_timer_interrupt): Remove #if 0 for
Index: kernel/arch/sh/kernel/setup.c
===================================================================
RCS file: /cvsroot/linuxsh/kernel/arch/sh/kernel/setup.c,v
retrieving revision 1.28
diff -u -r1.28 setup.c
--- kernel/arch/sh/kernel/setup.c	2001/07/18 04:24:43	1.28
+++ kernel/arch/sh/kernel/setup.c	2001/07/24 00:54:54
@@ -267,7 +267,9 @@
 
 void __init setup_arch(char **cmdline_p)
 {
+#if defined(CONFIG_SH_GENERIC) || defined(CONFIG_SH_UNKNOWN)
 	extern struct sh_machine_vector mv_unknown;
+#endif
 	struct sh_machine_vector *mv = NULL;
 	char mv_name[MV_NAME_SIZE] = "";
 	unsigned long mv_io_base = 0;
-----

=================================
Masahiro ABE, A&D Co., Ltd. Japan

[linuxsh-dev] Page handling improvements

[NIIBE Y. <gn...@m1...>]

With suggestion by Kaz Kojima, I've implemented page routines, i.e.,
clear_page/copy_page and such, in assembler.  You can see much
performance improvement on SH-4.  I believe SH-3 also gets faster
(not much, if compared SH-4).  Please try it out.
-- 

[linuxsh-dev] 2.4.7 to CVS patch

[Masahiro A. <m-...@aa...>]

I've created diff file between 2.4.7 release kernel and current CVS
kernel for my own use. If you are interested in looking at the current
CVS source but don't want to download entire kernel source from
SourceForge, you may use this patch. It is:
<ftp://ftp.aandd.co.jp/pub/linuxsh/cvs-diff/2.4.7-CVS-20010723.diff.bz2>

=================================
Masahiro ABE, A&D Co., Ltd. Japan

[linuxsh-dev] Patches at Sourceforge

[NIIBE Y. <gn...@m1...>]

There's a patch manager at Sourceforge, but it seems no one works with
it recently.

Please check following:

Included already in CVS (can be closed):
#400921	This patch adds comments, BIOS handlers and singlestepping
#400999	Generic kernel support
#401000	Overdrive PCI support
#401674	HD64465 PCMCIA support

Needs some work to include:
#401518	patch for CallistoPro (include files)
#401519	patch for CallistoPro (console)
#401520	Patch for CallistoPro (framebuffer)
#401521	Patch for configuration
#401522	Patch for CallstoPro (hd6446x)
#401526	Patch for CallisoPro (ramdisk)

Features:
#401171	PCC PCMCIA driver
#401296	Adds simple XIP
#402461	IPL-based IRQ
#404106	Build latest kernel with old toolchain

Please check if it's included or not:
#400369	pi...@li...'s patch for serial and 7707 things
#400543	SH-3 clock operating mode
#401193	Patch for HD64461 IRQ so it's not hardwired to IRQ4
-- 

[linuxsh-dev] sh-ipl+g change

[Masahiro A. <m-...@aa...>]

Hello all.

Today I'm posting the patch to sh-ipl+g (hosted on cvs.m17n.org, not on
SourceForge). Patch includes those:

* ADX (our custom board) support
* Auto-boot from IDE/CF. Generalized the idea introduced for cat68701
and sh2000 board.
* No output to serial supported.

Last two features can be configured in config/config.h-xxx file for each
board's needs.

Please note that this patch is to be applied to the source hosted on
cvs.m17n.org. You can access it like this.
To Login: (no password)
cvs -d :pserver:ano...@cv...:/cvs/superh login 
To Checkout:
cvs -d :pserver:ano...@cv...:/cvs/superh co ipl+g
You can also get lilo from this server. It supports self-lilo and
understands "append=" sentence in lilo.conf. To checkout,
cvs -d :pserver:ano...@cv...:/cvs/superh co lilo

Here is the patch. I appreciate your input.

---
diff -ruN -X ipldontdiff cvsroot/m17n/ipl+g/ChangeLog /sh4/usr/src/ipl+g/ChangeLog
--- cvsroot/m17n/ipl+g/ChangeLog	Wed Jul 18 11:13:14 2001
+++ /sh4/usr/src/ipl+g/ChangeLog	Fri Jul 20 16:42:10 2001
@@ -1,3 +1,14 @@
+2001-07-20  Masahiro ABE <m-...@aa...>
+
+	* config/{config.h-adx,config.h-adx-scif,config.mk-adx} : New file.
+	* config/config.h-cat68701 : Added CONFIG_AUTO_BOOT_IDE.
+	(CONFIG_ROM_START, CONFIG_ROM_LENGTH, CONFIG_RAM_START,
+	CONFIG_RAM_BOOT): Defined.
+	* Makefile : Added CONFIG_ADX.
+	* defs.h : Added general IDE Auto-booting feature support.
+	* main.c (start_main): make Auto-boot code usable for other board.
+	* sh-sci.c : Do nothing if both CONFIG_SCI/SCIF not defined.
+
 2001-07-02  SUGIOKA Toshinobu <su...@it...>
 
 	* cs89x0.c (detect_tp): Change cable detection timeout to 
diff -ruN -X ipldontdiff cvsroot/m17n/ipl+g/Makefile /sh4/usr/src/ipl+g/Makefile
--- cvsroot/m17n/ipl+g/Makefile	Wed Jun 20 11:30:16 2001
+++ /sh4/usr/src/ipl+g/Makefile	Thu Jul 19 14:23:49 2001
@@ -182,6 +182,15 @@
 #
 ADJUST_VMA=0x00000000
 endif
+ifdef CONFIG_ADX
+MACHINE_DEPENDS :=	init-adx.o
+# 0x00000000(address for ROM image)-0xa0000000(final destination) = 0x60000000
+ADJUST_VMA=0x60000000
+
+sh-stub.srec: sh-stub.exe
+	$(OBJCOPY) -S -R .data -R .stack -R .bss -R .comment \
+		-O srec sh-stub.exe sh-stub.srec
+endif
 
 ifdef CONFIG_IDE
 MACHINE_DEPENDS +=	ide.o
diff -ruN -X ipldontdiff cvsroot/m17n/ipl+g/config/config.h-adx /sh4/usr/src/ipl+g/config/config.h-adx
--- cvsroot/m17n/ipl+g/config/config.h-adx	Thu Jan  1 09:00:00 1970
+++ /sh4/usr/src/ipl+g/config/config.h-adx	Fri Jul 20 15:53:08 2001
@@ -0,0 +1,12 @@
+#define CONFIG_LITTLE_ENDIAN		1
+#define CONFIG_ADX			1
+#define CONFIG_IDE			1
+#define CONFIG_ROM_START		0x80000000
+#define CONFIG_ROM_LENGTH		0x80000
+#define CONFIG_RAM_START		0x88000000
+#define CONFIG_RAM_BOOT			(CONFIG_RAM_START+0x200000)
+#define CONFIG_MEMORY_SIZE		0x02000000
+#define CONFIG_DIRECT_COMPACT_FLASH	1
+#define CONFIG_CIS_BASE                 0xb4000000
+#define CONFIG_IO_BASE			0xb6000000
+#define CONFIG_AUTO_BOOT_IDE		1
diff -ruN -X ipldontdiff cvsroot/m17n/ipl+g/config/config.h-adx-scif /sh4/usr/src/ipl+g/config/config.h-adx-scif
--- cvsroot/m17n/ipl+g/config/config.h-adx-scif	Thu Jan  1 09:00:00 1970
+++ /sh4/usr/src/ipl+g/config/config.h-adx-scif	Fri Jul 20 15:54:07 2001
@@ -0,0 +1,3 @@
+#include "config/config.h-adx"
+
+#define CONFIG_SCIF			1
diff -ruN -X ipldontdiff cvsroot/m17n/ipl+g/config/config.h-cat68701 /sh4/usr/src/ipl+g/config/config.h-cat68701
--- cvsroot/m17n/ipl+g/config/config.h-cat68701	Mon Jun  4 18:09:20 2001
+++ /sh4/usr/src/ipl+g/config/config.h-cat68701	Fri Jul 20 16:33:45 2001
@@ -2,9 +2,13 @@
 #define CONFIG_CAT68701			1
 #define CONFIG_SCI			1
 #define CONFIG_IDE			1
-#define CONFIG_RAM_BOOT			0x8c200000
 #define CONFIG_DIRECT_COMPACT_FLASH	1
+#define CONFIG_ROM_START		0x80000000
+#define CONFIG_ROM_LENGTH		0x8000
+#define CONFIG_RAM_START		0x8c000000
+#define CONFIG_RAM_BOOT			(CONFIG_RAM_START+0x200000)
 #define CONFIG_IO_BASE			0xba000000
 #define CONFIG_MEMORY_SIZE		0x01000000
 #define CONFIG_CIS_BASE                 0xb8000000
+#define CONFIG_AUTO_BOOT_IDE		1
 
diff -ruN -X ipldontdiff cvsroot/m17n/ipl+g/config/config.mk-adx /sh4/usr/src/ipl+g/config/config.mk-adx
--- cvsroot/m17n/ipl+g/config/config.mk-adx	Thu Jan  1 09:00:00 1970
+++ /sh4/usr/src/ipl+g/config/config.mk-adx	Tue Jun 12 11:57:00 2001
@@ -0,0 +1,4 @@
+CONFIG_LITTLE_ENDIAN=y
+CONFIG_CPU_SH4=y
+CONFIG_ADX=y
+CONFIG_IDE=y
diff -ruN -X ipldontdiff cvsroot/m17n/ipl+g/defs.h /sh4/usr/src/ipl+g/defs.h
--- cvsroot/m17n/ipl+g/defs.h	Fri Jun 29 22:44:47 2001
+++ /sh4/usr/src/ipl+g/defs.h	Thu Jul 19 14:01:00 2001
@@ -85,3 +85,13 @@
 extern void pci_write_config_dword (unsigned long offset, unsigned long data);
 extern unsigned long pci_nextio, pci_nextmem;
 #endif
+
+/* Auto-boot support */
+#if defined(CONFIG_AUTO_BOOT_IDE)
+# if defined(CONFIG_CAT68701)
+extern int cat68701_read_dipsw(void);
+#  define AUTO_BOOT_IDE_CHECK	(!(cat68701_read_dipsw () &1))
+# else
+#  define AUTO_BOOT_IDE_CHECK	(1)
+# endif
+#endif /* defined(CONFIG_AUTO_BOOT_IDE) */
diff -ruN -X ipldontdiff cvsroot/m17n/ipl+g/init-adx.S /sh4/usr/src/ipl+g/init-adx.S
--- cvsroot/m17n/ipl+g/init-adx.S	Thu Jan  1 09:00:00 1970
+++ /sh4/usr/src/ipl+g/init-adx.S	Wed Jul 18 21:57:13 2001
@@ -0,0 +1,237 @@
+/*
+ *
+ *  sh-ipl+g/init-adx.S
+ *  (based on sh-ipl+g/init-sesh4.S, init-sh2000.S and init-cat68701.S)
+ *
+ */
+
+#include "config.h"
+#include "linkage.h"
+
+ENTRY(init_bsc)
+
+	/* Setup WDT for FRQCR change */
+	mov.l	WTCSR_A,r1	/* WTCSR Address */
+	mov.w	WTCSR_D,r0	/* WTCSR Data (WDT Disable) */
+	mov.w	r0,@r1
+
+	mov.l	WTCNT_A,r1	/* WTCNT Address */
+	mov.w	WTCNT_D,r0	/* WTCNT Data (WDT overflows after 5.25msec) */
+	mov.w	r0,@r1
+
+	mov.l	FRQCR_A,r1	/* FRQCR Address */
+	mov.l	FRQCR_D,r0	/* FRQCR Data */
+	mov.w	r0,@r1
+	/* Here the clock stops until watchdog timer overflow*/
+
+	mov.l	BCR1_A,r1	/* BCR1 Address */
+	mov.l	BCR1_D,r0	/* BCR1 Data */
+	mov.l	r0,@r1
+
+	mov.l	BCR2_A,r1	/* BCR2 Address */
+	mov.l	BCR2_D,r0	/* BCR2 Data */
+	mov.w	r0,@r1
+
+	mov.l	WCR1_A,r1	/* WCR1 Address */
+	mov.l	WCR1_D,r0	/* WCR1 Data */
+	mov.l	r0,@r1
+
+	mov.l	WCR2_A,r1	/* WCR2 Address */
+	mov.l	WCR2_D,r0	/* WCR2 Data */
+	mov.l	r0,@r1
+
+	mov.l	WCR3_A,r1	/* WCR3 Address */
+	mov.l	WCR3_D,r0	/* WCR3 Data */
+	mov.l	r0,@r1
+
+	mov.l	MCR_A,r1	/* MCR Address */
+	mov.l	MCR_D1,r0	/* MCR Data1 */
+	mov.l	r0,@r1
+
+	mov.l	SDMR3_A,r1	/* Set SDRAM mode */
+	mov	#0,r0
+	mov.b	r0,@r1
+
+	! Do you need PCMCIA setting?	
+	! If so, please add the lines here...
+
+	mov.l	RTCNT_A,r1	/* RTCNT Address */
+	mov.l	RTCNT_D,r0	/* RTCNT Data */
+	mov.w	r0,@r1
+
+	mov.l	RTCOR_A,r1	/* RTCOR Address */
+	mov.l	RTCOR_D,r0	/* RTCOR Data */
+	mov.w	r0,@r1
+
+	mov.l	RTCSR_A,r1	/* RTCSR Address */
+	mov.l	RTCSR_D,r0	/* RTCSR Data */
+	mov.w	r0,@r1
+
+	mov.l	RFCR_A,r1	/* RFCR Address */
+	mov.l	RFCR_D,r0	/* RFCR Data */
+	mov.w	r0,@r1		/* Clear reflesh counter */
+
+	/* Wait DRAM refresh 30 times */
+	mov	#30,r3
+1:
+	mov.w	@r1,r0
+	extu.w	r0,r2
+	cmp/hi	r3,r2
+	bf	1b
+
+	mov.l	MCR_A,r1	/* MCR Address */
+	mov.l	MCR_D2,r0	/* MCR Data2 */
+	mov.l	r0,@r1
+
+	mov.l	SDMR3_A,r1	/* Set SDRAM mode */
+	mov	#0,r0
+	mov.b	r0,@r1
+
+/* Configure & Reset Compact flash */
+#if defined(CONFIG_DIRECT_COMPACT_FLASH) && defined(CONFIG_IDE)
+	/* wait until power on reset complete */
+	mov.l	DLY_CNT,r0
+2:	dt	r0
+	bf	2b
+
+	/* setup PTEA for 16bit attibute access */
+	mov.l	PTEA_A,r1	/* PTEA Address */
+	mov.l	PTEA_D_ATR,r0	/* 16bit attribute area */
+	mov.l	r0,@r1
+
+	/* soft reset */
+	mov.l	CF_COR_A, r1
+	mov	#0x80, r0
+	mov.w	r0, @r1
+
+	/* put some wait */
+	mov.l	DLY_CNT2,r0
+2:	dt	r0
+	bf	2b
+
+	/* soft reset clear */
+	mov.l	CF_COR_A, r1
+	mov	#0x00, r0
+	mov.w	r0, @r1
+
+        mov.l   CF_PRR_A,r1  /* wait until RRdy/Busy clear */
+2:	mov.w   @r1,r0
+        and     #2,r0
+        tst     r0,r0
+        bt      2b
+
+        mov.l   CF_CCSR_A,r1 /* Powerdown mode bit clear */
+        mov     #0,r0
+        mov.w   r0,@r1
+
+        mov.l   CF_PRR_A,r1  /* wait until RRdy/Busy clear */
+2:	mov.w   @r1,r0
+        and     #2,r0
+        tst     r0,r0
+        bt      2b
+
+	/* Select configuration: 0x02, Level interrupt: 0x40 */
+	mov.l	CF_COR_A, r1
+	mov	#0x42, r0
+	mov.w	r0, @r1
+
+        mov.l   CF_PRR_A,r1  /* wait until RRdy/Busy clear */
+2:
+        mov.w   @r1,r0
+        and     #2,r0
+        tst     r0,r0
+        bt      2b
+
+	/* setup PTEA for 16bit I/O access */
+	mov.l	PTEA_A,r1	/* PTEA Address */
+	mov.l	PTEA_D_IO,r0	/* 16bit I/O area */
+	mov.l	r0,@r1
+#endif
+
+	rts
+	 nop
+
+	.align	2
+
+WTCNT_A:
+	.long	0xffc00008	/* WDT CNT */
+WTCNT_D:
+	.word	0x5a00		/* initial counter value, with magic byte "5a" */
+WTCSR_A:
+	.long	0xffc0000c	/* WDT CSR */
+WTCSR_D:	
+	.word	0xa507		/* TME = 0, CKS=7, with magic byte "a5" */
+FRQCR_A:
+	.long	0xFFC00000	/* FRQCR Address */
+FRQCR_D:
+	.long	0x00000e13	/* 6:2:1 */
+BCR1_A:
+	.long	0xFF800000	/* BCR1 Address */
+BCR1_D:
+	.long	0x0000000d	/* Area 2 & 3 SDRAM, Area 5 & 6 PCMCIA */
+BCR2_A:
+	.long	0xFF800004	/* BCR2 Address */
+BCR2_D:
+	.long	0x1B08		/* Area 1:16bit Area 2:64bit Area 3:64bit 
+		                   Area 4:32bit	Area 5:16bit Area 6:8bit */
+WCR1_A:
+	.long	0xFF800008	/* WCR1 Address */
+WCR1_D:
+	.long	0x02720077	/* Device-inter-cycle: 2-wait
+				   A6:15 A5:2 A4:2 A3:0 A2:0 A1:15 A0:15 */
+WCR2_A:
+	.long	0xFF80000C	/* WCR2 Address */
+WCR2_D:
+	.long	0xFFFE44BF	/* A6: 15 A6B: 7 A5: 15 A5B: 7
+				   A4: 15 A3: 2 A2:15 A1:15 A0:15 A0B:7  */
+WCR3_A:
+	.long	0xFF800010	/* WCR3 Address */
+WCR3_D:
+	.long	0x01717771	/* A6: 0-1 A5: 1-3 A4: 0-1 A3: 1-3
+				   A2: 1-3 A1: 1-3 A0: 0-1 */
+RTCNT_A:
+	.long	0xFF800020	/* RTCNT Address */
+RTCNT_D:
+	.long	0xA500		/* RTCNT Write Code A5h Data 00h */
+
+RTCOR_A:
+	.long	0xFF800024	/* RTCOR Address */
+RTCOR_D:
+	.long	0xA510		/* RTCOR Write Code A5h Data 10h (15us) */
+
+RTCSR_A:
+	.long	0xFF80001C	/* RTCSR Address */
+RTCSR_D:
+	.long	0xA518		/* RTCSR Write Code A5h Data 18h */
+
+SDMR3_A:
+        .long	0xFF900110	/* SDMR2 Address */
+MCR_A:
+	.long	0xFF800014	/* MCR Address */
+MCR_D1:
+	.long	0x50110014	/* MRSET:'0' */
+MCR_D2:
+	.long	0x10110014	/* MRSET:'1' */
+RFCR_A:
+	.long	0xFF800028	/* RFCR Address */
+RFCR_D:
+	.long	0xA400		/* RFCR Write Code A4h Data 00h */
+#if defined(CONFIG_DIRECT_COMPACT_FLASH) && defined(CONFIG_IDE)
+PTEA_A:	.long	0xFF000034	/* PTEA Address */
+PTEA_D_IO:
+	.long	0x00000003	/* SA0-2: 16bit I/O area */
+PTEA_D_MEM:
+	.long	0x00000005	/* SA0-2: 16bit common memory */
+PTEA_D_ATR:
+	.long	0x00000007	/* SA0-2: 16bit attribute area */
+DLY_CNT:
+	.long	80000
+DLY_CNT2:
+	.long	8000
+CF_COR_A:
+	.long   (CONFIG_CIS_BASE+0x0200)
+CF_CCSR_A:
+	.long   (CONFIG_CIS_BASE+0x0202)
+CF_PRR_A:
+	.long   (CONFIG_CIS_BASE+0x0204)
+#endif
diff -ruN -X ipldontdiff cvsroot/m17n/ipl+g/main.c /sh4/usr/src/ipl+g/main.c
--- cvsroot/m17n/ipl+g/main.c	Fri Jun 29 22:44:47 2001
+++ /sh4/usr/src/ipl+g/main.c	Fri Jul 20 16:08:10 2001
@@ -178,15 +178,17 @@
 #endif
     }
 
-#ifdef CONFIG_CAT68701
-  if (get_boot_signature () != 0xdeadbeef && !(cat68701_read_dipsw () &1))
+  if (get_boot_signature () != 0xdeadbeef)
     {
-      ide_detect_devices ();
-      sti ();
-      ide_startup_devices ();
-      boot ();
-    }
+#if defined(CONFIG_AUTO_BOOT_IDE)
+      if (AUTO_BOOT_IDE_CHECK && (ide_detect_devices () == 0))
+        {
+          sti ();
+          ide_startup_devices ();
+          boot ();
+        }
 #endif
+    }
 
 #ifdef CONFIG_SH2000
   if (get_boot_signature () != 0xdeadbeef)
diff -ruN -X ipldontdiff cvsroot/m17n/ipl+g/sh-sci.c /sh4/usr/src/ipl+g/sh-sci.c
--- cvsroot/m17n/ipl+g/sh-sci.c	Wed Jun  6 21:29:07 2001
+++ /sh4/usr/src/ipl+g/sh-sci.c	Fri Jul 20 15:41:44 2001
@@ -15,6 +15,9 @@
 #include "config.h"
 #include "io.h"
 
+#if (defined(CONFIG_SCI) || defined(CONFIG_SCIF))
+/* with serial-console */
+
 #if defined(CONFIG_SCI)
 #define SCSCR_INIT 	0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
 #if defined(__sh3__)
@@ -297,3 +300,40 @@
       putDebugChar (*p);
     }
 }
+
+#else /*if (defined(CONFIG_SCI) || defined(CONFIG_SCIF))*/
+/* without serial-console */
+
+void
+handleError (void)
+{
+}
+
+void
+init_serial(void)
+{
+}
+
+int
+getDebugCharTimeout (int count)
+{
+	return 0;
+}
+
+char 
+getDebugChar (void)
+{
+	return 0;
+}
+
+void
+putDebugChar (char ch)
+{
+}
+
+void
+putString (char *str)
+{
+}
+
+#endif /*if (defined(CONFIG_SCI) || defined(CONFIG_SCIF))*/
---

=================================
Masahiro ABE, A&D Co., Ltd. Japan

Re: [linuxsh-dev] Re: Another patch

[Stuart M. <Stu...@st...>]

On Jul 18,  9:43pm, gn...@m1... wrote:
> Subject: [linuxsh-dev] Re: Another patch
> 
> Masahiro Abe wrote:
>  > Is this patch still needed, even if current (2.4.7-pre7) code has the
>  > (related, I think) patch in kernel/sched.c? I thought the change in
>  > sched.c at line 610 to 614 addresses the similar problem.
> 
> Errr... perhaps, the simptom Stuart described is related.

Its not quite the same problem.

According to Andrea, his patch to sched.c catches a subtle interaction
in the fork and schedule semantics. This is his explanation:
  http://marc.theaimsgroup.com/?l=linux-kernel&m=99487064319929&w=2
(still not sure I understand it!).

My fix is for a much less subtle problem (and brings the SuperH into
line with the other architectures!).

Normally when a task is switched away from in schedule(), after the
call to switch_to(), the new task calls __schedule_tail() which clears
the SCHED_YIELD flag for the previous task.

However when the new task has never run before, switch_to() does
not return to schedule(), but to ret_from_fork: in entry.S. In this
case the previous task's SCHED_YIELD flag never used to get cleared, and
worst case, this will cause it to never run again. The patch I generated
simply called schedule_tail() from ret_from_fork:, which clears SCHED_YIELD
for the previous task.

>  > I haven't tried Stuart's patch on current kernel yet. If someone can
>  > shed light on this, I appreciate.
> 
> As long as I've read, his patch is correct.  Change of
> arch/sh/kernel/process.c is not necessarily, though.  Because we have
> the value on top of the stack (and it's not bogus this time).  I think
> that pop down the value and use it for the argument of schedule_tail
> is good.

You're quite right, I should have spotted this.
I'll make this change, and check it in.

Many thanks for all the comments

Stuart

[linuxsh-dev] Re: Another patch

[NIIBE Y. <gn...@m1...>]

Masahiro Abe wrote:
 > Is this patch still needed, even if current (2.4.7-pre7) code has the
 > (related, I think) patch in kernel/sched.c? I thought the change in
 > sched.c at line 610 to 614 addresses the similar problem.

Errr... perhaps, the simptom Stuart described is related.

 > I haven't tried Stuart's patch on current kernel yet. If someone can
 > shed light on this, I appreciate.

As long as I've read, his patch is correct.  Change of
arch/sh/kernel/process.c is not necessarily, though.  Because we have
the value on top of the stack (and it's not bogus this time).  I think
that pop down the value and use it for the argument of schedule_tail
is good.
-- 

[linuxsh-dev] [linux-sh:01843] Patches for A&D ADX support - #1 [MaskReg]

[NIIBE Y. <gn...@m1...>]

Patches applied, and some minor documentation fixes are also applied.

For cf-enabler, I leave setting IRQ handler for CONFIG_SH_UNKNOWN target.
-- 

[linuxsh-dev] Re: Patches for A&D ADX support - #1 [MaskReg]

[Masahiro A. <m-...@aa...>]

Sorry for the confusion.

On Wed, 18 Jul 2001 20:24:52 +0900 (JST)
NIIBE Yutaka <gn...@m1...> wrote:

> Masahiro Abe wrote:
>  > Niibe-san, could you please consider applying those to CVS?
> 
> One minor point about licence and condition.  I'd like to confirm.
[snip]
> I mean, is it ok for me (or anybody) to distribute the file?

Yes, it is OK. It's our pleasure if those files benefit some.

> Is it OK for you to my change the sentence like following to avoid confusion:
> 	This file may be copied or...

Yes, please.

(I took those banner from mach_se.c, so I thought this sentence is ok...)

=================================
Masahiro ABE, A&D Co., Ltd. Japan

[linuxsh-dev] [linux-sh:01840] Patches for A&D ADX support - #1 [MaskReg]

[NIIBE Y. <gn...@m1...>]

Masahiro Abe wrote:
 > Niibe-san, could you please consider applying those to CVS?

One minor point about licence and condition.  I'd like to confirm.

 > +/*
 > + * linux/arch/sh/kernel/irq_maskreg.c
 > + *
 > + * Copyright (C) 2001 A&D Co., Ltd. <http://www.aandd.co.jp>
 > + *
 > + * May be copied or modified under the terms of the GNU General Public
 > + * License.  See linux/COPYING for more information.                            
Is this mean:
	This file _can_ be copied or ... (MAY of CAN)
not that
	Perhaps, it would be OK to be copied ... (MAY of PERHAPS)

I mean, is it ok for me (or anybody) to distribute the file?

Is it OK for you to my change the sentence like following to avoid confusion:
	This file may be copied or...
-- 

[linuxsh-dev] Patches for A&D ADX support - #3 [ADX]

[Masahiro A. <m-...@aa...>]

Third patch and the last of the series - ADX board support.

---
diff -ruN linux-cvs0718-mr-cf/ChangeLog linux-cvs0718-mr-cf-adx/ChangeLog
--- linux-cvs0718-mr-cf/ChangeLog	Wed Jul 18 19:12:57 2001
+++ linux-cvs0718-mr-cf-adx/ChangeLog	Wed Jul 18 19:37:47 2001
@@ -1,5 +1,15 @@
 2001-07-18  Masahiro ABE <m-...@aa...>
 
+	* Documentation/Configure.help (CONFIG_SH_GENERIC): Added ADX
+	* arch/sh/config.in (CONFIG_SH_ADX): Added for ADX support
+	(CONFIG_MEMORY_START): Added definition for ADX
+	(CONFIG_CF_ENABLER): Added ADX
+	* arch/sh/kernel/Makefile : Added ADX support
+	* arch/sh/kernel/{io_adx.c,mach_adx.c,setup_adx.c} : Added for ADX support
+	* include/asm-sh/io.h : Added ADX support
+	* include/asm-sh/io_adx.h : Added for ADX support
+	* include/asm-sh/machvec.h : Added ADX support
+
 	* Documentation/Configure.help (CONFIG_CF_ENABLER): Support area 5 also.
 	(CONFIG_CF_AREA): Added.
 	* arch/sh/config.in : Added selection of CompactFlash area.
diff -ruN linux-cvs0718-mr-cf/Documentation/Configure.help linux-cvs0718-mr-cf-adx/Documentation/Configure.help
--- linux-cvs0718-mr-cf/Documentation/Configure.help	Wed Jul 18 19:18:14 2001
+++ linux-cvs0718-mr-cf-adx/Documentation/Configure.help	Wed Jul 18 19:30:00 2001
@@ -16382,6 +16382,7 @@
   - "CAT68701" for CAT 68701 Evaluation Board (SH7708)
   - "BigSur" for Big Sur Evaluation Board
   - "SH2000" for SH2000 Evaluation Board (SH7709A)
+  - "ADX" for A&D ADX
   - "BareCPU" for Bare CPU board such as CqREEK SH-3
 
   If unsure, select "BareCPU".
diff -ruN linux-cvs0718-mr-cf/arch/sh/config.in linux-cvs0718-mr-cf-adx/arch/sh/config.in
--- linux-cvs0718-mr-cf/arch/sh/config.in	Wed Jul 18 19:08:15 2001
+++ linux-cvs0718-mr-cf-adx/arch/sh/config.in	Wed Jul 18 19:30:08 2001
@@ -42,6 +42,7 @@
 	 CAT68701		CONFIG_SH_CAT68701		\
 	 BigSur			CONFIG_SH_BIGSUR		\
 	 SH2000			CONFIG_SH_SH2000		\
+	 ADX			CONFIG_SH_ADX			\
 	 BareCPU		CONFIG_SH_UNKNOWN" Generic
 
 # The SH7750 RTC module is disabled in the Dreamcast
@@ -101,7 +102,11 @@
       hex 'EMI physical memory start address' CONFIG_MEMORY_START 08000000
     fi
   else
+   if [ "$CONFIG_SH_ADX" = "y" ]; then
+    define_hex CONFIG_MEMORY_START 08000000
+   else
     hex 'Physical memory start address' CONFIG_MEMORY_START 08000000
+   fi
   fi
 fi
 endmenu
@@ -126,7 +131,8 @@
 bool 'Networking support' CONFIG_NET
 
 if [ "$CONFIG_SH_GENERIC" = "y" -o "$CONFIG_SH_SOLUTION_ENGINE" = "y" -o \
-     "$CONFIG_SH_UNKNOWN" = "y" -o "$CONFIG_SH_CAT68701" = "y" ]; then
+     "$CONFIG_SH_UNKNOWN" = "y" -o "$CONFIG_SH_CAT68701" = "y" -o \
+     "$CONFIG_SH_ADX" = "y" ]; then
   bool 'Compact Flash Enabler support' CONFIG_CF_ENABLER
 fi
 
diff -ruN linux-cvs0718-mr-cf/arch/sh/kernel/Makefile linux-cvs0718-mr-cf-adx/arch/sh/kernel/Makefile
--- linux-cvs0718-mr-cf/arch/sh/kernel/Makefile	Wed Jul 18 18:55:00 2001
+++ linux-cvs0718-mr-cf-adx/arch/sh/kernel/Makefile	Wed Jul 18 19:27:05 2001
@@ -64,6 +64,9 @@
 
 obj-$(CONFIG_CPU_SUBTYPE_ST40STB1) +=irq_intc2.o
 
+obj-$(CONFIG_SH_ADX)		+= mach_adx.o setup_adx.o io_adx.o irq_maskreg.o
+machine-specific-objs		+= mach_adx.o setup_adx.o io_adx.o irq_maskreg.o
+
 # Doesn't compile well, so don't include in machine-specific-objs
 obj-$(CONFIG_HD64465)		+= setup_hd64465.o io_hd64465.o hd64465_gpio.o
 obj-$(CONFIG_SH_DMIDA)		+= mach_dmida.o
diff -ruN linux-cvs0718-mr-cf/arch/sh/kernel/io_adx.c linux-cvs0718-mr-cf-adx/arch/sh/kernel/io_adx.c
--- linux-cvs0718-mr-cf/arch/sh/kernel/io_adx.c	Thu Jan  1 09:00:00 1970
+++ linux-cvs0718-mr-cf-adx/arch/sh/kernel/io_adx.c	Wed Jul 18 19:27:05 2001
@@ -0,0 +1,192 @@
+/* 
+ * linux/arch/sh/kernel/io_adx.c
+ *
+ * Copyright (C) 2001 A&D Co., Ltd.
+ *
+ * I/O routine and setup routines for A&D ADX Board
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+
+#include <asm/io.h>
+#include <asm/machvec.h>
+#include <linux/module.h>
+
+#define PORT2ADDR(x) (adx_isa_port2addr(x))
+
+static inline void delay(void)
+{
+	ctrl_inw(0xa0000000);
+}
+
+unsigned char adx_inb(unsigned long port)
+{
+	return *(volatile unsigned char*)PORT2ADDR(port);
+}
+
+unsigned short adx_inw(unsigned long port)
+{
+	return *(volatile unsigned short*)PORT2ADDR(port);
+}
+
+unsigned int adx_inl(unsigned long port)
+{
+	return *(volatile unsigned long*)PORT2ADDR(port);
+}
+
+unsigned char adx_inb_p(unsigned long port)
+{
+	unsigned long v = *(volatile unsigned char*)PORT2ADDR(port);
+
+	delay();
+	return v;
+}
+
+unsigned short adx_inw_p(unsigned long port)
+{
+	unsigned long v = *(volatile unsigned short*)PORT2ADDR(port);
+
+	delay();
+	return v;
+}
+
+unsigned int adx_inl_p(unsigned long port)
+{
+	unsigned long v = *(volatile unsigned long*)PORT2ADDR(port);
+
+	delay();
+	return v;
+}
+
+void adx_insb(unsigned long port, void *buffer, unsigned long count)
+{
+	unsigned char *buf = buffer;
+	while(count--) *buf++ = inb(port);
+}
+
+void adx_insw(unsigned long port, void *buffer, unsigned long count)
+{
+	unsigned short *buf = buffer;
+	while(count--) *buf++ = inw(port);
+}
+
+void adx_insl(unsigned long port, void *buffer, unsigned long count)
+{
+	unsigned long *buf = buffer;
+	while(count--) *buf++ = inl(port);
+}
+
+void adx_outb(unsigned char b, unsigned long port)
+{
+	*(volatile unsigned char*)PORT2ADDR(port) = b;
+}
+
+void adx_outw(unsigned short b, unsigned long port)
+{
+	*(volatile unsigned short*)PORT2ADDR(port) = b;
+}
+
+void adx_outl(unsigned int b, unsigned long port)
+{
+	*(volatile unsigned long*)PORT2ADDR(port) = b;
+}
+
+void adx_outb_p(unsigned char b, unsigned long port)
+{
+	*(volatile unsigned char*)PORT2ADDR(port) = b;
+	delay();
+}
+
+void adx_outw_p(unsigned short b, unsigned long port)
+{
+	*(volatile unsigned short*)PORT2ADDR(port) = b;
+	delay();
+}
+
+void adx_outl_p(unsigned int b, unsigned long port)
+{
+	*(volatile unsigned long*)PORT2ADDR(port) = b;
+	delay();
+}
+
+void adx_outsb(unsigned long port, const void *buffer, unsigned long count)
+{
+	const unsigned char *buf = buffer;
+	while(count--) outb(*buf++, port);
+}
+
+void adx_outsw(unsigned long port, const void *buffer, unsigned long count)
+{
+	const unsigned short *buf = buffer;
+	while(count--) outw(*buf++, port);
+}
+
+void adx_outsl(unsigned long port, const void *buffer, unsigned long count)
+{
+	const unsigned long *buf = buffer;
+	while(count--) outl(*buf++, port);
+}
+
+unsigned char adx_readb(unsigned long addr)
+{
+	return *(volatile unsigned char*)addr;
+}
+
+unsigned short adx_readw(unsigned long addr)
+{
+	return *(volatile unsigned short*)addr;
+}
+
+unsigned int adx_readl(unsigned long addr)
+{
+	return *(volatile unsigned long*)addr;
+}
+
+void adx_writeb(unsigned char b, unsigned long addr)
+{
+	*(volatile unsigned char*)addr = b;
+}
+
+void adx_writew(unsigned short b, unsigned long addr)
+{
+	*(volatile unsigned short*)addr = b;
+}
+
+void adx_writel(unsigned int b, unsigned long addr)
+{
+	*(volatile unsigned long*)addr = b;
+}
+
+void *adx_ioremap(unsigned long offset, unsigned long size)
+{
+	return (void *)P2SEGADDR(offset);
+}
+
+EXPORT_SYMBOL (adx_ioremap);
+
+void adx_iounmap(void *addr)
+{
+}
+
+EXPORT_SYMBOL(adx_iounmap);
+
+#include <linux/vmalloc.h>
+extern void *cf_io_base;
+
+unsigned long adx_isa_port2addr(unsigned long offset)
+{
+  /* CompactFlash (IDE) */
+	if (((offset >= 0x1f0) && (offset <= 0x1f7)) || (offset == 0x3f6)) {
+		return (unsigned long)cf_io_base + offset;
+	}
+
+  /* eth0 */
+	if ((offset >= 0x300) && (offset <= 0x30f)) {
+		return 0xa5000000 + offset;	/* COMM BOARD (AREA1) */
+	}
+
+	return offset + 0xb0000000; /* IOBUS (AREA 4)*/
+}
diff -ruN linux-cvs0718-mr-cf/arch/sh/kernel/mach_adx.c linux-cvs0718-mr-cf-adx/arch/sh/kernel/mach_adx.c
--- linux-cvs0718-mr-cf/arch/sh/kernel/mach_adx.c	Thu Jan  1 09:00:00 1970
+++ linux-cvs0718-mr-cf-adx/arch/sh/kernel/mach_adx.c	Wed Jul 18 19:27:05 2001
@@ -0,0 +1,73 @@
+/*
+ * linux/arch/sh/kernel/mach_adx.c
+ *
+ * Copyright (C) 2001 A&D Co., Ltd.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * Machine vector for the A&D ADX Board
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+
+#include <asm/machvec.h>
+#include <asm/rtc.h>
+#include <asm/machvec_init.h>
+#include <asm/io_adx.h>
+
+extern void setup_adx(void);
+extern void init_adx_IRQ(void);
+
+/*
+ * The Machine Vector
+ */
+
+struct sh_machine_vector mv_adx __initmv = {
+	mv_name:		"A&D_ADX",
+
+	mv_nr_irqs:		48,
+
+	mv_inb:			adx_inb,
+	mv_inw:			adx_inw,
+	mv_inl:			adx_inl,
+	mv_outb:		adx_outb,
+	mv_outw:		adx_outw,
+	mv_outl:		adx_outl,
+
+	mv_inb_p:		adx_inb_p,
+	mv_inw_p:		adx_inw,
+	mv_inl_p:		adx_inl,
+	mv_outb_p:		adx_outb_p,
+	mv_outw_p:		adx_outw,
+	mv_outl_p:		adx_outl,
+
+	mv_insb:		adx_insb,
+	mv_insw:		adx_insw,
+	mv_insl:		adx_insl,
+	mv_outsb:		adx_outsb,
+	mv_outsw:		adx_outsw,
+	mv_outsl:		adx_outsl,
+
+	mv_readb:		adx_readb,
+	mv_readw:		adx_readw,
+	mv_readl:		adx_readl,
+	mv_writeb:		adx_writeb,
+	mv_writew:		adx_writew,
+	mv_writel:		adx_writel,
+
+	mv_ioremap:		adx_ioremap,
+	mv_iounmap:		adx_iounmap,
+
+	mv_isa_port2addr:	adx_isa_port2addr,
+
+	mv_init_arch:		setup_adx,
+	mv_init_irq:		init_adx_IRQ,
+
+	mv_rtc_gettimeofday:	sh_rtc_gettimeofday,
+	mv_rtc_settimeofday:	sh_rtc_settimeofday,
+
+	mv_hw_adx:		1,
+};
+ALIAS_MV(adx)
diff -ruN linux-cvs0718-mr-cf/arch/sh/kernel/setup_adx.c linux-cvs0718-mr-cf-adx/arch/sh/kernel/setup_adx.c
--- linux-cvs0718-mr-cf/arch/sh/kernel/setup_adx.c	Thu Jan  1 09:00:00 1970
+++ linux-cvs0718-mr-cf-adx/arch/sh/kernel/setup_adx.c	Wed Jul 18 19:27:05 2001
@@ -0,0 +1,40 @@
+/* 
+ * linux/arch/sh/kernel/setup_adx.c
+ *
+ * Copyright (C) 2001 A&D Co., Ltd.
+ *
+ * I/O routine and setup routines for A&D ADX Board
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+
+#include <asm/io.h>
+#include <asm/machvec.h>
+#include <asm/irq.h>
+#include <linux/module.h>
+
+void setup_adx(void)
+{
+	/* nothing to do just yet */
+/*	printk("setup_adx()\n");*/
+}
+
+void init_adx_IRQ(void)
+{
+	int i;
+
+/*	printk("init_adx_IRQ()\n");*/
+	/* setup irq_mask_register */
+	irq_mask_register = (unsigned short *)0xa6000008;
+
+	/* cover all external interrupt area by maskreg_irq_type
+	 * (Actually, irq15 doesn't exist)
+	 */
+	for (i = 0; i < 16; i++) {
+		make_maskreg_irq(i);
+		disable_irq(i);
+	}
+}
diff -ruN linux-cvs0718-mr-cf/include/asm-sh/io.h linux-cvs0718-mr-cf-adx/include/asm-sh/io.h
--- linux-cvs0718-mr-cf/include/asm-sh/io.h	Wed Jul 18 18:54:13 2001
+++ linux-cvs0718-mr-cf-adx/include/asm-sh/io.h	Wed Jul 18 19:27:05 2001
@@ -125,6 +125,8 @@
 #  include <asm/io_cat68701.h>
 # elif defined(CONFIG_SH_BIGSUR)
 #  include <asm/io_bigsur.h>
+# elif defined(CONFIG_SH_ADX)
+#  include <asm/io_adx.h>
 # elif defined(CONFIG_SH_UNKNOWN)
 #  include <asm/io_unknown.h>
 # else
diff -ruN linux-cvs0718-mr-cf/include/asm-sh/io_adx.h linux-cvs0718-mr-cf-adx/include/asm-sh/io_adx.h
--- linux-cvs0718-mr-cf/include/asm-sh/io_adx.h	Thu Jan  1 09:00:00 1970
+++ linux-cvs0718-mr-cf-adx/include/asm-sh/io_adx.h	Wed Jul 18 19:27:05 2001
@@ -0,0 +1,86 @@
+/*
+ * include/asm-sh/io_adx.h
+ *
+ * Copyright (C) 2001 A&D Co., Ltd.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * IO functions for an A&D ADX Board
+ */
+
+#ifndef _ASM_SH_IO_ADX_H
+#define _ASM_SH_IO_ADX_H
+
+#include <asm/io_generic.h>
+
+extern unsigned char adx_inb(unsigned long port);
+extern unsigned short adx_inw(unsigned long port);
+extern unsigned int adx_inl(unsigned long port);
+
+extern void adx_outb(unsigned char value, unsigned long port);
+extern void adx_outw(unsigned short value, unsigned long port);
+extern void adx_outl(unsigned int value, unsigned long port);
+
+extern unsigned char adx_inb_p(unsigned long port);
+extern void adx_outb_p(unsigned char value, unsigned long port);
+
+extern void adx_insb(unsigned long port, void *addr, unsigned long count);
+extern void adx_insw(unsigned long port, void *addr, unsigned long count);
+extern void adx_insl(unsigned long port, void *addr, unsigned long count);
+extern void adx_outsb(unsigned long port, const void *addr, unsigned long count);
+extern void adx_outsw(unsigned long port, const void *addr, unsigned long count);
+extern void adx_outsl(unsigned long port, const void *addr, unsigned long count);
+
+extern unsigned char adx_readb(unsigned long addr);
+extern unsigned short adx_readw(unsigned long addr);
+extern unsigned int adx_readl(unsigned long addr);
+extern void adx_writeb(unsigned char b, unsigned long addr);
+extern void adx_writew(unsigned short b, unsigned long addr);
+extern void adx_writel(unsigned int b, unsigned long addr);
+
+extern void * adx_ioremap(unsigned long offset, unsigned long size);
+extern void adx_iounmap(void *addr);
+
+extern unsigned long adx_isa_port2addr(unsigned long offset);
+
+extern void setup_adx(void);
+extern void init_adx_IRQ(void);
+
+#ifdef __WANT_IO_DEF
+
+#define __inb		adx_inb
+#define __inw		adx_inw
+#define __inl		adx_inl
+#define __outb		adx_outb
+#define __outw		adx_outw
+#define __outl		adx_outl
+
+#define __inb_p		adx_inb_p
+#define __inw_p		adx_inw
+#define __inl_p		adx_inl
+#define __outb_p	adx_outb_p
+#define __outw_p	adx_outw
+#define __outl_p	adx_outl
+
+#define __insb		adx_insb
+#define __insw		adx_insw
+#define __insl		adx_insl
+#define __outsb		adx_outsb
+#define __outsw		adx_outsw
+#define __outsl		adx_outsl
+
+#define __readb		adx_readb
+#define __readw		adx_readw
+#define __readl		adx_readl
+#define __writeb	adx_writeb
+#define __writew	adx_writew
+#define __writel	adx_writel
+
+#define __isa_port2addr	adx_isa_port2addr
+#define __ioremap	adx_ioremap
+#define __iounmap	adx_iounmap
+
+#endif
+
+#endif /* _ASM_SH_IO_AANDD_H */
diff -ruN linux-cvs0718-mr-cf/include/asm-sh/machvec.h linux-cvs0718-mr-cf-adx/include/asm-sh/machvec.h
--- linux-cvs0718-mr-cf/include/asm-sh/machvec.h	Wed Jul 18 18:54:13 2001
+++ linux-cvs0718-mr-cf-adx/include/asm-sh/machvec.h	Wed Jul 18 19:27:05 2001
@@ -76,6 +76,7 @@
 	unsigned int mv_hw_hd64465 : 1;
 	unsigned int mv_hw_dreamcast : 1;
 	unsigned int mv_hw_bigsur : 1;
+	unsigned int mv_hw_adx : 1;
 };
 
 extern struct sh_machine_vector sh_mv;
@@ -92,6 +93,7 @@
 #define MACH_SH2000	(sh_mv.mv_hw_sh2000)
 #define MACH_DREAMCAST	(sh_mv.mv_hw_dreamcast)
 #define MACH_BIGSUR	(sh_mv.mv_hw_bigsur)
+#define MACH_ADX	(sh_mv.mv_hw_adx)
 #else
 # if defined(CONFIG_SH_SOLUTION_ENGINE) || \
      defined(CONFIG_SH_7751_SOLUTION_ENGINE)
@@ -148,6 +150,11 @@
 #  define MACH_BIGSUR		1
 # else
 #  define MACH_BIGSUR		0
+# endif
+# ifdef CONFIG_SH_ADX
+#  define MACH_ADX		1
+# else
+#  define MACH_ADX		0
 # endif
 #endif
 
---

=================================
Masahiro ABE, A&D Co., Ltd. Japan

[linuxsh-dev] Patches for A&D ADX support - #2 [Direct CF for SH4]

[Masahiro A. <m-...@aa...>]

Second Patch - Direct CompactFlash Support for SH4

---
diff -ruN linux-cvs0718-mr/ChangeLog linux-cvs0718-mr-cf/ChangeLog
--- linux-cvs0718-mr/ChangeLog	Wed Jul 18 18:53:49 2001
+++ linux-cvs0718-mr-cf/ChangeLog	Wed Jul 18 19:12:57 2001
@@ -1,5 +1,12 @@
 2001-07-18  Masahiro ABE <m-...@aa...>
 
+	* Documentation/Configure.help (CONFIG_CF_ENABLER): Support area 5 also.
+	(CONFIG_CF_AREA): Added.
+	* arch/sh/config.in : Added selection of CompactFlash area.
+	* arch/sh/kernel/cf-enabler.c (allocate_cf_area): Added to support
+	directly connected CompactFlash for SH4.
+	(cf_init_default): call allocate_cf_area if SH4.
+
 	* arch/sh/kernel/irq_maskreg.c : Add support for simple word-size
 	IRQ mask register.
 	* include/asm-sh/irq.h : Likewise.
diff -ruN linux-cvs0718-mr/Documentation/Configure.help linux-cvs0718-mr-cf/Documentation/Configure.help
--- linux-cvs0718-mr/Documentation/Configure.help	Wed Jul 18 18:44:08 2001
+++ linux-cvs0718-mr-cf/Documentation/Configure.help	Wed Jul 18 19:18:14 2001
@@ -16400,7 +16400,7 @@
 
 Directly Connected Compact Flash support
 CONFIG_CF_ENABLER
-  If your board has "Directly Connected" Compact Flash at area 6, 
+  If your board has "Directly Connected" CompactFlash at area 5 or 6, 
   you may want to enable this option.  Then, you can use CF as
   primary IDE drive (only tested for SanDisk).
 
@@ -16444,6 +16444,14 @@
   say Y or M (for module).
 
   If unsure, say N.
+
+CompactFlash Connection Area
+CONFIG_CF_AREA5
+  If your board has "Directly Connected" CompactFlash, You should
+  select the area where your CF is connected to.
+  
+  It can be either Area5 (Physical address 0x14000000) or Area6
+  (0x18000000). Default selection is Area6.
 
 #
 # m68k-specific kernel options
diff -ruN linux-cvs0718-mr/arch/sh/config.in linux-cvs0718-mr-cf/arch/sh/config.in
--- linux-cvs0718-mr/arch/sh/config.in	Wed Jul 18 18:43:55 2001
+++ linux-cvs0718-mr-cf/arch/sh/config.in	Wed Jul 18 19:08:15 2001
@@ -130,6 +130,18 @@
   bool 'Compact Flash Enabler support' CONFIG_CF_ENABLER
 fi
 
+if [ "$CONFIG_CF_ENABLER" = "y" ]; then
+ choice 'Compact Flash Connection Area' \
+   "Area5 CONFIG_CF_AREA5 \
+    Area6 CONFIG_CF_AREA6" Area6
+ if [ "$CONFIG_CF_AREA5" = "y" ]; then
+   define_hex CONFIG_CF_BASE_ADDR b4000000
+ fi
+ if [ "$CONFIG_CF_AREA6" = "y" ]; then
+   define_hex CONFIG_CF_BASE_ADDR b8000000
+ fi
+fi
+
 bool 'Hitachi HD64461 companion chip support' CONFIG_HD64461
 if [ "$CONFIG_HD64461" = "y" ]; then
    int 'HD64461 IRQ' CONFIG_HD64461_IRQ 36
diff -ruN linux-cvs0718-mr/arch/sh/kernel/cf-enabler.c linux-cvs0718-mr-cf/arch/sh/kernel/cf-enabler.c
--- linux-cvs0718-mr/arch/sh/kernel/cf-enabler.c	Wed Jul 18 18:43:55 2001
+++ linux-cvs0718-mr-cf/arch/sh/kernel/cf-enabler.c	Wed Jul 18 18:55:34 2001
@@ -14,7 +14,6 @@
 #include <asm/io.h>
 #include <asm/irq.h>
 
-#define CF_CIS_BASE	0xb8000000
 /*
  * You can connect Compact Flash directly to the bus of SuperH.
  * This is the enabler for that.
@@ -29,15 +28,60 @@
  * 0xB8001000 : Common Memory
  * 0xBA000000 : I/O
  */
+#if defined(CONFIG_IDE) && defined(__SH4__)
+/* SH4 can't access PCMCIA interface through P2 area.
+ * we must remap it with appropreate attribute bit of the page set.
+ * this part is based on Greg Banks' hd64465_ss.c implementation - Masahiro Abe */
+#include <linux/mm.h>
+#include <linux/vmalloc.h>
+
+#if defined(CONFIG_CF_AREA6)
+#define slot_no 0
+#else
+#define slot_no 1
+#endif
+
+/* defined in mm/ioremap.c */
+extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
+
+/* use this pointer to access to directly connected compact flash io area*/
+void *cf_io_base;
+
+static int __init allocate_cf_area(void)
+{
+	pgprot_t prot;
+	unsigned long paddrbase, psize;
+
+	/* open I/O area window */
+	paddrbase = virt_to_phys((void*)CONFIG_CF_BASE_ADDR);
+	psize = PAGE_SIZE;
+	prot = PAGE_KERNEL_PCC(slot_no, _PAGE_PCC_IO16);
+	cf_io_base = p3_ioremap(paddrbase, psize, prot.pgprot);
+	if (!cf_io_base) {
+		printk("allocate_cf_area : can't open CF I/O window!\n");
+		return -ENOMEM;
+	}
+/*	printk("p3_ioremap(paddr=0x%08lx, psize=0x%08lx, prot=0x%08lx)=0x%08lx\n",
+	    	paddrbase, psize, prot.pgprot, cf_io_base);*/
+
+	/* XXX : do we need attribute and common-memory area also? */
+
+	return 0;
+}
+#endif
 
 static int __init cf_init_default(void)
 {
-#ifdef CONFIG_IDE
-	/* Enable the card, and set the level interrupt */
-	ctrl_outw(0x0042, CF_CIS_BASE+0x0200);
+/* You must have enabled the card, and set the level interrupt
+ * before reaching this point. Possibly in boot loader.
+ */
+#if defined(CONFIG_IDE) && defined(__SH4__)
+	allocate_cf_area();
 #endif
+/* This should be done in each board's init_xxx_irq.
 	make_imask_irq(14);
 	disable_irq(14);
+*/
 	return 0;
 }
 
---

=================================
Masahiro ABE, A&D Co., Ltd. Japan

[linuxsh-dev] Patches for A&D ADX support - #1 [MaskReg]

[Masahiro A. <m-...@aa...>]

I'm sending a series of patches needed to support our custom board,
called ADX. First two of three are similar to what I've posted before.
Those may be used not only for ADX but some other boards. The last one
is ADX only patches. I'm going to send them in separate emails. They
should be able to be applied to current CVS kernel, consecutively.

Niibe-san, could you please consider applying those to CVS?

Here is the first one - Simple Mask Register Support.
-----
diff -ruN linux-cvs0718/ChangeLog linux-cvs0718-mr/ChangeLog
--- linux-cvs0718/ChangeLog	Wed Jul 18 18:41:59 2001
+++ linux-cvs0718-mr/ChangeLog	Wed Jul 18 18:48:28 2001
@@ -1,3 +1,9 @@
+2001-07-18  Masahiro ABE <m-...@aa...>
+
+	* arch/sh/kernel/irq_maskreg.c : Add support for simple word-size
+	IRQ mask register.
+	* include/asm-sh/irq.h : Likewise.
+
 2001-07-18  NIIBE Yutaka  <gn...@m1...>
 
 	* arch/sh/mm/fault.c (__do_page_fault): Use pte_not_present.
diff -ruN linux-cvs0718/arch/sh/kernel/irq_maskreg.c linux-cvs0718-mr/arch/sh/kernel/irq_maskreg.c
--- linux-cvs0718/arch/sh/kernel/irq_maskreg.c	Thu Jan  1 09:00:00 1970
+++ linux-cvs0718-mr/arch/sh/kernel/irq_maskreg.c	Wed Jul 18 18:44:55 2001
@@ -0,0 +1,107 @@
+/*
+ * linux/arch/sh/kernel/irq_maskreg.c
+ *
+ * Copyright (C) 2001 A&D Co., Ltd. <http://www.aandd.co.jp>
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.                            
+ *
+ * Interrupt handling for Simple external interrupt mask register
+ *
+ * This is for the machine which have single 16 bit register
+ * for masking external IRQ individually.
+ * Each bit of the register is for masking each interrupt.
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/machvec.h>
+
+/* address of external interrupt mask register
+ * address must be set prior to use these (maybe in init_XXX_irq())
+ * XXX : is it better to use .config than specifying it in code? */
+unsigned short *irq_mask_register = 0;
+
+/* forward declaration */
+static unsigned int startup_maskreg_irq(unsigned int irq);
+static void shutdown_maskreg_irq(unsigned int irq);
+static void enable_maskreg_irq(unsigned int irq);
+static void disable_maskreg_irq(unsigned int irq);
+static void mask_and_ack_maskreg(unsigned int);
+static void end_maskreg_irq(unsigned int irq);
+
+/* hw_interrupt_type */
+static struct hw_interrupt_type maskreg_irq_type = {
+	" Mask Register",
+	startup_maskreg_irq,
+	shutdown_maskreg_irq,
+	enable_maskreg_irq,
+	disable_maskreg_irq,
+	mask_and_ack_maskreg,
+	end_maskreg_irq
+};
+
+/* actual implementatin */
+static unsigned int startup_maskreg_irq(unsigned int irq)
+{ 
+	enable_maskreg_irq(irq);
+	return 0; /* never anything pending */
+}
+
+static void shutdown_maskreg_irq(unsigned int irq)
+{
+	disable_maskreg_irq(irq);
+}
+
+static void disable_maskreg_irq(unsigned int irq)
+{
+	if (irq_mask_register) {
+		unsigned long flags;
+		unsigned short val, mask = 0x01 << irq;
+
+		/* Set "irq"th bit */
+		save_and_cli(flags);
+		val = ctrl_inw((unsigned long)irq_mask_register);
+		val |= mask;
+		ctrl_outw(val, (unsigned long)irq_mask_register);
+		restore_flags(flags);
+	}
+}
+
+static void enable_maskreg_irq(unsigned int irq)
+{
+	if (irq_mask_register) {
+		unsigned long flags;
+		unsigned short val, mask = ~(0x01 << irq);
+
+		/* Clear "irq"th bit */
+		save_and_cli(flags);
+		val = ctrl_inw((unsigned long)irq_mask_register);
+		val &= mask;
+		ctrl_outw(val, (unsigned long)irq_mask_register);
+		restore_flags(flags);
+	}
+}
+
+static void mask_and_ack_maskreg(unsigned int irq)
+{
+	disable_maskreg_irq(irq);
+}
+
+static void end_maskreg_irq(unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
+		enable_maskreg_irq(irq);
+}
+
+void make_maskreg_irq(unsigned int irq)
+{
+	disable_irq_nosync(irq);
+	irq_desc[irq].handler = &maskreg_irq_type;
+	disable_maskreg_irq(irq);
+}
diff -ruN linux-cvs0718/include/asm-sh/irq.h linux-cvs0718-mr/include/asm-sh/irq.h
--- linux-cvs0718/include/asm-sh/irq.h	Wed Jul 18 18:39:45 2001
+++ linux-cvs0718-mr/include/asm-sh/irq.h	Wed Jul 18 18:44:55 2001
@@ -170,6 +170,12 @@
 extern void enable_irq(unsigned int);
 
 /*
+ * Simple Mask Register Support
+ */
+extern void make_maskreg_irq(unsigned int irq);
+extern unsigned short *irq_mask_register;
+
+/*
  * Function for "on chip support modules".
  */
 extern void make_ipr_irq(unsigned int irq, unsigned int addr,
-----

=================================
Masahiro ABE, A&D Co., Ltd. Japan

[linuxsh-dev] Re: Another patch

[Masahiro A. <m-...@aa...>]

On Tue, 17 Jul 2001 15:02:19 +0100
Stuart Menefy <Stu...@st...> wrote:

> Folks
> 
> Attached is a small patch which fixes some problems we've been having.
> 
> The problem we were seeing was that if a thread yield'ed, and the
> new thread which was selected had never run before, then the yield
> flag on the previous thread was never cleared, so it never got
> rescheduled.
> 
> While I was at it I also added a missing call into syscall_trace for
> the newly created task.
> 
> Any problems, let me know
> 
> Stuart

Please forgive me if this is silly question.

Is this patch still needed, even if current (2.4.7-pre7) code has the
(related, I think) patch in kernel/sched.c? I thought the change in
sched.c at line 610 to 614 addresses the similar problem.

I haven't tried Stuart's patch on current kernel yet. If someone can
shed light on this, I appreciate.

=================================
Masahiro ABE, A&D Co., Ltd. Japan

[linuxsh-dev] Re: [Handhelds] Announcement : SynCE project

[Shane N. <sh...@mi...>]

You might want to checkout Agenda Desktop, and VRSync.  Agenda Desktop is a 
synchronization tool developed by the Agenda community of developers, and 
VRSync is a syncronization tool developed by internal Agenda people.  Both 
are pretty good synchronization tools for the Agenda, and it would be nice if 
there was some interoperation between these two communities.

Thanks,
Shane Nay.

On Tuesday 17 July 2001 14:11, Ludovic LANGE wrote:
> Hello,
>
> First of all sorry for the intrusion, but I think this may be of
> interest for some of you.
>
>
>
> SynCE project's ambitious goal is to provide a mean of synchronising
> handhelds devices with a (desktop) computer.
>
> By handheld, we mean any portable / embedded / PDA.... device, that
> needs to synchronize its data with a less mobile computer.
> (An exemple would be any PDA/PocketPC running Windows CE, or any PDA
> running Linux, etc...)
>
>
> The first step of this project is to provide a full (client & server)
> implementation of Microsoft's RAPI protocol, which is the low-level
> protocol used in ActiveSync synchronisation.
> This will allow, when completed :
>  - a Windows CE device to communicate with any (non-Microsoft) computer,
>  - A Linux device to communicate with a Microsoft computer and benefits
> from the existing tools,
>  - etc, etc...
>
> The second step will be to provide a set of tools to synchronize data
> with 'standard' open or closed source application : Mozilla, KMail, etc....
>
>
> Right now, the project is in its early, early stages ( we don't even
> have an alpha release ! ), but yet there are some bits that allow an
> implementation of the client part of the RAPI protocol, to query
> informations (registry, filesystem, databases,...) from a WindowsCE device.
> One tool (DBBackup) allows a full dump of the databases of the device.
>
>
> I won't interfere more with the list, and I invite all people interested
> to have a look on the project page (
> http://www.sourceforge.net/projetcs/synce  &
> http://synce.sourceforge.net ) and to subscribe to the mailing-list.
> We currently are looking for developper, and for testers having mobile
> devices still under Windows CE (PDA, PocketPC, etc...) and an unix-like
> desktop environment.
>
>
> Best regards,
>
> Ludovic LANGE
>
> _______________________________________________
> Handhelds mailing list
> Han...@ha...
> http://handhelds.org/mailman/listinfo/handhelds
> irc://irc.openprojects.net #handhelds

[linuxsh-dev] Electric Fence problems

[NIIBE Y. <gn...@m1...>]

Please try this out.  I've committed it.

2001-07-18  NIIBE Yutaka  <gn...@m1...>
 
	* arch/sh/mm/fault.c (__do_page_fault): Use pte_not_present.
	* include/asm-sh/pgtable.h (pte_not_present): New inline function.

Index: arch/sh/mm/fault.c
===================================================================
RCS file: /cvsroot/linuxsh/kernel/arch/sh/mm/fault.c,v
retrieving revision 1.43
diff -u -r1.43 fault.c
--- arch/sh/mm/fault.c	2001/07/17 11:45:05	1.43
+++ arch/sh/mm/fault.c	2001/07/18 04:26:06
@@ -255,7 +255,7 @@
 	}
 	pte = pte_offset(pmd, address);
 	entry = *pte;
-	if (pte_none(entry) || !pte_present(entry)
+	if (pte_none(entry) || pte_not_present(entry)
 	    || (writeaccess && !pte_write(entry)))
 		return 1;
 
Index: include/asm-sh/pgtable.h
===================================================================
RCS file: /cvsroot/linuxsh/kernel/include/asm-sh/pgtable.h,v
retrieving revision 1.33
diff -u -r1.33 pgtable.h
--- include/asm-sh/pgtable.h	2001/07/08 08:35:07	1.33
+++ include/asm-sh/pgtable.h	2001/07/18 04:26:08
@@ -210,6 +210,7 @@
 static inline int pte_dirty(pte_t pte){ return pte_val(pte) & _PAGE_DIRTY; }
 static inline int pte_young(pte_t pte){ return pte_val(pte) & _PAGE_ACCESSED; }
 static inline int pte_write(pte_t pte){ return pte_val(pte) & _PAGE_RW; }
+static inline int pte_not_present(pte_t pte){ return !(pte_val(pte) & _PAGE_PRESENT); }
 
 static inline pte_t pte_rdprotect(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
 static inline pte_t pte_exprotect(pte_t pte)	{ set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_USER)); return pte; }
--