linuxsh-dev

[linuxsh-dev] a 2.5.69 local patch

[kaz K. <kk...@rr...>]

Hi,

I'm working on 2.5.6x SH-4 kernel for NPTL. Now I can get an userland
on 2.5.69 kernel based on sourceforge CVS HEAD.
It seems that merging restructure version to the head is going on yet
but it would be not so bad to check my local patch with many eyes :-)
Anyway, it works on 7750 Solution Engine and I can run NPTL tests of
the latest GNU libc and nptl-0.37.
I add the kernel support for TLS and many i386 changes as local patches.
Niibe-san's gUSA support is deadly needed for the new NPTL implementation
for SH. Changes in tlb.h were suggested by Sugioka-san to solve very
weird cache alias problem.
I've tested it only for 7750 Solution Engine with nfs root. The different
local version of 2.5.66 was more widely tested by Saito-san
<ksaito at interface dot co dot jp> with his company's board and he
reported that modules, IDE, PCI and USB devices are basically ok. The
change of pci.h is given by him.

The attached list is the ChangeLog of this local patch. The patch itself
is slightly big to attach here as a plain text, so I put it at:
<URL:http://dodo.nurs.or.jp/~kkojima/linux-sh4/patch-sf-20030506.diff.bz2>.

Regards,
	kaz
--

	* Makefile  (CFLAGS): Use -O1 to avoid miss compiling by gcc-3.2.
	(core-y): Add usr/.
	* arch/sh/Makefile (LDFLAGS_BLOB): Define.
	* arch/sh/kernel/cpu/rtc.c (sh_rtc_gettimeofday): Don't make
	overflow.
	* arch/sh/kernel/entry.S: Add gUSA support.  Call syscall_tail
	only when returning from fork.  Add new syscalls.
	* arch/sh/kernel/io_7751se.c: Fix typo.
	* arch/sh/kernel/io_se.c (delay): Wait more.
	* arch/sh/kernel/irq.c: Follow i386 changes.
	* arch/sh/kernel/module.c: Rewriting.
	* arch/sh/kernel/process.c (kernel_thread_helper): New.
	(kernel_thread): Use kernel_thread_helper.  Return error value
	also.
	(dump_task_regs, dump_task_fpu): New.
	(copy_thread): Handle CLONE_SETTLS flag and initialize child
	tids.
	(__switch_to): Return PREV pointer.
	(sys_clone): Handle tid pointers.
	* arch/sh/kernel/ptrace.c: Cleanup and follow i386 changes.
	* arch/sh/kernel/signal.c (handle_signal): Add gUSA support.
	(do_signal): Handle ERESTART_RESTARTBLOCK case.
	* arch/sh/kernel/sys_sh.c (sys_ipc): Use sys_semtimedop and
	handle SEMTIMEDOP.
	* arch/sh/kernel/time.c (TICK_SIZE): Use tick_nsec.
	(do_gettimeoffset): Lock critical region.
	(do_gettimeofday): Follow i386 changes.
	(time_init): Override tick_nsec here.
	* arch/sh/lib/Makefile (obj-y): Add div64.o.
	* arch/sh/lib/div64.S: New file.
	* arch/sh/mm/cache-sh2.c (detect_cpu_and_cache_system): Use
	SH_CACHE_* instead of CACHE_* because CACHE_VALID collides with
	the one in NFS header file.
	* arch/sh/mm/cache-sh3.c (detect_cpu_and_cache_system): Likewise.
	(__flush_wback_region): Likewise.
	(__flush_purge_region): Likewise.
	* arch/sh/mm/cache-sh4.c (flush_cache_4096): Likewise.
	* arch/sh/mm/init.c (sh_cache_init): Likewise.
	* arch/sh/mm/extable.c (fixup_exception): New.
	* arch/sh/mm/tlb-sh4.c (update_mmu_cache): Set write through
	bit of PTEL if CONFIG_SH_WRITETHROUGH defined.
	* drivers/net/stnic.c (ei_interrupet): Change return type.
	* include/asm-sh/byteorder.h (___arch__swab64): New.
	(__arch__swab64): Define.
	* include/asm-sh/cache.h: Rename CACHE_* to SH_CACHE_*.
	* include/asm-sh/delay.h (ndelay): Define.
	* include/asm-sh/div64.h (do_div): Implement a real 64/32-bit
	division.
	* include/asm-sh/elf.h: Follow i386 change.
	* include/asm-sh/hardirq.h: Likewise.
	* include/asm-sh/ide.h: Include generic definitions.
	* include/asm-sh/ipc.h (SEMTIMEDOP): Define.
	* include/asm-sh/module.h (MODULE_PROC_FAMILY): Define.
	* include/asm-sh/param.h: Follow i386 changes.
	* include/asm-sh/pci.h (pci_map_sg): Fix dma_address in loop.
	(pci_dma_sync_sg): Likewise.
	* include/asm-sh/pgtable.h: Change _PAGE_FILE to 0x80 and
	drop this bit from _PAGE_FLAGS_HARDWARE_MASK.
	* include/asm-sh/processor.h: Follow i386 changes.
	* include/asm-sh/ptrace.h: Remove PTRACE_OLDSETOPTIONS and
	define PTRACE_O_TRACESYSGOOD.
	* include/asm-sh/rwsem.h: Cut&copy from i386.
	* include/asm-sh/semaphore.h: Follow i386 changes.
	* include/asm-sh/thread_info.h: Follow i386 changes.
	(struct thread_info): Make CPU and PREEMPT_COUNT 32-bit.
	* include/asm-sh/tlb.h (tlb_start_vma): Call flush_cache_range.
	(tlb_end_vma): Call flush_tlb_range.
	* include/asm-sh/types.h: Follow i386 changes.
	* include/asm-sh/uaccess.h: Remove fixup_exception.
	* include/asm-sh/unistd.h: Define new system call numbers.
	* include/linux/elf.h: Define SH relocation types.
	* include/linux/mm.h (put_page): Revert sf local change. ???
	* include/linux/page-flags.h: Revert sf local change. ???
	* /kernel/timer.c (tick_sec): Don't use static initializer.
	(tick_nsec): Likewise.
	(init_timers): Initialize tick_sec and tick_nsec here.

[linuxsh-dev] HEAD 2.5 Updates

[Paul M. <le...@li...>]

Just to let everyone know (especially those not on linuxsh-cvs), I've
merged the linux-2_5-restructure-saturn branch into HEAD. This includes
pretty much the entire bulk of the 2.5 restructuring effort as well as
lots of other new and fun things, and also brings us in sync with
2.5.68.

The side effect of this is that a few ports will need some updating, and
some processor specific stuff still needs to be cleaned up to work (sh2,
sh3, and st40, as an example).

The large chunks of the merge have been tagged accordingly in the same
fashion the last restructure merge was done in. As such, the state of
HEAD _prior_ to the merge is tagged as

	linux-2_5-restructure-saturn-premerge

and after the merge (such as it is now), the tag is

	linux-2_5-restructure-saturn-postmerge

Also, ChangeLogs have been keept relatively up-to-date with some of the
events that transpired in the restructure branches, with quite a bit
occuring in ChangeLog-2002.

For history, there are a few branches that were started and are either
being killed off or are already dead.

	linux-2_5-restructure	(restructuring started here)
	linux-2_5-restructure-smp	(SMP started (for SH7604))
	linux-2_5-restructure-saturn	(MMUless port started)

The SMP and Saturn branches were forked off of the restructure branch
(obviously). The SMP branch was short lived, and was integrated and
consumed by the saturn branch once the basics were out of the way. The
restructure branch also ceased to have much development done on it once
things were more or less constantly being merged into the saturn branch.
(I started to merge back into restructure, but grew tired of CVS's
inability to even pretend to merge branches effeciently).

I haven't been tagging independant 2.5.x merges into the saturn branch,
so there's no immediate tag for 2.5.44 - 2.5.68, though if there's
enough interest in this, I can go back and create tags by timestamp off
of the AGAINST-2.5.xx files.

At the moment there's not a whole lot of other documentation outlining
changes, though the new-machine document will likely be updated in the
near future to outline most of the backend changes.

[linuxsh-dev] ...no subject...

[<WH...@bf...>]

hi list, 
the sh version of the linux kernel_thread() call contains 
a sign error. 
The when looking for a pid the type unsigned long is used. 
but the function should return pid_t what is a signed 
virtual type (imagine: short) 

I dont understand much of the sh asm code so i left the 
type unchanged but the basic fix can be found with 
www.getenv.de/~walter 
Somebody should fix that, please. 

walter 

ps: i couldnt find a maintainer in the MAINTAINERS file 
    i had also problems finding a way into the correct ml
    that accept non-mmber-mail. you shoud update your
    contact file.

[linuxsh-dev] Dreamcast VMU filesystem update

[Adrian M. <ad...@mc...>]

An update to the filesystem driver for the Sega Dreamcast visual memory u=
nit=20
(VMU) has been committed to the linuxdc CVS repository.

Most write operations are now supported, but the code is experimental and=
=20
doesn't yet (due to the way the vmu handles games) support executible fil=
es.

Have fun.

Adrian

[linuxsh-dev] meminfo fields query

[peter g. <pga...@li...>]

What do the fields in /proc/meminfo mean? "man proc" and "man free" are not very informative.
 I am particularly interested in the following fields:
MemTotal   - Total memory of course, but what total exactly, after what and before what?
MemFree    - Free for what purpose, and how is other memory non-free?
Buffers    - Buffer between what and what? Is this memory available at a pinch?
Cached     - A cache for what exactly? How does it differ to a buffer?
Active/inactive - these form a pool of some sort, but to what purpose?
dirty      - Is this cache, buffer, or something else?

How does this memory add up, because if all the totals except for MemTotal are added together, the total is greater than
MemTotal, so obviously a particular bit of memory can exist in multiple categories.

If anybody could refer me to appropriate documentation I would be grateful.

-- 
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[linuxsh-dev] 2.4.20 cleanup

[SUGIOKA T. <su...@it...>]

Hi,

I'll commit following changes to 2.4 branch soon.

	* init/main.c: Removed.
	* drivers/block/rd.c: Removed.
	* include/linux/highmem.h: Removed.

These files are same as original one(main.c, rd.c) or old and buggy (highmem.h).

----
SUGIOKA Toshinobu

[linuxsh-dev] Re: [linux-sh:02700] deviceinfo

[Paul M. <le...@li...>]

On Fri, Apr 18, 2003 at 02:13:18PM +0900, Masahiro Abe wrote:
> We needed to distinguish each configuration from software standpoint,
> both in driver and in user-mode apps. So, we've modified machvec a
> little and also added entry to /proc for being able to see the machine
> information.
> 
> Mr. Hiroki HATTORI of Computron have developed those code for us. He'd
> been inspired by the idea in linux-arm/xscale tree.
> 
> Any suggestions/opinions welcomed.
> 
In 2.5 we deal with this a little differently, and there are some more
changes pending that'll clean up most of the rest of the machvec
identification stuff.

At the moment each board is responsible for defining its own
get_system_type(), which is a unique string identifying the board.

cpuinfo reports that, the processor family, and the processor subtype.

One thing I liked that the ARM tree had done was the mach-types
generation scripts in arch/arm/tools. For 2.5, I wrote something similar
(which hasn't been commited yet) which dynamically built a lot of the
machvec identification info. This in turn also allows for things like
checking mach_is_dreamcast(), which are all built up dynamically.  All
that is necessary is to keep the board list up to date with the
corresponding Kconfig entry and a few other minor things.

If there is interest in something like that, I'll tidy up what i have
sitting around and post it.

I'd like to avoid seeing too much being shoved into the machvec, since
ideally it'll be removed in the not too distant future in its entirety.

Thoughts?

Re: [linuxsh-dev] [PATCH] fix __flush_cache_4096

[SUGIOKA T. <su...@it...>]

At 11:54 03/04/17 +0900, SUGIOKA Toshinobu <su...@it...> wrote:
>I'll commit following fix soon.
>
>	* arch/sh/mm/clear_page.S (__flush_cache_4096): Don't change associated 
>data that is to be flushed.
>
>Index: arch/sh/mm/clear_page.S
>===================================================================
>RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/clear_page.S,v
>retrieving revision 1.1.1.1.2.6
>diff -u -r1.1.1.1.2.6 clear_page.S
>--- arch/sh/mm/clear_page.S     22 Aug 2002 17:48:09 -0000      1.1.1.1.2.6
>+++ arch/sh/mm/clear_page.S     17 Apr 2003 02:03:47 -0000
>@@ -208,13 +208,9 @@
> 2:
>        .rept   32
>        mov.l   r5,@r0
>-       add     #32,r5
>        mov.l   r5,@(32,r0)
>-       add     #32,r5
>        mov.l   r5,@(r0,r6)
>-       add     #32,r5
>        mov.l   r5,@(r0,r7)
>-       add     #32,r5
>        add     r2,r0
>        .endr
>        nop
>

This is wrong. Bit 10,11 of physical address are used as cache-tag, and compared with r5 here.
So r5 should be updated.
Original version should work correctly, but I will commit updated version which is more efficient.

Index: arch/sh/mm/clear_page.S
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/clear_page.S,v
retrieving revision 1.1.1.1.2.7
diff -u -r1.1.1.1.2.7 clear_page.S
--- arch/sh/mm/clear_page.S     17 Apr 2003 13:43:07 -0000      1.1.1.1.2.7
+++ arch/sh/mm/clear_page.S     18 Apr 2003 09:27:50 -0000
@@ -211,6 +211,7 @@
        mov.l   r5,@(32,r0)
        mov.l   r5,@(r0,r6)
        mov.l   r5,@(r0,r7)
+       add     r2,r5
        add     r2,r0
        .endr
        nop


----
SUGIOKA Toshinobu

[linuxsh-dev] RTLinux-sh-3.2pre1+ for kernel2.4.18 working

[Masahiro A. <m-...@aa...>]

Hello,

With many help from you all, linux-2.4.18 + RTLinux-3.2-pre1 works on SH
platform. I've tried it on Hitachi ULSI SolutionEngine MS7750SSE01(SH4)
and observed timer accuracy below 70 microsecs.

This is the candidate for replacement of what I've announced before,
which used linux-2.4.5 + RTLinux-3.0.
I'd like to thank everybody in the community, especially Mr. Saito for
starting this work on 2.4.17, Mr. Menefy and Mr. Sugioka for providing
excellent TLB-Miss-handling code.

Patches are here:
<ftp://ftp.aandd.co.jp/pub/linuxsh/rtlinux/work/20030418/>

Please read HOWTO text there for how to apply patches.

Please post comments and/or suggestions if any.

=================================
Masahiro ABE, A&D Co., Ltd. Japan

[linuxsh-dev] deviceinfo

[Masahiro A. <m-...@aa...>]

We at A&D develops SH4-based system, and it received
modification/addition of feature. There are now 3 revision.

We needed to distinguish each configuration from software standpoint,
both in driver and in user-mode apps. So, we've modified machvec a
little and also added entry to /proc for being able to see the machine
information.

Mr. Hiroki HATTORI of Computron have developed those code for us. He'd
been inspired by the idea in linux-arm/xscale tree.

This code includes example code for our system, ADX.

Any suggestions/opinions welcomed.

-----
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/config.in linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/config.in
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/config.in	Thu Mar 27 14:32:48 2003
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/config.in	Tue Apr  1 18:15:19 2003
@@ -181,6 +181,8 @@
    int 'HD64465 IRQ' CONFIG_HD64465_IRQ 5
 fi
 
+tristate "Device info (/proc/deviceinfo) support" CONFIG_DEVICEINFO
+
 bool 'Wakeup UBC on startup' CONFIG_UBC_WAKEUP
 bool 'DMA controller (DMAC) support' CONFIG_SH_DMA
 
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/Makefile linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/Makefile
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/Makefile	Thu Mar 27 14:31:32 2003
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/Makefile	Tue Apr  1 18:15:19 2003
@@ -12,7 +12,7 @@
 
 O_TARGET := kernel.o
 
-export-objs	:= io.o io_generic.o io_hd64461.o setup_hd64461.o sh_ksyms.o
+export-objs	:= io.o io_generic.o io_hd64461.o setup_hd64461.o sh_ksyms.o io_adx.o
 
 obj-y	:= process.o signal.o entry.o traps.o irq.o irq_ipr.o \
 	ptrace.o setup.o time.o sys_sh.o semaphore.o \
@@ -24,6 +24,7 @@
 obj-$(CONFIG_SH_DMA)		+= dma.o
 obj-$(CONFIG_SH_STANDARD_BIOS)	+= sh_bios.o
 obj-$(CONFIG_SH_KGDB)		+= kgdb_stub.o kgdb_jmp.o
+obj-$(CONFIG_DEVICEINFO)	+= deviceinfo.o
 
 ifeq ($(CONFIG_PCI),y)
 ifeq ($(CONFIG_SH_DREAMCAST),y)
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/deviceinfo.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/deviceinfo.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/deviceinfo.c	Thu Jan  1 09:00:00 1970
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/deviceinfo.c	Wed Apr  2 19:39:19 2003
@@ -0,0 +1,70 @@
+/*
+ * linux/arch/sh/kernel/deviceinfo.c
+ *
+ * by Hiroki Hattori <ha...@co...>
+ *    Masahiro Abe <m-...@aa...>
+ * Copyright (C) 2003 A&D Co., Ltd. <http://www.aandd.co.jp>
+ *
+ * /proc filesystem for device specific data.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/proc_fs.h>
+#include <asm/machvec.h>
+#include <asm/io.h>
+#include <asm/uaccess.h>
+
+static struct proc_dir_entry* root_entry = NULL;
+
+static int
+read_ushort(char* page, char** start, off_t off,
+	    int count, int* eof, void* data)
+{
+	return sprintf(page, "%d\n", *(unsigned short*)data);
+}
+
+static int
+read_string(char* page, char** start, off_t off,
+	    int count, int* eof, void* data)
+{
+	return sprintf(page, "%s\n", (char *)data);
+}
+
+static int __init
+init_deviceinfo(void)
+{
+	printk("Registering /proc/deviceinfo filesystem ...\n");
+
+	root_entry = proc_mkdir("deviceinfo", NULL);
+
+	create_proc_read_entry("name", 0, root_entry, read_string, &sh_mv.mv_name);
+	create_proc_read_entry("type", 0, root_entry, read_ushort, &sh_mv.mv_mach_type);
+	create_proc_read_entry("subtype", 0, root_entry, read_ushort, &sh_mv.mv_mach_subtype);
+#if defined(CONFIG_SH_ADX)
+	create_proc_read_entry("display-type", 0, root_entry, read_ushort, &sh_mv.mv_mach_LCD);
+	create_proc_read_entry("display-name", 0, root_entry, read_string, &sh_mv.mv_mach_LCD_name);
+#endif
+	return 0;
+}
+
+static void __exit
+exit_deviceinfo(void)
+{
+	printk("Unregistering /proc/deviceinfo filesystem ...\n");
+
+	remove_proc_entry("deviceinfo", NULL);
+}
+
+module_init (init_deviceinfo);
+module_exit (exit_deviceinfo);
+
+MODULE_AUTHOR ("A&D Co., Ltd");
+MODULE_DESCRIPTION ("/proc filesystem for device specific data.");
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_7751se.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_7751se.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_7751se.c	Thu Oct 11 13:47:27 2001
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_7751se.c	Tue Apr  1 18:15:19 2003
@@ -74,5 +74,10 @@
 	mv_rtc_settimeofday:	sh_rtc_settimeofday,
 
 	mv_hw_7751se:		1,
+
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_SE,
+	mv_mach_subtype:        MACH_SUBTYPE_7751SE,
+#endif
 };
 ALIAS_MV(7751se)
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_adx.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_adx.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_adx.c	Thu Oct 11 13:47:27 2001
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_adx.c	Wed Apr  2 19:37:14 2003
@@ -69,5 +69,10 @@
 	mv_rtc_settimeofday:	sh_rtc_settimeofday,
 
 	mv_hw_adx:		1,
+
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_ADX,
+	mv_mach_subtype:        MACH_SUBTYPE_UNKNOWN,
+#endif
 };
 ALIAS_MV(adx)
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_bigsur.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_bigsur.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_bigsur.c	Sat Jul 21 13:25:08 2001
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_bigsur.c	Tue Apr  1 18:15:19 2003
@@ -73,5 +73,9 @@
 	mv_rtc_gettimeofday:	sh_rtc_gettimeofday,
 	mv_rtc_settimeofday:	sh_rtc_settimeofday,
 
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_BIGSUR,
+	mv_mach_subtype:        MACH_SUBTYPE_UNKNOWN,
+#endif
 };
 ALIAS_MV(bigsur)
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_cat68701.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_cat68701.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_cat68701.c	Sat Jul 21 13:25:08 2001
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_cat68701.c	Tue Apr  1 18:15:19 2003
@@ -68,5 +68,9 @@
 	mv_rtc_gettimeofday:	sh_rtc_gettimeofday,
 	mv_rtc_settimeofday:	sh_rtc_settimeofday,
 
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_CAT68701,
+	mv_mach_subtype:        MACH_SUBTYPE_UNKNOWN,
+#endif
 };
 ALIAS_MV(cat68701)
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_dc.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_dc.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_dc.c	Thu Mar 27 14:31:32 2003
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_dc.c	Tue Apr  1 18:15:19 2003
@@ -69,5 +69,10 @@
 	mv_rtc_settimeofday:	aica_rtc_settimeofday,
 
 	mv_hw_dreamcast:	1,
+
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_DREAMCAST,
+	mv_mach_subtype:        MACH_SUBTYPE_UNKNOWN,
+#endif
 };
 ALIAS_MV(dreamcast)
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_dmida.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_dmida.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_dmida.c	Sat Jul 21 13:25:08 2001
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_dmida.c	Tue Apr  1 18:15:19 2003
@@ -68,6 +68,11 @@
 	mv_rtc_settimeofday:	sh_rtc_settimeofday,
 
 	mv_hw_hd64465:		1,
+
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_DMIDA,
+	mv_mach_subtype:        MACH_SUBTYPE_UNKNOWN,
+#endif
 };
 ALIAS_MV(dmida)
 
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_ec3104.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_ec3104.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_ec3104.c	Sat Jul 21 13:25:08 2001
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_ec3104.c	Tue Apr  1 18:15:19 2003
@@ -64,6 +64,11 @@
 
 	mv_rtc_gettimeofday:	sh_rtc_gettimeofday,
 	mv_rtc_settimeofday:	sh_rtc_settimeofday,
+
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_EC3104,
+	mv_mach_subtype:        MACH_SUBTYPE_UNKNOWN,
+#endif
 };
 
 ALIAS_MV(ec3104)
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_hp600.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_hp600.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_hp600.c	Thu Oct 11 13:47:27 2001
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_hp600.c	Tue Apr  1 18:15:19 2003
@@ -64,6 +64,11 @@
 	mv_hw_hp600:		1,
 	mv_hw_hp620:		1,
 	mv_hw_hd64461:		1,
+
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_HP6xx,
+	mv_mach_subtype:        MACH_SUBTYPE_HP620,
+#endif
 };
 ALIAS_MV(hp620)
 
@@ -109,6 +114,11 @@
 	mv_hw_hp600:		1,
 	mv_hw_hp680:		1,
 	mv_hw_hd64461:		1,
+
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_HP6xx,
+	mv_mach_subtype:        MACH_SUBTYPE_HP680,
+#endif
 };
 ALIAS_MV(hp680)
 
@@ -154,5 +164,10 @@
 	mv_hw_hp600:		1,
 	mv_hw_hp690:		1,
 	mv_hw_hd64461:		1,
+
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_HP6xx,
+	mv_mach_subtype:        MACH_SUBTYPE_HP690,
+#endif
 };
 ALIAS_MV(hp690)
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_se.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_se.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_se.c	Sat Jul 21 13:25:08 2001
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_se.c	Tue Apr  1 18:15:19 2003
@@ -80,5 +80,10 @@
 	mv_rtc_settimeofday:	sh_rtc_settimeofday,
 
 	mv_hw_se:		1,
+
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_SE,
+	mv_mach_subtype:        MACH_SUBTYPE_SE,
+#endif
 };
 ALIAS_MV(se)
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_unknown.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_unknown.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/mach_unknown.c	Sat Jul 21 13:25:08 2001
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/mach_unknown.c	Tue Apr  1 18:15:19 2003
@@ -68,5 +68,10 @@
 
 	mv_rtc_gettimeofday:	sh_rtc_gettimeofday,
 	mv_rtc_settimeofday:	sh_rtc_settimeofday,
+
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_UNKNOWN,
+	mv_mach_subtype:        MACH_SUBTYPE_UNKNOWN,
+#endif
 };
 ALIAS_MV(unknown)
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/setup_adx.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/setup_adx.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/setup_adx.c	Thu Oct 11 13:47:27 2001
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/setup_adx.c	Wed Apr  2 19:43:37 2003
@@ -1,7 +1,7 @@
 /* 
  * linux/arch/sh/kernel/setup_adx.c
  *
- * Copyright (C) 2001 A&D Co., Ltd.
+ * Copyright (C) 2001-2003 A&D Co., Ltd.
  *
  * I/O routine and setup routines for A&D ADX Board
  *
@@ -15,11 +15,63 @@
 #include <asm/machvec.h>
 #include <asm/irq.h>
 #include <linux/module.h>
+#include <linux/string.h>
+
+#define ADX_IRQMASK_REG				0xa6000008
+
+#define ADX_STATUS_REG				0xa6000006
+#define ADX_STATUS_ID_MASK			0x0007
+#define ADX_STATUS_COM_MASK			0x0010
+#define ADX_STATUS_ETH_MASK			0x0020
+#define ADX_STATUS_FRR				0x0040
+#define ADX_STATUS_CFR				0x0080
+
+#define ADX_MACH_ID_MAGIC_PHASE1		0x06
+#define ADX_MACH_ID_MAGIC_PHASE2		0x05
+#define ADX_MACH_ID_MAGIC_PHASE3_OR_LATER	0x00
+
+#define MACH_ADX_LCD_UNKNOWN			0
+#define MACH_ADX_LCD_PHASE1			1
+#define MACH_ADX_LCD_PHASE2			2
+#define MACH_ADX_LCD_PHASE3			3
+
+static const char* adx_lcd_names[] = {
+	"UNKNOWN",
+	"Phase-1 : Epson s1d13706 & OPTREX 320x240x8 Mono STN",
+	"Phase-2 : Epson s1d13806 & NEC 320x240x8 Color TFT",
+	"Phase-3 : Epson s1d13706 & Kyocera 320x240x8 Color STN",
+};
 
 void setup_adx(void)
 {
-	/* nothing to do just yet */
-/*	printk("setup_adx()\n");*/
+#if defined(CONFIG_DEVICEINFO)
+	/*
+	 * Setup machine vector
+	 */
+	/* Machine type and subtype */
+	switch (readw(ADX_STATUS_REG) & ADX_STATUS_ID_MASK) {
+	case ADX_MACH_ID_MAGIC_PHASE1:
+		sh_mv.mv_mach_subtype = MACH_SUBTYPE_ADX_PHASE1;
+		sh_mv.mv_mach_LCD = MACH_ADX_LCD_PHASE1;
+		break;
+	case ADX_MACH_ID_MAGIC_PHASE2:
+		sh_mv.mv_mach_subtype = MACH_SUBTYPE_ADX_PHASE2;
+		sh_mv.mv_mach_LCD = MACH_ADX_LCD_PHASE2;
+		break;
+	case ADX_MACH_ID_MAGIC_PHASE3_OR_LATER:
+		sh_mv.mv_mach_subtype = MACH_SUBTYPE_ADX_PHASE3;
+		sh_mv.mv_mach_LCD = MACH_ADX_LCD_PHASE3;
+		break;
+	default:
+		sh_mv.mv_mach_subtype = MACH_SUBTYPE_UNKNOWN;
+		sh_mv.mv_mach_LCD = MACH_ADX_LCD_UNKNOWN;
+		break;
+	}
+	strcpy(sh_mv.mv_mach_LCD_name, adx_lcd_names[sh_mv.mv_mach_LCD]);
+
+	printk("ADX Machine Type Detected...mach_subtype=%d, mach_LCD=%d\n",
+		sh_mv.mv_mach_subtype, sh_mv.mv_mach_LCD);
+#endif
 }
 
 void init_adx_IRQ(void)
@@ -28,7 +80,7 @@
 
 /*	printk("init_adx_IRQ()\n");*/
 	/* setup irq_mask_register */
-	irq_mask_register = (unsigned short *)0xa6000008;
+	irq_mask_register = (unsigned short *)ADX_IRQMASK_REG;
 
 	/* cover all external interrupt area by maskreg_irq_type
 	 * (Actually, irq15 doesn't exist)
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/setup_cqreek.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/setup_cqreek.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/setup_cqreek.c	Thu Mar 27 14:32:48 2003
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/setup_cqreek.c	Tue Apr  1 18:15:19 2003
@@ -248,5 +248,10 @@
 
 	mv_rtc_gettimeofday:	sh_rtc_gettimeofday,
 	mv_rtc_settimeofday:	sh_rtc_settimeofday,
+
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_CQREEK,
+	mv_mach_subtype:        MACH_SUBTYPE_UNKNOWN,
+#endif
 };
 ALIAS_MV(cqreek)
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/setup_sh2000.c linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/setup_sh2000.c
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/arch/sh/kernel/setup_sh2000.c	Sat Jul 21 13:25:08 2001
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/arch/sh/kernel/setup_sh2000.c	Tue Apr  1 18:15:19 2003
@@ -91,5 +91,10 @@
 	mv_rtc_settimeofday:	sh_rtc_settimeofday,
 
 	mv_hw_sh2000:		1,
+
+#if defined(CONFIG_DEVICEINFO)
+	mv_mach_type:           MACH_TYPE_SH2000,
+	mv_mach_subtype:        MACH_SUBTYPE_UNKNOWN,
+#endif
 };
 ALIAS_MV(sh2000)
diff -ruN -X /root/dontdiff linux-sh-2.4.18cvs-se-mc-sm-rtl/include/asm-sh/machvec.h linux-sh-2.4.18cvs-se-mc-sm-rtl-di/include/asm-sh/machvec.h
--- linux-sh-2.4.18cvs-se-mc-sm-rtl/include/asm-sh/machvec.h	Thu Apr 17 20:26:53 2003
+++ linux-sh-2.4.18cvs-se-mc-sm-rtl-di/include/asm-sh/machvec.h	Wed Apr  2 19:36:49 2003
@@ -15,9 +15,11 @@
 
 struct timeval;
 
+#define MV_NAME_SIZE 32
+
 struct sh_machine_vector
 {
-	const char *mv_name;
+	const char mv_name[MV_NAME_SIZE];
 
 	int mv_nr_irqs;
 
@@ -78,6 +80,16 @@
 	unsigned int mv_hw_bigsur : 1;
 	unsigned int mv_hw_7751se: 1;
 	unsigned int mv_hw_adx : 1;
+
+#if defined(CONFIG_DEVICEINFO)
+	unsigned short mv_mach_type;
+	unsigned short mv_mach_subtype;
+#if defined(CONFIG_SH_ADX)
+#define MV_LCD_NAME_SIZE 256
+	unsigned short mv_mach_LCD;
+	const char mv_mach_LCD_name[MV_LCD_NAME_SIZE];
+#endif
+#endif
 };
 
 extern struct sh_machine_vector sh_mv;
@@ -163,5 +175,35 @@
 #  define MACH_ADX		0
 # endif
 #endif
+
+// mv_mach_type
+#define MACH_TYPE_UNKNOWN	0
+#define MACH_TYPE_SE		1
+#define MACH_TYPE_HP6xx		2
+#define MACH_TYPE_SH2000	3
+#define MACH_TYPE_EC3104	4
+#define MACH_TYPE_DREAMCAST	5
+#define MACH_TYPE_BIGSUR	6
+#define MACH_TYPE_ADX		7
+#define MACH_TYPE_CAT68701	8
+#define MACH_TYPE_DMIDA		9
+#define MACH_TYPE_CQREEK	10
+
+// mv_mach_subtype
+#define MACH_SUBTYPE_UNKNOWN	0
+
+// mv_mach_subtype - SE
+#define MACH_SUBTYPE_SE		1
+#define MACH_SUBTYPE_7751SE	2
+
+// mv_mach_subtype - HP6x0
+#define MACH_SUBTYPE_HP620	1
+#define MACH_SUBTYPE_HP680	2
+#define MACH_SUBTYPE_HP690	3
+
+// mv_mach_subtype - ADX
+#define MACH_SUBTYPE_ADX_PHASE1	1
+#define MACH_SUBTYPE_ADX_PHASE2	2
+#define MACH_SUBTYPE_ADX_PHASE3	3
 
 #endif /* _ASM_SH_MACHVEC_H */

-----

=================================
Masahiro ABE, A&D Co., Ltd. Japan

[linuxsh-dev] [PATCH] fix __flush_cache_4096

[SUGIOKA T. <su...@it...>]

I'll commit following fix soon.

	* arch/sh/mm/clear_page.S (__flush_cache_4096): Don't change associated data that is to be flushed.

Index: arch/sh/mm/clear_page.S
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/clear_page.S,v
retrieving revision 1.1.1.1.2.6
diff -u -r1.1.1.1.2.6 clear_page.S
--- arch/sh/mm/clear_page.S     22 Aug 2002 17:48:09 -0000      1.1.1.1.2.6
+++ arch/sh/mm/clear_page.S     17 Apr 2003 02:03:47 -0000
@@ -208,13 +208,9 @@
 2:
        .rept   32
        mov.l   r5,@r0
-       add     #32,r5
        mov.l   r5,@(32,r0)
-       add     #32,r5
        mov.l   r5,@(r0,r6)
-       add     #32,r5
        mov.l   r5,@(r0,r7)
-       add     #32,r5
        add     r2,r0
        .endr
        nop

----
SUGIOKA Toshinobu

[linuxsh-dev] root over NFS, what about swap

[Adrian M. <ad...@mc...>]

Can anyone tell me how I might run a swap partition when I am using root on 
NFS (on a Dreamcast with 2.4.20).

Thanks,

Adrian

[linuxsh-dev] RE: [linux-sh:02691] Re: Use of e_flags field in ELF header

[Thomas,Stephen <ste...@su...>]

Hi Daniel,

Thanks for your reply. What you suggest does appear to work, but I had =
to do:

gdb -c core
file prog

Using 'gdb -e prog -c core' (as suggested in the man page) doesn't work, =
the file prog just gets ignored.

But I think the core file ought to be correct if possible. Getting gdb =
to generate the correct e_flags proved to be easy - they can be set in =
the elf_backend_final_write_processing routine in the appropriate =
elf<arch>.c. The kernel mod is also easy, it just means modifying =
generic code.

Thanks,

Steve Thomas
SuperH (UK) Ltd.

-----Original Message-----
From: Daniel Jacobowitz [mailto:dr...@fa...]=20
Sent: 14 April 2003 15:21
To: kaz Kojima
Cc: Thomas,Stephen; McGoogan,Sean; =
lin...@li...; lin...@m1...; =
lin...@li...
Subject: Re: [linux-sh:02691] Re: Use of e_flags field in ELF header


On Mon, Apr 14, 2003 at 11:12:47PM +0900, kaz Kojima wrote:
> Hi,
>=20
> "Thomas,Stephen" <ste...@su...> wrote:
> >Apparently, the e_flags field of the ELF Header structure in ELF=20
> >files is used by SH architectures to indicate the CPU type. The lower =

> >5 bits  have the following meaning:
> >
> >     0  =3D unknown CPU type
> >     1  =3D SH1
> >     2  =3D SH2
> >     3  =3D SH3
> >     5  =3D SH3 with DSP
> >     8  =3D SH3E
> >     9  =3D SH4
> >    10  =3D SH5
> >
> >The e_flags field is designed to hold architecture specific info, but =

> >other architectures don't appear to use it in quite the same way,=20
> >i.e. to indicate different CPU types.
> >
> >Does anybody know why SH uses e_flags in this way?
>=20
> I don't know why SH does so, but MIPS uses the upper 4 bits of e_flags =

> to encode ISA. Perhaps there might be another examples.
>=20
> >The problem I have is in generating & interpreting core files. When=20
> >the kernel (V2.4)generates an ELF core dump, it just sets e_flags to=20
> >0 (hard coded constant) & dumps it. So to get it to generate a valid=20
> >SH5 core dump, I need to modify generic code. There are similar=20
> >problems with the gdb 'gcore' command.
>=20
> Your modification seems the right thing to do.

Why is this an issue?  If the core dump is marked "unknown", then the =
ISA should be taken from the executable during a GDB session, and it =
should do the right thing.


--=20
Daniel Jacobowitz
MontaVista Software                         Debian GNU/Linux Developer

[linuxsh-dev] Re: [linux-sh:02691] Re: Use of e_flags field in ELF header

[Daniel J. <dr...@fa...>]

On Mon, Apr 14, 2003 at 11:12:47PM +0900, kaz Kojima wrote:
> Hi,
> 
> "Thomas,Stephen" <ste...@su...> wrote:
> >Apparently, the e_flags field of the ELF Header structure in ELF files
> >is used by SH architectures to indicate the CPU type. The lower 5 bits
> > have the following meaning:
> >
> >     0  = unknown CPU type
> >     1  = SH1
> >     2  = SH2
> >     3  = SH3
> >     5  = SH3 with DSP
> >     8  = SH3E
> >     9  = SH4
> >    10  = SH5
> >
> >The e_flags field is designed to hold architecture specific info, but
> >other architectures don't appear to use it in quite the same way, i.e.
> >to indicate different CPU types.
> >
> >Does anybody know why SH uses e_flags in this way?
> 
> I don't know why SH does so, but MIPS uses the upper 4 bits of e_flags
> to encode ISA. Perhaps there might be another examples.
> 
> >The problem I have is in generating & interpreting core files. When
> >the kernel (V2.4)generates an ELF core dump, it just sets e_flags to 0
> >(hard coded constant) & dumps it. So to get it to generate a valid SH5
> >core dump, I need to modify generic code. There are similar problems
> >with the gdb 'gcore' command.
> 
> Your modification seems the right thing to do.

Why is this an issue?  If the core dump is marked "unknown", then the
ISA should be taken from the executable during a GDB session, and it
should do the right thing.


-- 
Daniel Jacobowitz
MontaVista Software                         Debian GNU/Linux Developer

[linuxsh-dev] Re: Use of e_flags field in ELF header

[kaz K. <kk...@rr...>]

Hi,

"Thomas,Stephen" <ste...@su...> wrote:
>Apparently, the e_flags field of the ELF Header structure in ELF files
>is used by SH architectures to indicate the CPU type. The lower 5 bits
> have the following meaning:
>
>     0  = unknown CPU type
>     1  = SH1
>     2  = SH2
>     3  = SH3
>     5  = SH3 with DSP
>     8  = SH3E
>     9  = SH4
>    10  = SH5
>
>The e_flags field is designed to hold architecture specific info, but
>other architectures don't appear to use it in quite the same way, i.e.
>to indicate different CPU types.
>
>Does anybody know why SH uses e_flags in this way?

I don't know why SH does so, but MIPS uses the upper 4 bits of e_flags
to encode ISA. Perhaps there might be another examples.

>The problem I have is in generating & interpreting core files. When
>the kernel (V2.4)generates an ELF core dump, it just sets e_flags to 0
>(hard coded constant) & dumps it. So to get it to generate a valid SH5
>core dump, I need to modify generic code. There are similar problems
>with the gdb 'gcore' command.

Your modification seems the right thing to do.

Regards,
	kaz

[linuxsh-dev] Use of e_flags field in ELF header

[Thomas,Stephen <ste...@su...>]

Apparently, the e_flags field of the ELF Header structure in ELF files =
is used by SH architectures to indicate the CPU type. The lower 5 bits =
have the following meaning:

     0  =3D unknown CPU type
     1  =3D SH1
     2  =3D SH2
     3  =3D SH3
     5  =3D SH3 with DSP
     8  =3D SH3E
     9  =3D SH4
    10  =3D SH5

The e_flags field is designed to hold architecture specific info, but =
other architectures don't appear to use it in quite the same way, i.e. =
to indicate different CPU types.

Does anybody know why SH uses e_flags in this way?

The problem I have is in generating & interpreting core files. When the =
kernel (V2.4)generates an ELF core dump, it just sets e_flags to 0 (hard =
coded constant) & dumps it. So to get it to generate a valid SH5 core =
dump, I need to modify generic code. There are similar problems with the =
gdb 'gcore' command.

Steve Thomas
SuperH (UK) Ltd

Re: [linuxsh-dev] Re: memcpy/TLBMiss patch assembled for 2.4.18cvs

[Masahiro A. <m-...@aa...>]

On Wed, 29 Jan 2003 11:35:32 +0900
Masahiro Abe <m-...@aa...> wrote:

> I still haven't being able to make TLB-Miss handling speed-up part work on
> my SolutionEngine.
> I must do something else right now so my investigation pends now. I
> really appreciate if anyone can help on this. If anyone can give more
> info/suggestion/patch, I'll try that.

Since then, Stuart let me see his entire source tree, and some missing
parts are found.  Now it seems to be working with those changes.

Also, SUGIOKA-san generously gave me his version of modification. I also
tried that and it seems to be working fine.

I'm not sure which is better, so I've assembled two version of patches
for TLB Miss speede-up and put in:
<ftp://ftp.aandd.co.jp/pub/linuxsh/work/20030308/>

There are 5 patches there.

1. diff-2.4.18-cvs.diff.bz2 is to apply changes to stock 2.4.18 kernel,
and make it same as the "linux-2_4_18" tagged cvs source.

2. diff-2.4.18cvs-se.diff.bz2 is to apply to the "linux-2_4_18" tagged
cvs source, and make it boot from CompactFlash on SolutionEngine 7750S.
This is not needed for other platforms.

3. diff-2.4.18cvs-memcpy-20030308-1.diff.bz2 is to apply to the
"linux-2_4_18" tagged cvs source, and includes Stuart's "memcpy speed-up"
(with fixes that discussed later on the list)

For "TLB Miss Handling optimization", there are two types:

4. diff-2.4.18cvs-tlb-sm-20030308-1.diff.bz2 includes Mr. Stuart
Menefy's original patch plus some missing parts.

5. diff-2.4.18cvs-tlb-ts-20030308-1.diff.bz2 includes Mr. Toshinobu
Sugioka's modified patch.

I hope these files be tried by many of you and grows to good shape. It
will be good if 4 and 5 be merged to be a definitive implementation for
TLB Miss handling speed-up.
(I can't do that by myself, because I don't understand the exact detail
of those patches. At least for now.)

---
By the way, I've also assembled patches to make RTLinux-3.2-pre1 work
with above kernels. Those are put in:
<ftp://ftp.aandd.co.jp/pub/linuxsh/rtlinux/work/20030327/>
These are not "Real-TIme" yet, though. Timer latency still gets to
~500usec with heavy disk access.

=================================
Masahiro ABE, A&D Co., Ltd. Japan

Re: [linuxsh-dev] SH775xR patch

[Paul M. <le...@li...>]

On Thu, 2003-03-27 at 07:37, DOYU,Hiroshi wrote:
> I attached the SH775xR patch for 2.4.20 kernel and ipl+g. It works well
> on SolutionEngine 775[0-1]R. 
> 
> If you have any comments, please let me know.
> 
This is a bit of a surprise, I wasn't aware anyone even monitored the
other branches.

First off, thanks for taking care of the clear_page.S changes, I had
been putting those off for awhile due to lack of hardware to test on.
Presuming everything else still works, I'll merge this back into the 2.5
code.

Secondly, in this hunk:

> diff -Naur -X dontdiff linux-2_4_20.ORG/include/asm-sh/bugs.h
linux-2_4_20/include/asm-sh/bugs.h
> --- linux-2_4_20.ORG/include/asm-sh/bugs.h	2003-03-24
10:42:45.000000000 +0900
> +++ linux-2_4_20/include/asm-sh/bugs.h	2003-03-25 19:52:13.000000000
+0900
> @@ -13,11 +13,16 @@
>   */
>  
>  #include <asm/processor.h>
> +#include <asm/pci-sh7751.h>
>  
>  static void __init check_bugs(void)
>  {
>  	extern unsigned long loops_per_jiffy;
>  	char *p= &system_utsname.machine[2]; /* "sh" */
> +	unsigned int id_51, id_51r;
> +
> +	id_51 = (SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID;
> +	id_51r = (SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID;
>  
>  	cpu_data->loops_per_jiffy = loops_per_jiffy;
>  	

What's the point of this change? We already take care of 7751/7751R
probing in detect_cpu_and_cache_system().

The only downfall of the new probing code so far is that it leaves the
ST40 in a broken state. I made a note about this awhile ago, but nothing
has been done to fix that up yet. Stuart?

In addition to this, the new cache handling code has the side effect of
bloating sh_cpuinfo on things like the sh2 and the sh3, which don't have
a split I/D distinction. Though, I suppose this can be ifdef'ed around,
or shoved in a union, or something equally ugly in the interest of
saving space. For sh4 and sh5 however, things are fine.

Regards,

-- 
Paul Mundt <le...@li...>

[linuxsh-dev] SH775xR patch

[DOYU,Hiroshi <Hir...@mo...>]

Hi all,

I attached the SH775xR patch for 2.4.20 kernel and ipl+g. It works well
on SolutionEngine 775[0-1]R. 

If you have any comments, please let me know.

Thanks,
-doyu

[linuxsh-dev] tlb patch for 2.5.13

[peter g. <pga...@li...>]

This patch applies Stuart Menefy's patch to 2.5.13. I have done it in a mostly parrot-like fashion, so be warned. It doesnt seem to make my setup crash.
---------------------------------------------------------------------------------------------------
diff -ruN linuxsh-2.5.13.notlb/arch/sh/kernel/entry.S linuxsh-2.5.13/arch/sh/kernel/entry.S
--- linuxsh-2.5.13.notlb/arch/sh/kernel/entry.S	Fri Mar 21 09:33:09 2003
+++ linuxsh-2.5.13/arch/sh/kernel/entry.S	Fri Mar 21 18:26:28 2003
@@ -9,10 +9,14 @@
  * for more details.
  *
  */
+#define NEW_TLB
 
 #include <linux/sys.h>
 #include <linux/linkage.h>
 #include <linux/config.h>
+#include <asm/mmu_context.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
 #include <asm/thread_info.h>
 
 #if !defined(CONFIG_NFSD) && !defined(CONFIG_NFSD_MODULE)
@@ -66,12 +70,10 @@
 #else
 INTEVT  = 0xffffffd8
 #endif
-MMU_TEA = 0xfffffffc		! TLB Exception Address Register
 #elif defined(__SH4__)
 TRA     = 0xff000020
 EXPEVT  = 0xff000024
 INTEVT  = 0xff000028
-MMU_TEA = 0xff00000c		! TLB Exception Address Register
 #endif
 
 /* Offsets to the stack */
@@ -159,6 +161,14 @@
 	 mov	#1, r5
 
 call_dpf:
+#ifdef NEW_TLB
+	mov.l   1f, r0
+	mov.l   @r0, r6 !address
+	mov.l	3f,r0
+	STI()
+	jmp @r0
+	mov r15, r4     !regs
+#else
 	mov.l	1f, r0
 	mov	r5, r8
 	mov.l	@r0, r6
@@ -179,10 +189,14 @@
 	mov	r8, r5
 	jmp	@r0
 	 mov	r15, r4
+#endif
+
 
 	.align 2
 1:	.long	MMU_TEA
+#ifndef NEW_TLB
 2:	.long	__do_page_fault
+#endif
 3:	.long	do_page_fault
 
 	.align	2
@@ -534,9 +548,130 @@
 2:	.long	ret_from_exception
 !
 !
+
+/* This code makes some assumptions to improve performance.
+ * Make sure they are stil true. */
+#if PTRS_PER_PGD != PTRS_PER_PTE
+#error PDG and PTE sizes don't match
+#endif
+#if PTRS_PER_PMD != 1
+#error PMD is not folded int pgd
+#endif
+
+/* gas doesn't flag impossible values for mov #immediate as an error */
+#if (_PAGE_PRESENT >> 2) > 0x7f
+#error cannot load PAGE_PRESENT as an immediate
+#endif
+	
 	.balign 	1024,0,1024
 tlb_miss:
-	mov.l	1f, k2
+
+#ifdef NEW_TLB
+	! Increment the counts
+#ifdef COUNT_EXCEPTIONS
+	mov.l	9f, k1
+	mov.l	@k1, k2
+	add	#1, k2
+	mov.l	k2, @k1
+#endif
+
+	! k0 scratch
+	! k1 page table pointer
+	! k2 faulting address
+	! k3 pgd and pte index masks
+	! k4 shift
+
+#if defined(__SH4__)
+	mov.l	8f, k0		!  9 LS (latency=2)
+#else
+	mov	#MMU_PTEH, k0
+#endif
+
+	mov.l	4f, k3		!  9 LS (latency=2)	
+	mov	#-(PGDIR_SHIFT-2), k4	!  6 EX
+	
+	mov.l	@(MMU_TEA-MMU_PTEH,k0), k2		! 18 LS (latency=2)
+
+	cmp/pz	k2
+	mov.l	@(MMU_TTB-MMU_PTEH,k0), k1		! 18 LS (latency=2)	
+
+	bt	18f
+
+	mov.l	1f, k1
+18:	
+
+	
+	! Load up the pgd entry (k1)
+	mov	k2, k0		! 5 MT (latency=0)
+	shld	k4, k0		! 99 EX
+
+	and	k3, k0		! 78 EX
+
+	mov.l	@(k0, k1), k1	! 21 LS (latency=2)
+
+	
+	mov	#-(PAGE_SHIFT-2), k4	!  6 EX
+
+	tst	k1, k1		! 86 MT
+
+	bt	20f		! 110 BR
+
+	! Load up the pte entry (k1)
+	mov	k2, k0		! 5 MT (latency=0)
+	shld	k4, k0		! 99 EX
+
+	and	k3, k0		! 78 EX
+
+	mov.l	@(k0, k1), k1	! 21 LS
+	mov	#(_PAGE_PRESENT>>2), k4	!  6 EX
+
+	! Test the entry for none and present
+	tst	k1, k1		! 86 MT
+	shll2	k4		! 101 EX
+
+#if defined(__SH4__)
+	mov.l	8f, k0		!  9 LS (latency=2)
+#else
+	mov	#MMU_PTEH, k0
+#endif
+	bt	20f		! 110 BR
+
+	tst	k4, k1		! 68 MT
+	mov.l	7f, k3		!  9 LS (latency=2)
+
+	! stall for load
+	
+	and	k3, k1		! 78 EX
+	bt	20f		! 110 BR
+
+	! We could check for writes to non-writable pages,
+	! or writes to clean pages here...
+	! We could also make the page young...
+
+	! Set up the entry
+	! Should also be setting up MMU.PTEA here for SH4
+
+	mov.l	k1, @(MMU_PTEL-MMU_PTEH,k0)		! 27 LS
+	ldtlb			! 128 CO
+
+	! At least one instruction between ldtlb and rte
+	nop
+	
+	rte
+	 nop
+
+	.align 2
+#define SYMBOL_NAME(x) x
+1:	.long	SYMBOL_NAME(swapper_pg_dir)
+4:	.long	(PTRS_PER_PGD-1) << 2
+7:	.long	_PAGE_FLAGS_HARDWARE_MASK
+8:	.long	MMU_PTEH
+/*9:	.long	SYMBOL_NAME(exception_count_miss)*/
+
+
+#endif	
+	! Either pgd or pte not present
+20:	mov.l	1f, k2
 	mov.l	4f, k3
 	bra	handle_exception
 	 mov.l	@k2, k2
@@ -613,6 +748,15 @@
 	stc	k_ex_code, r8
 	shlr2	r8
 	shlr	r8
+
+#ifdef COUNT_EXCEPTIONS
+	mov.l	2f, r9
+	add	r8, r9
+	mov.l	@r9, r10
+	add	#1, r10
+	mov.l	r10, @r9
+#endif
+	
 	mov.l	4f, r9
 	add	r8, r9
 	mov.l	@r9, r9
diff -ruN linuxsh-2.5.13.notlb/arch/sh/mm/fault.c linuxsh-2.5.13/arch/sh/mm/fault.c
--- linuxsh-2.5.13.notlb/arch/sh/mm/fault.c	Fri Mar 21 17:07:53 2003
+++ linuxsh-2.5.13/arch/sh/mm/fault.c	Fri Mar 21 18:26:28 2003
@@ -99,6 +99,40 @@
 	tsk = current;
 	mm = tsk->mm;
 
+	if (address >= TASK_SIZE) {
+		/*
+		 * Synchronize this task's top level page-table
+		 * with the 'reference' page table.
+		 */
+		int offset = pgd_index(address);
+		pgd_t *pgd, *pgd_k;
+		pmd_t *pmd, *pmd_k;
+
+		if (!mm) {
+			panic("kernel fault with no valid mm\n");
+		}
+
+
+		pgd = mm->pgd + offset;
+		pgd_k = init_mm.pgd + offset;
+
+		/* This will never happen with the folded page table. */
+		if (!pgd_present(*pgd)) {
+			if (!pgd_present(*pgd_k))
+				goto bad_area_nosemaphore;
+			set_pgd(pgd, *pgd_k);
+			return;
+		}
+
+		pmd = pmd_offset(pgd, address);
+		pmd_k = pmd_offset(pgd_k, address);
+
+		if (pmd_present(*pmd) || !pmd_present(*pmd_k))
+			goto bad_area_nosemaphore;
+		set_pmd(pmd, *pmd_k);
+		return;
+	}
+
 	/*
 	 * If we're in an interrupt or have no user
 	 * context, we must not take the fault..
@@ -159,6 +193,7 @@
 bad_area:
 	up_read(&mm->mmap_sem);
 
+bad_area_nosemaphore:
 	if (user_mode(regs)) {
 		tsk->thread.address = address;
 		tsk->thread.error_code = writeaccess;
@@ -234,6 +269,7 @@
 		goto no_context;
 }
 
+#if 0
 /*
  * Called with interrupt disabled.
  */
@@ -282,6 +318,9 @@
 	update_mmu_cache(NULL, address, entry);
 	return 0;
 }
+#endif
+
+
 void update_mmu_cache(struct vm_area_struct * vma,
 		      unsigned long address, pte_t pte)
 {
@@ -293,9 +332,14 @@
 	unsigned long ptea;
 #endif
 
-	/* Ptrace may call this routine. */
-	if (vma && current->active_mm != vma->vm_mm)
-		return;
+	/* vma can be null when called for a P3 address from
+	 * copy_user_page */
+	if (vma) {
+		/* Ptrace may call this routine to access an address
+		 * in the process being debugged. */
+		if (current->active_mm != vma->vm_mm)
+			return;
+	}
 
 #if defined(__SH4__)
 	page = pte_page(pte);
@@ -313,7 +357,7 @@
 	ctrl_outl(vpn, MMU_PTEH);
 
 	pteval = pte_val(pte);
-#if defined(__SH4__)
+#if defined(__SH4__) && ! defined(CONFIG_CPU_SUBTYPE_ST40)
 	/* Set PTEA register */
 	/* TODO: make this look less hacky */
 	ptea = ((pteval >> 28) & 0xe) | (pteval & 0x1);
diff -ruN linuxsh-2.5.13.notlb/arch/sh/mm/init.c linuxsh-2.5.13/arch/sh/mm/init.c
--- linuxsh-2.5.13.notlb/arch/sh/mm/init.c	Fri Mar 21 09:33:09 2003
+++ linuxsh-2.5.13/arch/sh/mm/init.c	Fri Mar 21 18:26:28 2003
@@ -90,20 +90,19 @@
 
 /*
  * paging_init() sets up the page tables
- *
- * This routines also unmaps the page at virtual kernel address 0, so
- * that we can trap those pesky NULL-reference errors in the kernel.
  */
 void __init paging_init(void)
 {
 	int i;
 	pgd_t * pg_dir;
 
-	/* We don't need kernel mapping as hardware support that. */
+	/* We don't need to map the kernel through the TLB, as it is
+	 * permanatly mapped using P1. So clear the entire pgd (actually
+	 * the pmd, because we have a folded page table). */
 	pg_dir = swapper_pg_dir;
 
 	for (i=0; i < PTRS_PER_PGD; i++)
-		pgd_val(pg_dir[i]) = 0;
+		pmd_clear(pmd_offset(&pg_dir[i], 0));
 
 	/* Enable MMU */
 	ctrl_outl(MMU_CONTROL_INIT, MMUCR);
@@ -114,6 +113,9 @@
 	mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
 	set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK);
 
+	/* set up the initial value of the MMU.TTB */
+	activate_mm(NULL, &init_mm);
+
  	{
 		unsigned long zones_size[MAX_NR_ZONES] = {0, 0, 0};
 		unsigned long max_dma, low, start_pfn;
@@ -219,12 +221,16 @@
 
 pgd_t *pgd_alloc(struct mm_struct *mm)
 {
-	unsigned int pgd_size = (USER_PTRS_PER_PGD * sizeof(pgd_t));
+	unsigned int pgd_size = (PTRS_PER_PGD * sizeof(pgd_t));
 	pgd_t *pgd = (pgd_t *)kmalloc(pgd_size, GFP_KERNEL);
 
-	if (pgd)
-		memset(pgd, 0, pgd_size);
 
+	if (pgd) {
+		memset(pgd, 0, USER_PTRS_PER_PGD * sizeof(pgd_t));
+		memcpy(pgd + USER_PTRS_PER_PGD,
+		       swapper_pg_dir + USER_PTRS_PER_PGD,
+		       PTRS_PER_PGD - USER_PTRS_PER_PGD);
+	}
 	return pgd;
 }
 
diff -ruN linuxsh-2.5.13.notlb/include/asm-sh/mmu_context.h linuxsh-2.5.13/include/asm-sh/mmu_context.h
--- linuxsh-2.5.13.notlb/include/asm-sh/mmu_context.h	Fri Mar 21 09:33:09 2003
+++ linuxsh-2.5.13/include/asm-sh/mmu_context.h	Fri Mar 21 18:26:28 2003
@@ -14,6 +14,8 @@
  *    (b) ASID (Address Space IDentifier)
  */
 
+#ifndef __ASSEMBLY__
+
 /*
  * Cache of MMU context last used.
  */
@@ -84,6 +86,8 @@
 	/* Do nothing */
 }
 
+#endif /* __ASSEMBLY */
+
 /* Other MMU related constants. */
 
 #if defined(__sh3__)
@@ -127,6 +131,8 @@
 #define MMU_ITLB_VALID		0x100
 #endif
 
+#ifndef __ASSEMBLY__
+
 static __inline__ void set_asid(unsigned long asid)
 {
 	unsigned long __dummy;
@@ -161,8 +167,8 @@
 	set_asid(mm->context & MMU_CONTEXT_ASID_MASK);
 }
 
-/* MMU_TTB can be used for optimizing the fault handling.
-   (Currently not used) */
+/* MMU.TTB is used for optimizing the fault handling.
+ * It always points to the base of the current pgd. */
 static __inline__ void switch_mm(struct mm_struct *prev,
 				 struct mm_struct *next,
 				 struct task_struct *tsk, unsigned int cpu)
@@ -184,5 +190,7 @@
 enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk, unsigned cpu)
 {
 }
+
+#endif /* __ASSEMBLY__ */
 
 #endif /* __ASM_SH_MMU_CONTEXT_H */
diff -ruN linuxsh-2.5.13.notlb/include/asm-sh/pgalloc.h linuxsh-2.5.13/include/asm-sh/pgalloc.h
--- linuxsh-2.5.13.notlb/include/asm-sh/pgalloc.h	Fri Mar 21 09:33:09 2003
+++ linuxsh-2.5.13/include/asm-sh/pgalloc.h	Mon Mar 24 08:58:30 2003
@@ -11,12 +11,12 @@
 #define pgtable_cache_size 0L
 
 #define pmd_populate_kernel(mm, pmd, pte) \
-		set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)))
+		set_pmd(pmd, __pmd(pte))
 
 static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
 				struct page *pte)
 {
-	set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte)));
+	set_pmd(pmd, __pmd( page_address(pte)));
 }
 
 /*
diff -ruN linuxsh-2.5.13.notlb/include/asm-sh/pgtable.h linuxsh-2.5.13/include/asm-sh/pgtable.h
--- linuxsh-2.5.13.notlb/include/asm-sh/pgtable.h	Fri Mar 21 09:33:09 2003
+++ linuxsh-2.5.13/include/asm-sh/pgtable.h	Mon Mar 24 08:57:59 2003
@@ -43,7 +43,6 @@
 
 #define PTE_PHYS_MASK	0x1ffff000
 
-#ifndef __ASSEMBLY__
 /*
  * First 1MB map is used by fixed purpose.
  * Currently only 4-enty (16kB) is used (see arch/sh/mm/cache.c)
@@ -95,8 +94,8 @@
 
 #define _PAGE_SHARED	_PAGE_U0_SHARED
 
-#define _PAGE_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | _PAGE_ACCESSED | _PAGE_DIRTY)
-#define _KERNPG_TABLE	(_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
+#ifndef __ASSEMBLY__
+
 #define _PAGE_CHG_MASK	(PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY | _PAGE_SHARED)
 
 #define PAGE_NONE	__pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE |_PAGE_ACCESSED | _PAGE_FLAGS_HARD)
@@ -137,9 +136,11 @@
 #define pte_clear(xp)	do { set_pte(xp, __pte(0)); } while (0)
 
 #define pmd_none(x)	(!pmd_val(x))
-#define pmd_present(x)	(pmd_val(x) & _PAGE_PRESENT)
+#define pmd_present(x)	(pmd_val(x))
 #define pmd_clear(xp)	do { set_pmd(xp, __pmd(0)); } while (0)
-#define	pmd_bad(x)	((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE)
+
+#define	pmd_bad(x)	((pmd_page_kernel(x) > (unsigned long) high_memory) || \
+			 (pmd_page_kernel(x) < PAGE_OFFSET))
 
 #define pages_to_mb(x)	((x) >> (20-PAGE_SHIFT))
 #define pte_page(x) 	phys_to_page(pte_val(x)&PTE_PHYS_MASK)
@@ -202,11 +203,9 @@
 
 #define page_pte(page) page_pte_prot(page, __pgprot(0))
 
-#define pmd_page_kernel(pmd) \
-((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
+#define pmd_page_kernel(pmd) pmd_val(pmd)
 
-#define pmd_page(pmd) \
-	(phys_to_page(pmd_val(pmd)))
+#define pmd_page(pmd) (virt_to_page(pmd_val(pmd)))
 
 /* to find an entry in a page-table-directory. */
 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
diff -ruN linuxsh-2.5.13.notlb/include/asm-sh/tlbflush.h linuxsh-2.5.13/include/asm-sh/tlbflush.h
--- linuxsh-2.5.13.notlb/include/asm-sh/tlbflush.h	Fri Apr 12 14:26:29 2002
+++ linuxsh-2.5.13/include/asm-sh/tlbflush.h	Fri Mar 21 18:26:28 2003
@@ -1,6 +1,6 @@
 #ifndef __ASM_SH_TLBFLUSH_H
 #define __ASM_SH_TLBFLUSH_H
-
+#ifndef __ASSEMBLY__
 /*
  * TLB flushing:
  *
@@ -28,4 +28,5 @@
 
 extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
 
+#endif /* __ASSEMBLY__ */
 #endif /* __ASM_SH_TLBFLUSH_H */
-------------------------------------------------------------------------------------------------
-- 
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[linuxsh-dev] [patch] ubc_set_tracing fix

[kaz K. <kk...@rr...>]

Hi,

I've committed the appended patch by Daniel Jacobowitz and its
2.4-branch version to fix GDB problem.

Regards,
	kaz
--
Index: ChangeLog
===================================================================
RCS file: /cvsroot/linuxsh/linux/ChangeLog,v
retrieving revision 1.128
diff -u -3 -p -r1.128 ChangeLog
--- ChangeLog	23 Mar 2003 15:27:58 -0000	1.128
+++ ChangeLog	24 Mar 2003 03:03:13 -0000
@@ -1,3 +1,9 @@
+2003-03-24  Daniel Jacobowitz  <dr...@fa...>
+	    Kaz Kojima  <kk...@rr...>
+
+	* arch/sh/kernel/ptrace.c (ubc_set_tracing): Break before executing
+	instruction.
+
 2003-03-24  SUGIOKA Toshinobu <su...@it...>
 
 	* arch/sh/kernel/entry.S: Call sys_pread_wrapper/sys_pwrite_wrapper
Index: arch/sh/kernel/ptrace.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/ptrace.c,v
retrieving revision 1.6
diff -u -3 -p -r1.6 ptrace.c
--- arch/sh/kernel/ptrace.c	29 Jan 2003 03:14:17 -0000	1.6
+++ arch/sh/kernel/ptrace.c	24 Mar 2003 03:03:15 -0000
@@ -123,10 +123,10 @@ ubc_set_tracing(int asid, unsigned long 
 	ctrl_outl(nextpc1, UBC_BARA);
 	ctrl_outb(asid, UBC_BASRA);
 	if(UBC_TYPE_SH7729){
-		ctrl_outl(0x0fff, UBC_BAMRA);
+		ctrl_outl(0, UBC_BAMRA);
 		ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA);
 	}else{
-		ctrl_outb(BAMR_12, UBC_BAMRA);
+		ctrl_outb(0, UBC_BAMRA);
 		ctrl_outw(BBR_INST | BBR_READ, UBC_BBRA);
 	}
 
@@ -134,17 +134,17 @@ ubc_set_tracing(int asid, unsigned long 
 		ctrl_outl(nextpc2, UBC_BARB);
 		ctrl_outb(asid, UBC_BASRB);
 		if(UBC_TYPE_SH7729){
-			ctrl_outl(0x0fff, UBC_BAMRB);
+			ctrl_outl(0, UBC_BAMRB);
 			ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRB);
 		}else{
-			ctrl_outb(BAMR_12, UBC_BAMRB);
+			ctrl_outb(0, UBC_BAMRB);
 			ctrl_outw(BBR_INST | BBR_READ, UBC_BBRB);
 		}
 	}
 	if(UBC_TYPE_SH7729)
-		ctrl_outl(BRCR_PCBA | BRCR_PCBB | BRCR_PCTE, UBC_BRCR);
+		ctrl_outl(BRCR_PCTE, UBC_BRCR);
 	else
-		ctrl_outw(BRCR_PCBA | BRCR_PCBB, UBC_BRCR);
+		ctrl_outw(0, UBC_BRCR);
 }
 
 /*
Index: ChangeLog
===================================================================
RCS file: /cvsroot/linuxsh/linux/ChangeLog,v
retrieving revision 1.1.1.1.2.59
diff -u -3 -p -r1.1.1.1.2.59 ChangeLog
--- ChangeLog	23 Mar 2003 15:30:58 -0000	1.1.1.1.2.59
+++ ChangeLog	24 Mar 2003 03:05:25 -0000
@@ -1,3 +1,9 @@
+2003-03-24  Daniel Jacobowitz  <dr...@fa...>
+	    Kaz Kojima  <kk...@rr...>
+
+	* arch/sh/kernel/process.c (ubc_set_tracing): Break before executing
+	instruction.
+
 2003-03-24  SUGIOKA Toshinobu <su...@it...>
 
 	* arch/sh/mm/copy_page.S (__copy_user): Add missing exception handling
Index: arch/sh/kernel/process.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/process.c,v
retrieving revision 1.1.1.1.2.2
diff -u -3 -p -r1.1.1.1.2.2 process.c
--- arch/sh/kernel/process.c	12 Nov 2002 02:24:19 -0000	1.1.1.1.2.2
+++ arch/sh/kernel/process.c	24 Mar 2003 03:05:27 -0000
@@ -256,10 +256,10 @@ ubc_set_tracing(int asid, unsigned long 
 	ctrl_outl(nextpc1, UBC_BARA);
 	ctrl_outb(asid, UBC_BASRA);
 	if(UBC_TYPE_SH7729){
-		ctrl_outl(0x0fff, UBC_BAMRA);
+		ctrl_outl(0, UBC_BAMRA);
 		ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA);
 	}else{
-		ctrl_outb(BAMR_12, UBC_BAMRA);
+		ctrl_outb(0, UBC_BAMRA);
 		ctrl_outw(BBR_INST | BBR_READ, UBC_BBRA);
 	}
 
@@ -267,17 +267,17 @@ ubc_set_tracing(int asid, unsigned long 
 		ctrl_outl(nextpc2, UBC_BARB);
 		ctrl_outb(asid, UBC_BASRB);
 		if(UBC_TYPE_SH7729){
-			ctrl_outl(0x0fff, UBC_BAMRB);
+			ctrl_outl(0, UBC_BAMRB);
 			ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRB);
 		}else{
-			ctrl_outb(BAMR_12, UBC_BAMRB);
+			ctrl_outb(0, UBC_BAMRB);
 			ctrl_outw(BBR_INST | BBR_READ, UBC_BBRB);
 		}
 	}
 	if(UBC_TYPE_SH7729)
-		ctrl_outl(BRCR_PCBA | BRCR_PCBB | BRCR_PCTE, UBC_BRCR);
+		ctrl_outl(BRCR_PCTE, UBC_BRCR);
 	else
-		ctrl_outw(BRCR_PCBA | BRCR_PCBB, UBC_BRCR);
+		ctrl_outw(0, UBC_BRCR);
 }
 
 /*

[linuxsh-dev] [patch] __copy_user fix

[SUGIOKA T. <su...@it...>]

Hi,

I'll commit this fix soon.

	* arch/sh/mm/copy_page.S (__copy_user): Add missing exception handling point.

Index: arch/sh/mm/copy_page.S
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/copy_page.S,v
retrieving revision 1.1.1.1.2.5
diff -u -r1.1.1.1.2.5 copy_page.S
--- arch/sh/mm/copy_page.S	10 Jun 2002 06:22:45 -0000	1.1.1.1.2.5
+++ arch/sh/mm/copy_page.S	23 Mar 2003 14:58:25 -0000
@@ -228,9 +228,9 @@
 	tst	r2,r2
 	bt	.L_cleanup
 1:
-	mov.l	@r5+,r0
+EX(	mov.l	@r5+,r0		)
 	dt	r2
-	mov.l	r0,@r4
+EX(	mov.l	r0,@r4		)
 	bf/s	1b
 	 add	#4,r4
 

----
SUGIOKA Toshinobu

[linuxsh-dev] [patch] minor fix for 2.4.20

[SUGIOKA T. <su...@it...>]

Hi,

Here is a patch to fix some minor problems in order to compile against 2.4.20.
I'll commit if no objection.

	* AGAINST-2.4.20-pre11: Removed.
	* AGAINST-2.4.20: New file.

	* include/asm-sh/ide.h (ide_init_default_hwifs): Clear 'hw' before
	calling ide_init_hwif_ports.
	(select_t,control_t): Support big endian.
	* include/asm-sh/pci.h (pci_dev): Declared.
	(PCI_DMA_BUS_IS_PHYS): Defined.
	* include/asm-sh/scatterlist.h (struct scatterlist): Add new members
	(page, offset, dma_address).
	* include/asm-sh/types.h (dma64_addr_t): Defined.
	* mm/memory.c (mark_dirty_kiobuf): Call set_page_dirty() instead of
	SetPageDirty().

Index: include/asm-sh/ide.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/ide.h,v
retrieving revision 1.1.1.1.2.1
diff -u -r1.1.1.1.2.1 ide.h
--- include/asm-sh/ide.h	23 Oct 2002 00:57:47 -0000	1.1.1.1.2.1
+++ include/asm-sh/ide.h	22 Mar 2003 06:04:00 -0000
@@ -100,6 +100,7 @@
 	int index;
 
 	for(index = 0; index < MAX_HWIFS; index++) {
+		memset(&hw, 0, sizeof hw);
 		ide_init_hwif_ports(&hw, ide_default_io_base(index), 0, NULL);
 		hw.irq = ide_default_irq(ide_default_io_base(index));
 		ide_register_hw(&hw, NULL);
@@ -110,23 +111,40 @@
 typedef union {
 	unsigned all			: 8;	/* all of the bits together */
 	struct {
+#ifdef __LITTLE_ENDIAN__
 		unsigned head		: 4;	/* always zeros here */
 		unsigned unit		: 1;	/* drive select number, 0 or 1 */
 		unsigned bit5		: 1;	/* always 1 */
 		unsigned lba		: 1;	/* using LBA instead of CHS */
 		unsigned bit7		: 1;	/* always 1 */
+#else
+		unsigned bit7		: 1;	/* always 1 */
+		unsigned lba		: 1;	/* using LBA instead of CHS */
+		unsigned bit5		: 1;	/* always 1 */
+		unsigned unit		: 1;	/* drive select number, 0 or 1 */
+		unsigned head		: 4;	/* always zeros here */
+#endif
 	} b;
 } select_t;
 
 typedef union {
 	unsigned all			: 8;	/* all of the bits together */
 	struct {
+#ifdef __LITTLE_ENDIAN__
 		unsigned bit0		: 1;
 		unsigned nIEN		: 1;	/* device INTRQ to host */
 		unsigned SRST		: 1;	/* host soft reset bit */
 		unsigned bit3		: 1;	/* ATA-2 thingy */
 		unsigned reserved456	: 3;
 		unsigned HOB		: 1;	/* 48-bit address ordering */
+#else
+		unsigned HOB		: 1;	/* 48-bit address ordering */
+		unsigned reserved456	: 3;
+		unsigned bit3		: 1;	/* ATA-2 thingy */
+		unsigned SRST		: 1;	/* host soft reset bit */
+		unsigned nIEN		: 1;	/* device INTRQ to host */
+		unsigned bit0		: 1;
+#endif
 	} b;
 } control_t;
 
Index: include/asm-sh/pci.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/pci.h,v
retrieving revision 1.1.1.1.2.2
diff -u -r1.1.1.1.2.2 pci.h
--- include/asm-sh/pci.h	26 Feb 2002 11:42:29 -0000	1.1.1.1.2.2
+++ include/asm-sh/pci.h	22 Mar 2003 06:04:00 -0000
@@ -50,6 +50,14 @@
 #include <linux/string.h>
 #include <asm/io.h>
 
+struct pci_dev;
+
+/* The PCI address space does equal the physical memory
+ * address space.  The networking and block device layers use
+ * this boolean for bounce buffer decisions.
+ */
+#define PCI_DMA_BUS_IS_PHYS	(1)
+
 /* Allocate and map kernel buffer using consistent mode DMA for a device.
  * hwdev should be valid struct pci_dev pointer for PCI devices,
  * NULL for PCI-like buses (ISA, EISA).
Index: include/asm-sh/scatterlist.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/scatterlist.h,v
retrieving revision 1.1.1.1
diff -u -r1.1.1.1 scatterlist.h
--- include/asm-sh/scatterlist.h	15 Oct 2001 20:45:11 -0000	1.1.1.1
+++ include/asm-sh/scatterlist.h	22 Mar 2003 06:04:00 -0000
@@ -2,7 +2,12 @@
 #define __ASM_SH_SCATTERLIST_H
 
 struct scatterlist {
-    char *  address;    /* Location data is to be transferred to */
+    char *  address;    /* Location data is to be transferred to, NULL for
+			 * highmem page */
+    struct page * page; /* Location for highmem page, if any */
+    unsigned int offset;/* for highmem, page offset */
+
+    dma_addr_t dma_address;
     unsigned int length;
 };
 
Index: include/asm-sh/types.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/types.h,v
retrieving revision 1.1.1.1
diff -u -r1.1.1.1 types.h
--- include/asm-sh/types.h	15 Oct 2001 20:45:09 -0000	1.1.1.1
+++ include/asm-sh/types.h	22 Mar 2003 06:04:00 -0000
@@ -44,6 +44,7 @@
 /* Dma addresses are 32-bits wide.  */
 
 typedef u32 dma_addr_t;
+typedef u64 dma64_addr_t;
 
 #endif /* __KERNEL__ */
 
Index: mm/memory.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/mm/memory.c,v
retrieving revision 1.1.1.1.2.7
diff -u -r1.1.1.1.2.7 memory.c
--- mm/memory.c	24 Oct 2002 05:52:59 -0000	1.1.1.1.2.7
+++ mm/memory.c	22 Mar 2003 06:04:01 -0000
@@ -586,6 +586,8 @@
  * occurs, the number of bytes read into memory may be less than the
  * size of the kiobuf, so we have to stop marking pages dirty once the
  * requested byte count has been reached.
+ *
+ * Must be called from process context - set_page_dirty() takes VFS locks.
  */
 
 void mark_dirty_kiobuf(struct kiobuf *iobuf, int bytes)
@@ -603,7 +605,7 @@
 		page = iobuf->maplist[index];
 		
 		if (!PageReserved(page))
-			SetPageDirty(page);
+			set_page_dirty(page);
 
 		remaining -= (PAGE_SIZE - offset);
 		offset = 0;

----
SUGIOKA Toshinobu

Re: [linuxsh-dev] kernel tlb miss optimization query

[Stuart M. <stu...@st...>]

On Thu, 20 Mar 2003 16:35:27 +0800 pga...@li... wrote:

> Sorry for monopolising this group.
> 
> Mr Stuart Menefy has provided a patch for optimising the tlb miss exception handling. 
> I am using the 2.5.13 kernel, downloaded from sourceforge here. 
> Changes to the files pgalloc.h and pgtable.h defining pmd_populate_kernel and pmd_page_kernel cause patch rejections.
> 
> In short,
> The original pgalloc.h has
> 
>     #define pmd_populate(mm, pmd, pte) set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)))
> 
> The 2.5.13 version defines pmd_populate_kernel as previously, but change pmd_populate to
> 
>     set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte)))
> 
> The tlb update patch defines pmd_populate to be
> 
>     set_pmd(pmd, __pmd(pte))

In 2.5, pmd_populate takes a struct page as a parameter, so with my patch
in place it would be something like:

  #define pmd_populate(mm, pmd, page) set_pmd(pmd, __pmd(page_address(page)))

meanwhile pmd_populate_kernel still takes a pte_t*, so should be defined
in the same way as pmd_populate used to be in the patch for 2.4.

> similarly, the original pgtable.h has
> 
>     #define pmd_page(pmd) ( (ul) _va(pmd_val) & PAGE_MASK)
> 
> The 2.5.13 changes this to pmd_page_kernel, and redefines pmd_page to be 
> 
>     (phys_to_page(pmd_val(pmd)))
> 
> However the tlb update patch redefines pmd_page(pmd) to be ((ul) __va(pmd_val(pmd)))

In 2.5, pmd_page now is used in the generic kernel code, so has to be defined
correctly (returning the corrisponding stuct page*). So with my patch in
place, I would expect it to be defined as something like:

  #define pmd_page(pmd) (virt_to_page(pmd_val(pmd)))

however in my patch, I also made use of pmd_page in the new definition of
pmd_bad, so these will need to be changed to pmd_page_kernel in a 2.5 context.

BTW, I've never tried a 2.5 kernel on SH, let alone try my TLB miss
handling patch, so there may well be other changes necessary.

> I wish to know what the TLB patch does to kernel page tables in general and what should happen here. Also would a possibly less efficient implementation that only changes entry.S to do the assembly language equivalent of 

There are a couple of changes:

 - pmd_t is now simply a pointer to the pte directory, in kernel address
   space. Previously it was the physical address of the pte directory,
   ORed with _PAGE_TABLE, all cruft which has to be undone in the TLB
   miss handler.

 - pmd_none is changed to be a specific value: the address of a page
   which contains pointers to empty zero page. This allows the miss
   handler to always dereference the pmd and pte pointers, without having
   to check whether they are valid. If they are not, then the final check
   for _PAGE_PRESENT will fail, and the handler calls the C code to fix
   up the fault.

So yes this

>    pgd_offset(current->mm, address)
>    pmd_offset(pdg, address)
>    pte_offset(pmd, address)
>    update ptel
>    ldtlb
>    rte
> 
> be likely to work?

will work, but it will need to be augmented with checks for pmd_none and
pgd_none, and you need to decide what to do about setting _PAGE_ACCESSED.

Hope this helps

Stuart

[linuxsh-dev] kernel tlb miss optimization query

[peter g. <pga...@li...>]

Sorry for monopolising this group.

Mr Stuart Menefy has provided a patch for optimising the tlb miss exception handling. 
I am using the 2.5.13 kernel, downloaded from sourceforge here. 
Changes to the files pgalloc.h and pgtable.h defining pmd_populate_kernel and pmd_page_kernel cause patch rejections.

In short,
The original pgalloc.h has

    #define pmd_populate(mm, pmd, pte) set_pmd(pmd, __pmd(_PAGE_TABLE + __pa(pte)))

The 2.5.13 version defines pmd_populate_kernel as previously, but change pmd_populate to

    set_pmd(pmd, __pmd(_PAGE_TABLE + page_to_phys(pte)))

The tlb update patch defines pmd_populate to be

    set_pmd(pmd, __pmd(pte))

similarly, the original pgtable.h has

    #define pmd_page(pmd) ( (ul) _va(pmd_val) & PAGE_MASK)

The 2.5.13 changes this to pmd_page_kernel, and redefines pmd_page to be 

    (phys_to_page(pmd_val(pmd)))

However the tlb update patch redefines pmd_page(pmd) to be ((ul) __va(pmd_val(pmd)))

I wish to know what the TLB patch does to kernel page tables in general and what should happen here. Also would a possibly less efficient implementation that only changes entry.S to do the assembly language equivalent of 

   pgd_offset(current->mm, address)
   pmd_offset(pdg, address)
   pte_offset(pmd, address)
   update ptel
   ldtlb
   rte

be likely to work?

Cheers


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