linuxsh-cvs

[linuxsh-cvs] CVS: linux/include/asm-sh cpu-features.h, NONE, 1.1 elf.h, 1.5, 1.6 processor.h, 1.40, 1.41

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/include/asm-sh
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv12625/include/asm-sh

Modified Files:
	elf.h processor.h 
Added Files:
	cpu-features.h 
Log Message:
Encode processor flags in AT_HWCAP in the ELF auxiliary vector.



--- NEW FILE: cpu-features.h ---
#ifndef __ASM_SH_CPU_FEATURES_H
#define __ASM_SH_CPU_FEATURES_H

/*
 * Processor flags
 */
#define CPU_HAS_FPU		0x0001	/* Hardware FPU support */
#define CPU_HAS_P2_FLUSH_BUG	0x0002	/* Need to flush the cache in P2 area */
#define CPU_HAS_MMU_PAGE_ASSOC	0x0004	/* SH3: TLB way selection bit support */
#define CPU_HAS_DSP		0x0008	/* SH-DSP: DSP support */
#define CPU_HAS_PERF_COUNTER	0x0010	/* Hardware performance counters */
#define CPU_HAS_PTEA		0x0020	/* PTEA register */
#define CPU_HAS_LLSC		0x0040	/* movli.l/movco.l */

#endif /* __ASM_SH_CPU_FEATURES_H */

Index: elf.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/elf.h,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- elf.h	3 Jan 2006 22:35:58 -0000	1.5
+++ elf.h	9 Aug 2006 03:53:04 -0000	1.6
@@ -1,6 +1,11 @@
 #ifndef __ASM_SH_ELF_H
 #define __ASM_SH_ELF_H
 
+#include <asm/processor.h>
+#include <asm/auxvec.h>
+#include <asm/ptrace.h>
+#include <asm/user.h>
+
 /* SH relocation types  */
 #define	R_SH_NONE		0
 #define	R_SH_DIR32		1
@@ -46,9 +51,6 @@
  * ELF register definitions..
  */
 
-#include <asm/ptrace.h>
-#include <asm/user.h>
-
 typedef unsigned long elf_greg_t;
 
 #define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
@@ -91,7 +93,7 @@
    instruction set this CPU supports.  This could be done in user space,
    but it's not easy, and we've already done it here.  */
 
-#define ELF_HWCAP	(0)
+#define ELF_HWCAP	(boot_cpu_data.flags)
 
 /* This yields a string that ld.so will use to load implementation
    specific libraries for optimization.  This is more specific in

Index: processor.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/processor.h,v
retrieving revision 1.40
retrieving revision 1.41
diff -u -d -r1.40 -r1.41
--- processor.h	7 Aug 2006 09:47:14 -0000	1.40
+++ processor.h	9 Aug 2006 03:53:04 -0000	1.41
@@ -14,6 +14,7 @@
 #include <asm/types.h>
 #include <asm/cache.h>
 #include <asm/ptrace.h>
+#include <asm/cpu-features.h>
 
 /*
  * Default implementation of macro that returns current
@@ -127,17 +128,6 @@
 	struct sh_fpu_soft_struct soft;
 };
 
-/*
- * Processor flags
- */
-
-#define CPU_HAS_FPU		0x0001	/* Hardware FPU support */
-#define CPU_HAS_P2_FLUSH_BUG	0x0002	/* Need to flush the cache in P2 area */
-#define CPU_HAS_MMU_PAGE_ASSOC	0x0004	/* SH3: TLB way selection bit support */
-#define CPU_HAS_DSP		0x0008	/* SH-DSP: DSP support */
-#define CPU_HAS_PERF_COUNTER	0x0010	/* Hardware performance counters */
-#define CPU_HAS_PTEA		0x0020	/* PTEA register */
-
 struct thread_struct {
 	unsigned long sp;
 	unsigned long pc;

[linuxsh-cvs] CVS: linux/arch/sh/kernel/cpu/sh4 probe.c,1.7,1.8

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/sh4
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv12625/arch/sh/kernel/cpu/sh4

Modified Files:
	probe.c 
Log Message:
Encode processor flags in AT_HWCAP in the ELF auxiliary vector.



Index: probe.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/sh4/probe.c,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- probe.c	7 Aug 2006 09:47:14 -0000	1.7
+++ probe.c	9 Aug 2006 03:53:04 -0000	1.8
@@ -76,6 +76,7 @@
 		cpu_data->type = CPU_SH73180;
 		cpu_data->icache.ways = 4;
 		cpu_data->dcache.ways = 4;
+		cpu_data->flags |= CPU_HAS_LLSC;
 		break;
 	case 0x2001:
 	case 0x2004:
@@ -83,7 +84,7 @@
 		cpu_data->icache.ways = 4;
 		cpu_data->dcache.ways = 4;
 
-		cpu_data->flags |= CPU_HAS_FPU;
+		cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_LLSC;
 		break;
 	case 0x2006:
 	case 0x200A:
@@ -95,13 +96,15 @@
 		cpu_data->icache.ways = 4;
 		cpu_data->dcache.ways = 4;
 
-		cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER;
+		cpu_data->flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
+				   CPU_HAS_LLSC;
 		break;
 	case 0x3000:
 	case 0x3003:
 		cpu_data->type = CPU_SH7343;
 		cpu_data->icache.ways = 4;
 		cpu_data->dcache.ways = 4;
+		cpu_data->flags |= CPU_HAS_LLSC;
 		break;
 	case 0x8000:
 		cpu_data->type = CPU_ST40RA;
@@ -180,4 +183,3 @@
 
 	return 0;
 }
-

[linuxsh-cvs] CVS: linux/arch/sh/kernel entry.S, 1.48, 1.49 head.S, 1.10, 1.11 irq.c, 1.29, 1.30 traps.c, 1.21, 1.22 vmlinux.lds.S, 1.8, 1.9

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh/kernel
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv6106/arch/sh/kernel

Modified Files:
	entry.S head.S irq.c traps.c vmlinux.lds.S 
Log Message:
Add support for 4K stacks.



Index: entry.S
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/entry.S,v
retrieving revision 1.48
retrieving revision 1.49
diff -u -d -r1.48 -r1.49
--- entry.S	31 Jul 2006 01:21:08 -0000	1.48
+++ entry.S	9 Aug 2006 02:33:40 -0000	1.49
@@ -717,8 +717,8 @@
 	bt/s	1f		! It's a kernel to kernel transition.
 	 mov	r15, k0		! save original stack to k0
 	/* User space to kernel */
-	mov	#0x20, k1
-	shll8	k1		! k1 := 8192 (== THREAD_SIZE)
+	mov	#(THREAD_SIZE >> 8), k1
+	shll8	k1		! k1 := THREAD_SIZE
 	add	current, k1
 	mov	k1, r15		! change to kernel stack
 	!

Index: head.S
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/head.S,v
retrieving revision 1.10
retrieving revision 1.11
diff -u -d -r1.10 -r1.11
--- head.S	8 Aug 2006 03:07:13 -0000	1.10
+++ head.S	9 Aug 2006 02:33:40 -0000	1.11
@@ -12,7 +12,6 @@
  */
 #include <linux/linkage.h>
 #include <asm/thread_info.h>
-#include <asm/page.h>
 
 #ifdef CONFIG_CPU_SH4A
 #define SYNCO()		synco
@@ -69,8 +68,8 @@
 	!
 	mov.l	2f, r0
 	mov	r0, r15		! Set initial r15 (stack pointer)
-	mov	#0x20, r1	!
-	shll8	r1		! r1 = 8192
+	mov	#(THREAD_SIZE >> 8), r1
+	shll8	r1		! r1 = THREAD_SIZE
 	sub	r1, r0		!
 	ldc	r0, r7_bank	! ... and initial thread_info
 

Index: irq.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/irq.c,v
retrieving revision 1.29
retrieving revision 1.30
diff -u -d -r1.29 -r1.30
--- irq.c	8 Aug 2006 03:07:13 -0000	1.29
+++ irq.c	9 Aug 2006 02:33:40 -0000	1.30
@@ -1,5 +1,4 @@
-/* $Id$
- *
+/*
  * linux/arch/sh/kernel/irq.c
  *
  *	Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
@@ -7,13 +6,15 @@
  *
  * SuperH version:  Copyright (C) 1999  Niibe Yutaka
  */
-
 #include <linux/irq.h>
 #include <linux/interrupt.h>
+#include <linux/module.h>
 #include <linux/kernel_stat.h>
 #include <linux/seq_file.h>
 #include <asm/irq.h>
 #include <asm/processor.h>
+#include <asm/uaccess.h>
+#include <asm/thread_info.h>
 #include <asm/cpu/mmu_context.h>
 
 /*
@@ -60,11 +61,27 @@
 }
 #endif
 
+#ifdef CONFIG_4KSTACKS
+/*
+ * per-CPU IRQ handling contexts (thread information and stack)
+ */
+union irq_ctx {
+	struct thread_info	tinfo;
+	u32			stack[THREAD_SIZE/sizeof(u32)];
+};
+
+static union irq_ctx *hardirq_ctx[NR_CPUS];
+static union irq_ctx *softirq_ctx[NR_CPUS];
+#endif
+
 asmlinkage int do_IRQ(unsigned long r4, unsigned long r5,
 		      unsigned long r6, unsigned long r7,
 		      struct pt_regs regs)
 {
 	int irq = r4;
+#ifdef CONFIG_4KSTACKS
+	union irq_ctx *curctx, *irqctx;
+#endif
 
 	irq_enter();
 
@@ -102,7 +119,135 @@
 #endif
 
 	irq = irq_demux(irq);
-	__do_IRQ(irq, &regs);
+
+#ifdef CONFIG_4KSTACKS
+	curctx = (union irq_ctx *)current_thread_info();
+	irqctx = hardirq_ctx[smp_processor_id()];
+
+	/*
+	 * this is where we switch to the IRQ stack. However, if we are
+	 * already using the IRQ stack (because we interrupted a hardirq
+	 * handler) we can't do that and just have to keep using the
+	 * current stack (which is the irq stack already after all)
+	 */
+	if (curctx != irqctx) {
+		u32 *isp;
+
+		isp = (u32 *)((char *)irqctx + sizeof(*irqctx));
+		irqctx->tinfo.task = curctx->tinfo.task;
+		irqctx->tinfo.previous_sp = current_stack_pointer;
+
+		__asm__ __volatile__ (
+			"mov	%0, r4		\n"
+			"mov	%1, r5		\n"
+			"mov	r15, r9		\n"
+			"jsr	@%2		\n"
+			/* swith to the irq stack */
+			" mov	%3, r15		\n"
+			/* restore the stack (ring zero) */
+			"mov	r9, r15		\n"
+			: /* no outputs */
+			: "r" (irq), "r" (&regs), "r" (__do_IRQ), "r" (isp)
+			/* XXX: A somewhat excessive clobber list? -PFM */
+			: "memory", "r0", "r1", "r2", "r3", "r4",
+			  "r5", "r6", "r7", "r8", "t", "pr"
+		);
+	} else
+#endif
+		__do_IRQ(irq, &regs);
+
 	irq_exit();
+
 	return 1;
 }
+
+#ifdef CONFIG_4KSTACKS
+/*
+ * These should really be __section__(".bss.page_aligned") as well, but
+ * gcc's 3.0 and earlier don't handle that correctly.
+ */
+static char softirq_stack[NR_CPUS * THREAD_SIZE]
+		__attribute__((__aligned__(THREAD_SIZE)));
+
+static char hardirq_stack[NR_CPUS * THREAD_SIZE]
+		__attribute__((__aligned__(THREAD_SIZE)));
+
+/*
+ * allocate per-cpu stacks for hardirq and for softirq processing
+ */
+void irq_ctx_init(int cpu)
+{
+	union irq_ctx *irqctx;
+
+	if (hardirq_ctx[cpu])
+		return;
+
+	irqctx = (union irq_ctx *)&hardirq_stack[cpu * THREAD_SIZE];
+	irqctx->tinfo.task		= NULL;
+	irqctx->tinfo.exec_domain	= NULL;
+	irqctx->tinfo.cpu		= cpu;
+	irqctx->tinfo.preempt_count	= HARDIRQ_OFFSET;
+	irqctx->tinfo.addr_limit	= MAKE_MM_SEG(0);
+
+	hardirq_ctx[cpu] = irqctx;
+
+	irqctx = (union irq_ctx *)&softirq_stack[cpu * THREAD_SIZE];
+	irqctx->tinfo.task		= NULL;
+	irqctx->tinfo.exec_domain	= NULL;
+	irqctx->tinfo.cpu		= cpu;
+	irqctx->tinfo.preempt_count	= SOFTIRQ_OFFSET;
+	irqctx->tinfo.addr_limit	= MAKE_MM_SEG(0);
+
+	softirq_ctx[cpu] = irqctx;
+
+	printk("CPU %u irqstacks, hard=%p soft=%p\n",
+		cpu, hardirq_ctx[cpu], softirq_ctx[cpu]);
+}
+
+void irq_ctx_exit(int cpu)
+{
+	hardirq_ctx[cpu] = NULL;
+}
+
+extern asmlinkage void __do_softirq(void);
+
+asmlinkage void do_softirq(void)
+{
+	unsigned long flags;
+	struct thread_info *curctx;
+	union irq_ctx *irqctx;
+	u32 *isp;
+
+	if (in_interrupt())
+		return;
+
+	local_irq_save(flags);
+
+	if (local_softirq_pending()) {
+		curctx = current_thread_info();
+		irqctx = softirq_ctx[smp_processor_id()];
+		irqctx->tinfo.task = curctx->task;
+		irqctx->tinfo.previous_sp = current_stack_pointer;
+
+		/* build the stack frame on the softirq stack */
+		isp = (u32 *)((char *)irqctx + sizeof(*irqctx));
+
+		__asm__ __volatile__ (
+			"mov	r15, r9		\n"
+			"jsr	@%0		\n"
+			/* switch to the softirq stack */
+			" mov	%1, r15		\n"
+			/* restore the thread stack */
+			"mov	r9, r15		\n"
+			: /* no outputs */
+			: "r" (__do_softirq), "r" (isp)
+			/* XXX: A somewhat excessive clobber list? -PFM */
+			: "memory", "r0", "r1", "r2", "r3", "r4",
+			  "r5", "r6", "r7", "r8", "r9", "r15", "t", "pr"
+		);
+	}
+
+	local_irq_restore(flags);
+}
+EXPORT_SYMBOL(do_softirq);
+#endif

Index: traps.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/traps.c,v
retrieving revision 1.21
retrieving revision 1.22
diff -u -d -r1.21 -r1.22
--- traps.c	12 Jul 2006 10:35:55 -0000	1.21
+++ traps.c	9 Aug 2006 02:33:40 -0000	1.22
@@ -742,20 +742,12 @@
 	unsigned long module_end = VMALLOC_END;
 	int i = 1;
 
-	if (tsk && !sp) {
+	if (!tsk)
+		tsk = current;
+	if (tsk == current)
+		sp = (unsigned long *)current_stack_pointer;
+	else
 		sp = (unsigned long *)tsk->thread.sp;
-	}
-
-	if (!sp) {
-		__asm__ __volatile__ (
-			"mov r15, %0\n\t"
-			"stc r7_bank, %1\n\t"
-			: "=r" (module_start),
-			  "=r" (module_end)
-		);
-		
-		sp = (unsigned long *)module_start;
-	}
 
 	stack = sp;
 

Index: vmlinux.lds.S
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/vmlinux.lds.S,v
retrieving revision 1.8
retrieving revision 1.9
diff -u -d -r1.8 -r1.9
--- vmlinux.lds.S	8 Aug 2006 03:07:13 -0000	1.8
+++ vmlinux.lds.S	9 Aug 2006 02:33:40 -0000	1.9
@@ -4,7 +4,6 @@
  */
 #include <linux/config.h>
 #include <asm/thread_info.h>
-#include <asm/page.h>
 #include <asm-generic/vmlinux.lds.h>
 
 #ifdef CONFIG_CPU_LITTLE_ENDIAN

[linuxsh-cvs] CVS: linux/include/asm-sh irq.h, 1.35, 1.36 thread_info.h, 1.20, 1.21

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/include/asm-sh
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv6106/include/asm-sh

Modified Files:
	irq.h thread_info.h 
Log Message:
Add support for 4K stacks.



Index: irq.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/irq.h,v
retrieving revision 1.35
retrieving revision 1.36
diff -u -d -r1.35 -r1.36
--- irq.h	7 Aug 2006 11:17:45 -0000	1.35
+++ irq.h	9 Aug 2006 02:33:40 -0000	1.36
@@ -720,6 +720,15 @@
 #define irq_canonicalize(irq)	(irq)
 #define irq_demux(irq)		__irq_demux(sh_mv.mv_irq_demux(irq))
 
+#ifdef CONFIG_4KSTACKS
+extern void irq_ctx_init(int cpu);
+extern void irq_ctx_exit(int cpu);
+# define __ARCH_HAS_DO_SOFTIRQ
+#else
+# define irq_ctx_init(cpu) do { } while (0)
+# define irq_ctx_exit(cpu) do { } while (0)
+#endif
+
 #if defined(CONFIG_CPU_SUBTYPE_SH73180)
 #include <asm/irq-sh73180.h>
 #endif

Index: thread_info.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/thread_info.h,v
retrieving revision 1.20
retrieving revision 1.21
diff -u -d -r1.20 -r1.21
--- thread_info.h	8 Aug 2006 03:07:13 -0000	1.20
+++ thread_info.h	9 Aug 2006 02:33:40 -0000	1.21
@@ -9,8 +9,8 @@
  *  Copyright (C) 2002  David Howells (dho...@re...)
  *  - Incorporating suggestions made by Linus Torvalds and Dave Miller
  */
-
 #ifdef __KERNEL__
+#include <asm/page.h>
 
 #ifndef __ASSEMBLY__
 #include <asm/processor.h>
@@ -23,13 +23,20 @@
 	int			preempt_count;	/* 0 => preemptable, <0 => BUG */
 	mm_segment_t		addr_limit;	/* thread address space */
 	struct restart_block	restart_block;
+	unsigned long		previous_sp;	/* sp of previous stack in case
+						   of nested IRQ stacks */
 	__u8			supervisor_stack[0];
 };
 
 #endif
 
 #define PREEMPT_ACTIVE		0x10000000
+
+#ifdef CONFIG_4KSTACKS
+#define THREAD_SIZE		(PAGE_SIZE)
+#else
 #define THREAD_SIZE		(PAGE_SIZE * 2)
+#endif
 #define STACK_WARN		(THREAD_SIZE / 8)
 
 /*
@@ -52,6 +59,9 @@
 #define init_thread_info	(init_thread_union.thread_info)
 #define init_stack		(init_thread_union.stack)
 
+/* how to get the current stack pointer from C */
+register unsigned long current_stack_pointer asm("r15") __attribute_used__;
+
 /* how to get the thread information struct from C */
 static inline struct thread_info *current_thread_info(void)
 {

[linuxsh-cvs] CVS: linux/arch/sh/kernel/cpu/irq ipr.c,1.5,1.6

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/irq
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv6106/arch/sh/kernel/cpu/irq

Modified Files:
	ipr.c 
Log Message:
Add support for 4K stacks.



Index: ipr.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/irq/ipr.c,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- ipr.c	7 Aug 2006 02:14:09 -0000	1.5
+++ ipr.c	9 Aug 2006 02:33:40 -0000	1.6
@@ -191,6 +191,8 @@
 	/* Perform the machine specific initialisation */
 	if (sh_mv.mv_init_irq != NULL)
 		sh_mv.mv_init_irq();
+
+	irq_ctx_init(smp_processor_id());
 }
 
 #if !defined(CONFIG_CPU_HAS_PINT_IRQ)

[linuxsh-cvs] CVS: linux/arch/sh Kconfig.debug,1.6,1.7

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv6106/arch/sh

Modified Files:
	Kconfig.debug 
Log Message:
Add support for 4K stacks.



Index: Kconfig.debug
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/Kconfig.debug,v
retrieving revision 1.6
retrieving revision 1.7
diff -u -d -r1.6 -r1.7
--- Kconfig.debug	8 Aug 2006 03:09:20 -0000	1.6
+++ Kconfig.debug	9 Aug 2006 02:33:40 -0000	1.7
@@ -46,6 +46,16 @@
 
 	  This option will slow down process creation somewhat.
 
+config 4KSTACKS
+	bool "Use 4Kb for kernel stacks instead of 8Kb"
+	depends on DEBUG_KERNEL
+	help
+	  If you say Y here the kernel will use a 4Kb stacksize for the
+	  kernel stack attached to each process/thread. This facilitates
+	  running more threads on a system and also reduces the pressure
+	  on the VM subsystem for higher order allocations. This option
+	  will also use IRQ stacks to compensate for the reduced stackspace.
+
 config KGDB
 	bool "Include KGDB kernel debugger"
 	select FRAME_POINTER

[linuxsh-cvs] CVS: linux/arch/sh/mm init.c,1.29,1.30

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh/mm
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv4738/arch/sh/mm

Modified Files:
	init.c 
Log Message:
Enable /proc/kcore support.



Index: init.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/mm/init.c,v
retrieving revision 1.29
retrieving revision 1.30
diff -u -d -r1.29 -r1.30
--- init.c	19 Jul 2006 15:45:38 -0000	1.29
+++ init.c	8 Aug 2006 06:40:50 -0000	1.30
@@ -25,7 +25,7 @@
 #include <linux/highmem.h>
 #include <linux/bootmem.h>
 #include <linux/pagemap.h>
-
+#include <linux/proc_fs.h>
 #include <asm/processor.h>
 #include <asm/system.h>
 #include <asm/uaccess.h>
@@ -224,6 +224,8 @@
 	free_area_init_node(0, NODE_DATA(0), zones_size, __MEMORY_START >> PAGE_SHIFT, 0);
 }
 
+static struct kcore_list kcore_mem, kcore_vmalloc;
+
 void __init mem_init(void)
 {
 	extern unsigned long empty_zero_page[1024];
@@ -271,7 +273,12 @@
 	datasize =  (unsigned long) &_edata - (unsigned long) &_etext;
 	initsize =  (unsigned long) &__init_end - (unsigned long) &__init_begin;
 
-	printk("Memory: %luk/%luk available (%dk kernel code, %dk reserved, %dk data, %dk init)\n",
+	kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT);
+	kclist_add(&kcore_vmalloc, (void *)VMALLOC_START,
+		   VMALLOC_END - VMALLOC_START);
+
+	printk(KERN_INFO "Memory: %luk/%luk available (%dk kernel code, "
+	       "%dk reserved, %dk data, %dk init)\n",
 		(unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
 		max_mapnr << (PAGE_SHIFT-10),
 		codesize >> 10,

[linuxsh-cvs] CVS: linux/arch/sh Kconfig.debug,1.5,1.6

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv17639/arch/sh

Modified Files:
	Kconfig.debug 
Log Message:
Fix help text line wrapping.



Index: Kconfig.debug
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/Kconfig.debug,v
retrieving revision 1.5
retrieving revision 1.6
diff -u -d -r1.5 -r1.6
--- Kconfig.debug	8 Aug 2006 03:07:13 -0000	1.5
+++ Kconfig.debug	8 Aug 2006 03:09:20 -0000	1.6
@@ -34,7 +34,8 @@
 	bool "Check for stack overflows"
 	depends on DEBUG_KERNEL
 	help
-	  This option will cause messages to be printed if free stack space		  drops below a certain limit.
+	  This option will cause messages to be printed if free stack space
+	  drops below a certain limit.
 
 config DEBUG_STACK_USAGE
 	bool "Stack utilization instrumentation"

[linuxsh-cvs] CVS: linux/arch/sh Kconfig.debug,1.4,1.5

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv16840/arch/sh

Modified Files:
	Kconfig.debug 
Log Message:
Stack debugging support, based on ST's old patch.



Index: Kconfig.debug
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/Kconfig.debug,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- Kconfig.debug	30 Jan 2006 16:05:57 -0000	1.4
+++ Kconfig.debug	8 Aug 2006 03:07:13 -0000	1.5
@@ -30,6 +30,21 @@
 	  when the kernel may crash or hang before the serial console is
 	  initialised. If unsure, say N.
 
+config DEBUG_STACKOVERFLOW
+	bool "Check for stack overflows"
+	depends on DEBUG_KERNEL
+	help
+	  This option will cause messages to be printed if free stack space		  drops below a certain limit.
+
+config DEBUG_STACK_USAGE
+	bool "Stack utilization instrumentation"
+	depends on DEBUG_KERNEL
+	help
+	  Enables the display of the minimum amount of free stack which each
+	  task has ever had available in the sysrq-T and sysrq-P debug output.
+
+	  This option will slow down process creation somewhat.
+
 config KGDB
 	bool "Include KGDB kernel debugger"
 	select FRAME_POINTER

[linuxsh-cvs] CVS: linux/arch/sh/kernel head.S, 1.9, 1.10 irq.c, 1.28, 1.29 vmlinux.lds.S, 1.7, 1.8

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh/kernel
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv16840/arch/sh/kernel

Modified Files:
	head.S irq.c vmlinux.lds.S 
Log Message:
Stack debugging support, based on ST's old patch.



Index: head.S
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/head.S,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -d -r1.9 -r1.10
--- head.S	20 Oct 2005 22:51:38 -0000	1.9
+++ head.S	8 Aug 2006 03:07:13 -0000	1.10
@@ -11,6 +11,8 @@
  * Head.S contains the SH exception handlers and startup code.
  */
 #include <linux/linkage.h>
+#include <asm/thread_info.h>
+#include <asm/page.h>
 
 #ifdef CONFIG_CPU_SH4A
 #define SYNCO()		synco
@@ -95,7 +97,7 @@
 
 	.balign 4
 1:	.long	0x400080F0		! MD=1, RB=0, BL=0, FD=1, IMASK=0xF
-2:	.long	init_thread_union+8192
+2:	.long	init_thread_union+THREAD_SIZE
 3:	.long	__bss_start
 4:	.long	_end
 5:	.long	start_kernel

Index: irq.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/irq.c,v
retrieving revision 1.28
retrieving revision 1.29
diff -u -d -r1.28 -r1.29
--- irq.c	5 Jul 2006 08:46:48 -0000	1.28
+++ irq.c	8 Aug 2006 03:07:13 -0000	1.29
@@ -60,7 +60,6 @@
 }
 #endif
 
-
 asmlinkage int do_IRQ(unsigned long r4, unsigned long r5,
 		      unsigned long r6, unsigned long r7,
 		      struct pt_regs regs)
@@ -69,6 +68,22 @@
 
 	irq_enter();
 
+#ifdef CONFIG_DEBUG_STACKOVERFLOW
+	/* Debugging check for stack overflow: is there less than 1KB free? */
+	{
+		long sp;
+
+		__asm__ __volatile__ ("and r15, %0" :
+					"=r" (sp) : "0" (THREAD_SIZE - 1));
+
+		if (unlikely(sp < (sizeof(struct thread_info) + STACK_WARN))) {
+			printk("do_IRQ: stack overflow: %ld\n",
+			       sp - sizeof(struct thread_info));
+			dump_stack();
+		}
+	}
+#endif
+
 #ifdef CONFIG_CPU_HAS_INTEVT
 	__asm__ __volatile__ (
 #ifdef CONFIG_CPU_HAS_SR_RB

Index: vmlinux.lds.S
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/vmlinux.lds.S,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- vmlinux.lds.S	19 Jul 2006 14:33:16 -0000	1.7
+++ vmlinux.lds.S	8 Aug 2006 03:07:13 -0000	1.8
@@ -3,6 +3,8 @@
  * Written by Niibe Yutaka
  */
 #include <linux/config.h>
+#include <asm/thread_info.h>
+#include <asm/page.h>
 #include <asm-generic/vmlinux.lds.h>
 
 #ifdef CONFIG_CPU_LITTLE_ENDIAN
@@ -41,16 +43,16 @@
 	*(.data)
 
  	 /* Align the initial ramdisk image (INITRD) on page boundaries. */
- 	 . = ALIGN(4096);
+ 	 . = ALIGN(PAGE_SIZE);
  	 __rd_start = .;
  	 *(.initrd)
- 	 . = ALIGN(4096);
+ 	 . = ALIGN(PAGE_SIZE);
  	 __rd_end = .;
 
 	CONSTRUCTORS
 	}
 
-  . = ALIGN(4096);
+  . = ALIGN(PAGE_SIZE);
   .data.page_aligned : { *(.data.idt) }
 
   . = ALIGN(32);
@@ -61,10 +63,10 @@
 
   _edata = .;			/* End of data section */
 
-  . = ALIGN(8192);		/* init_task */
+  . = ALIGN(THREAD_SIZE);		/* init_task */
   .data.init_task : { *(.data.init_task) }
 
-  . = ALIGN(4096);		/* Init code and data */
+  . = ALIGN(PAGE_SIZE);		/* Init code and data */
   __init_begin = .;
   _sinittext = .;
   .init.text : { *(.init.text) }
@@ -95,7 +97,7 @@
   __machvec_start = .;
   .init.machvec : { *(.init.machvec) }
   __machvec_end = .;
-  . = ALIGN(4096);
+  . = ALIGN(PAGE_SIZE);
   __init_end = .;
 
   . = ALIGN(4);

[linuxsh-cvs] CVS: linux/include/asm-sh page.h, 1.17, 1.18 thread_info.h, 1.19, 1.20

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/include/asm-sh
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv16840/include/asm-sh

Modified Files:
	page.h thread_info.h 
Log Message:
Stack debugging support, based on ST's old patch.



Index: page.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/page.h,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -d -r1.17 -r1.18
--- page.h	19 Jul 2006 15:45:38 -0000	1.17
+++ page.h	8 Aug 2006 03:07:13 -0000	1.18
@@ -17,7 +17,7 @@
 
 /* PAGE_SHIFT determines the page size */
 #define PAGE_SHIFT	12
-#define PAGE_SIZE	(1UL << PAGE_SHIFT)
+#define PAGE_SIZE	(1 << PAGE_SHIFT)
 #define PAGE_MASK	(~(PAGE_SIZE-1))
 #define PTE_MASK	PAGE_MASK
 

Index: thread_info.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/thread_info.h,v
retrieving revision 1.19
retrieving revision 1.20
diff -u -d -r1.19 -r1.20
--- thread_info.h	31 Jul 2006 01:21:09 -0000	1.19
+++ thread_info.h	8 Aug 2006 03:07:13 -0000	1.20
@@ -29,6 +29,8 @@
 #endif
 
 #define PREEMPT_ACTIVE		0x10000000
+#define THREAD_SIZE		(PAGE_SIZE * 2)
+#define STACK_WARN		(THREAD_SIZE / 8)
 
 /*
  * macros/functions for gaining access to the thread information structure
@@ -50,8 +52,6 @@
 #define init_thread_info	(init_thread_union.thread_info)
 #define init_stack		(init_thread_union.stack)
 
-#define THREAD_SIZE (2*PAGE_SIZE)
-
 /* how to get the thread information struct from C */
 static inline struct thread_info *current_thread_info(void)
 {
@@ -73,8 +73,12 @@
 }
 
 /* thread information allocation */
-#define alloc_thread_info(ti) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1))
-#define free_thread_info(ti) free_pages((unsigned long) (ti), 1)
+#ifdef CONFIG_DEBUG_STACK_USAGE
+#define alloc_thread_info(ti)	kzalloc(THREAD_SIZE, GFP_KERNEL)
+#else
+#define alloc_thread_info(ti)	kmalloc(THREAD_SIZE, GFP_KERNEL)
+#endif
+#define free_thread_info(ti)	kfree(ti)
 
 #else /* !__ASSEMBLY__ */
 

[linuxsh-cvs] CVS: linux/include/asm-sh atomic.h,1.7,1.8

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/include/asm-sh
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv17888/include/asm-sh

Modified Files:
	atomic.h 
Log Message:
bf isn't a delayed branch, don't waste a nop.



Index: atomic.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/atomic.h,v
retrieving revision 1.7
retrieving revision 1.8
diff -u -d -r1.7 -r1.8
--- atomic.h	4 Aug 2006 10:51:42 -0000	1.7
+++ atomic.h	8 Aug 2006 00:24:39 -0000	1.8
@@ -32,7 +32,6 @@
 "	add	%2, %0				\n"
 "	movco.l	%0, @%3				\n"
 "	bf	1b				\n"
-"	 nop					\n"
 	: "=&z" (tmp), "=r" (&v->counter)
 	: "r" (i), "r" (&v->counter)
 	: "t");
@@ -55,7 +54,6 @@
 "	sub	%2, %0				\n"
 "	movco.l	%0, @%3				\n"
 "	bf	1b				\n"
-"	 nop					\n"
 	: "=&z" (tmp), "=r" (&v->counter)
 	: "r" (i), "r" (&v->counter)
 	: "t");
@@ -86,7 +84,6 @@
 "	add	%2, %0					\n"
 "	movco.l	%0, @%3					\n"
 "	bf	1b					\n"
-"	 nop						\n"
 "	synco						\n"
 	: "=&z" (temp), "=r" (&v->counter)
 	: "r" (i), "r" (&v->counter)
@@ -116,7 +113,6 @@
 "	sub	%2, %0					\n"
 "	movco.l	%0, @%3					\n"
 "	bf	1b					\n"
-"	 nop						\n"
 "	synco						\n"
 	: "=&z" (temp), "=r" (&v->counter)
 	: "r" (i), "r" (&v->counter)
@@ -194,7 +190,6 @@
 "	and	%2, %0					\n"
 "	movco.l	%0, @%3					\n"
 "	bf	1b					\n"
-"	 nop						\n"
 	: "=&z" (tmp), "=r" (&v->counter)
 	: "r" (~mask), "r" (&v->counter)
 	: "t");
@@ -217,7 +212,6 @@
 "	or	%2, %0					\n"
 "	movco.l	%0, @%3					\n"
 "	bf	1b					\n"
-"	 nop						\n"
 	: "=&z" (tmp), "=r" (&v->counter)
 	: "r" (mask), "r" (&v->counter)
 	: "t");

[linuxsh-cvs] CVS: linux/arch/sh Kconfig,1.115,1.116

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv30305/arch/sh

Modified Files:
	Kconfig 
Log Message:
Forcibly select CONFIG_EMBEDDED.



Index: Kconfig
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/Kconfig,v
retrieving revision 1.115
retrieving revision 1.116
diff -u -d -r1.115 -r1.116
--- Kconfig	7 Aug 2006 11:17:45 -0000	1.115
+++ Kconfig	7 Aug 2006 11:28:53 -0000	1.116
@@ -8,6 +8,7 @@
 config SUPERH
 	bool
 	default y
+	select EMBEDDED
 	help
 	  The SuperH is a RISC processor targeted for use in embedded systems
 	  and consumer electronics; it was also used in the Sega Dreamcast

[linuxsh-cvs] CVS: linux/drivers/i2c/busses i2c-sh7343.c,1.1,1.2

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/drivers/i2c/busses
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv28269/drivers/i2c/busses

Modified Files:
	i2c-sh7343.c 
Log Message:
Clean up compile warning.



Index: i2c-sh7343.c
===================================================================
RCS file: /cvsroot/linuxsh/linux/drivers/i2c/busses/i2c-sh7343.c,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- i2c-sh7343.c	7 Aug 2006 10:31:50 -0000	1.1
+++ i2c-sh7343.c	7 Aug 2006 11:23:36 -0000	1.2
@@ -150,7 +150,7 @@
 }
 
 
-#if DEBUG
+#ifdef DEBUG
 static void dump_msg(struct i2c_msg	*msg)
 {
 	int		i;
@@ -620,7 +620,7 @@
 		if (!msg->len || !msg->buf)
 			continue;
 
-#if DEBUG
+#ifdef DEBUG
 		dump_msg(msg);
 #endif
 		if ((err = start_ch(ch_info, msg)))

[linuxsh-cvs] CVS: linux/arch/sh/configs se7343_defconfig,1.1,1.2

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh/configs
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv27741/arch/sh/configs

Modified Files:
	se7343_defconfig 
Log Message:
SolutionEngine 7343 MTD flash map.



Index: se7343_defconfig
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/configs/se7343_defconfig,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- se7343_defconfig	7 Aug 2006 11:17:45 -0000	1.1
+++ se7343_defconfig	7 Aug 2006 11:22:16 -0000	1.2
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
 # Linux kernel version: 2.6.17
-# Mon Aug  7 20:14:44 2006
+# Mon Aug  7 20:20:27 2006
 #
 CONFIG_SUPERH=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
@@ -409,6 +409,7 @@
 # CONFIG_MTD_COMPLEX_MAPPINGS is not set
 # CONFIG_MTD_PHYSMAP is not set
 # CONFIG_MTD_SOLUTIONENGINE is not set
+CONFIG_MTD_SE7343=y
 # CONFIG_MTD_PLATRAM is not set
 
 #

[linuxsh-cvs] CVS: linux/drivers/mtd/maps se7343.c, NONE, 1.1 Kconfig, 1.19, 1.20 Makefile, 1.17, 1.18

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/drivers/mtd/maps
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv27741/drivers/mtd/maps

Modified Files:
	Kconfig Makefile 
Added Files:
	se7343.c 
Log Message:
SolutionEngine 7343 MTD flash map.



--- NEW FILE: se7343.c ---
/*
 * linux/drivers/mtd/ms7343.c
 *
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/concat.h>
#include <linux/mtd/partitions.h>
#include <linux/config.h>
#include <linux/errno.h>

static struct map_info ms7343_flash_map[2] =
{
	{
		.name = "Bank 1",
		.phys = 0xa0000000,
		.size = (32 * 1024 * 1024),
		.bankwidth = 2,
	},
	{
		.name = "Bank 2",
		.phys = 0xb8000000,
		.size = (32 * 1024 * 1024),
		.bankwidth = 2,
	},
};

static struct mtd_partition ms7343_partitions[] =
{
	{
		.name = "U-Boot",
		.offset = 0,
		.size = (2 * 64 * 1024),
		.mask_flags = MTD_WRITEABLE,	/* Read-only */
	},
	{
		.name = "rootfs",
		.offset = MTDPART_OFS_APPEND,
		.size = MTDPART_SIZ_FULL,
	},
};

static struct mtd_info *flash_mtd[2], *concat;

static int __init init_ms7343_maps (void)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(ms7343_flash_map); i++) {
       		printk ("MS7343 flash device: %lx at %lx\n", 
				ms7343_flash_map[i].size, 
				ms7343_flash_map[i].phys);

		ms7343_flash_map[i].virt = ioremap (ms7343_flash_map[i].phys, 
						ms7343_flash_map[i].size);
		if (!ms7343_flash_map[i].virt) {
			printk ("Failed to ioremap\n");
			return -EIO;
		}

		simple_map_init (&ms7343_flash_map[i]);

		flash_mtd[i] = do_map_probe ("cfi_probe", &ms7343_flash_map[i]);
		if (!flash_mtd[i])
			return -ENXIO;
	}

	concat = mtd_concat_create(flash_mtd, 2, "SolutionEngine 7343 FLASH");
	if (concat == NULL) {
		map_destroy(flash_mtd[0]);
		map_destroy(flash_mtd[1]);
		return -ENXIO;
	}
	add_mtd_partitions (concat, ms7343_partitions, 
			ARRAY_SIZE(ms7343_partitions));

	return 0;
}

static void __exit cleanup_ms7343_maps (void)
{
	del_mtd_partitions(concat);
	mtd_concat_destroy(concat);
	map_destroy(flash_mtd[0]);
	map_destroy(flash_mtd[1]);
}

module_init(init_ms7343_maps);
module_exit(cleanup_ms7343_maps);

MODULE_DESCRIPTION("MTD map driver for MS7343 development board");
MODULE_LICENSE("GPL");

Index: Kconfig
===================================================================
RCS file: /cvsroot/linuxsh/linux/drivers/mtd/maps/Kconfig,v
retrieving revision 1.19
retrieving revision 1.20
diff -u -d -r1.19 -r1.20
--- Kconfig	7 Aug 2006 08:14:03 -0000	1.19
+++ Kconfig	7 Aug 2006 11:22:16 -0000	1.20
@@ -415,12 +415,12 @@
 	  similar boards. Say 'Y' if you are building a kernel for such a board.
 
 config MTD_SUPERH_RESERVE
-    hex "Default reserved Flash size"
-    depends on MTD_SOLUTIONENGINE
-    default 300000
-    help
-      The reserved memory is used by kernel and ram disk themselves. It's 
-      starting from 0.
+	hex "Default reserved Flash size"
+	depends on MTD_SOLUTIONENGINE
+	default 300000
+	help
+	  The reserved memory is used by kernel and ram disk themselves. It's 
+	  starting from 0.
 
 config MTD_MPC1211
 	tristate "CFI Flash device mapped on Interface MPC-1211"
@@ -448,6 +448,12 @@
 	help
 	  Enable flash support for the Renesas SH7710 VoIP Gateway.
 
+config MTD_SE7343
+	bool "CFI Flash on the Renesas SE7343 platform"
+	depends on MTD_CFI && SH_7343_SOLUTION_ENGINE
+	help
+	  Enable flash support for the Renesas SolutionEngine 7343 board.
+
 config MTD_ARM_INTEGRATOR
 	tristate "CFI Flash device mapped on ARM Integrator/P720T"
 	depends on ARM && MTD_CFI

Index: Makefile
===================================================================
RCS file: /cvsroot/linuxsh/linux/drivers/mtd/maps/Makefile,v
retrieving revision 1.17
retrieving revision 1.18
diff -u -d -r1.17 -r1.18
--- Makefile	7 Aug 2006 08:14:03 -0000	1.17
+++ Makefile	7 Aug 2006 11:22:16 -0000	1.18
@@ -74,3 +74,4 @@
 obj-$(CONFIG_MTD_MTX1)		+= mtx-1_flash.o
 obj-$(CONFIG_MTD_TQM834x)	+= tqm834x.o
 obj-$(CONFIG_MTD_SH7710VOIPGW)	+= sh7710voipgw.o
+obj-$(CONFIG_MTD_SE7343)	+= se7343.o

[linuxsh-cvs] CVS: linux/arch/sh/configs se7343_defconfig, NONE, 1.1

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh/configs
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv25423/arch/sh/configs

Added Files:
	se7343_defconfig 
Log Message:
Add Solution Engine 7343 board support.



--- NEW FILE: se7343_defconfig ---
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.17
# Mon Aug  7 20:14:44 2006
#
CONFIG_SUPERH=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_CALIBRATE_DELAY=y

#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32

#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_SYSCTL=y
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
# CONFIG_RELAY is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_UID16=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
# CONFIG_FUTEX is not set
# CONFIG_EPOLL is not set
# CONFIG_SHMEM is not set
CONFIG_SLAB=y
CONFIG_TINY_SHMEM=y
CONFIG_BASE_SMALL=0
# CONFIG_SLOB is not set
CONFIG_OBSOLETE_INTERMODULE=y

#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
# CONFIG_KMOD is not set

#
# Block layer
#
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set

#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_AS is not set
CONFIG_IOSCHED_DEADLINE=y
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_DEFAULT_AS is not set
CONFIG_DEFAULT_DEADLINE=y
# CONFIG_DEFAULT_CFQ is not set
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="deadline"

#
# System type
#
CONFIG_SOLUTION_ENGINE=y
# CONFIG_SH_SOLUTION_ENGINE is not set
# CONFIG_SH_7751_SOLUTION_ENGINE is not set
# CONFIG_SH_7300_SOLUTION_ENGINE is not set
CONFIG_SH_7343_SOLUTION_ENGINE=y
# CONFIG_SH_73180_SOLUTION_ENGINE is not set
# CONFIG_SH_7751_SYSTEMH is not set
# CONFIG_SH_HP6XX is not set
# CONFIG_SH_EC3104 is not set
# CONFIG_SH_SATURN is not set
# CONFIG_SH_DREAMCAST is not set
# CONFIG_SH_BIGSUR is not set
# CONFIG_SH_MPC1211 is not set
# CONFIG_SH_SH03 is not set
# CONFIG_SH_SECUREEDGE5410 is not set
# CONFIG_SH_HS7751RVOIP is not set
# CONFIG_SH_7710VOIPGW is not set
# CONFIG_SH_RTS7751R2D is not set
# CONFIG_SH_R7780RP is not set
# CONFIG_SH_EDOSK7705 is not set
# CONFIG_SH_SH4202_MICRODEV is not set
# CONFIG_SH_LANDISK is not set
# CONFIG_SH_TITAN is not set
# CONFIG_SH_SHMIN is not set
# CONFIG_SH_UNKNOWN is not set

#
# Processor selection
#
CONFIG_CPU_SH4=y
CONFIG_CPU_SH4A=y

#
# SH-2 Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7604 is not set

#
# SH-3 Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7300 is not set
# CONFIG_CPU_SUBTYPE_SH7705 is not set
# CONFIG_CPU_SUBTYPE_SH7706 is not set
# CONFIG_CPU_SUBTYPE_SH7707 is not set
# CONFIG_CPU_SUBTYPE_SH7708 is not set
# CONFIG_CPU_SUBTYPE_SH7709 is not set
# CONFIG_CPU_SUBTYPE_SH7710 is not set

#
# SH-4 Processor Support
#
# CONFIG_CPU_SUBTYPE_SH7750 is not set
# CONFIG_CPU_SUBTYPE_SH7091 is not set
# CONFIG_CPU_SUBTYPE_SH7750R is not set
# CONFIG_CPU_SUBTYPE_SH7750S is not set
# CONFIG_CPU_SUBTYPE_SH7751 is not set
# CONFIG_CPU_SUBTYPE_SH7751R is not set
# CONFIG_CPU_SUBTYPE_SH7760 is not set
# CONFIG_CPU_SUBTYPE_SH4_202 is not set

#
# ST40 Processor Support
#
# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
# CONFIG_CPU_SUBTYPE_ST40GX1 is not set

#
# SH-4A Processor Support
#
# CONFIG_CPU_SUBTYPE_SH73180 is not set
CONFIG_CPU_SUBTYPE_SH7343=y
# CONFIG_CPU_SUBTYPE_SH7770 is not set
# CONFIG_CPU_SUBTYPE_SH7780 is not set

#
# Memory management options
#
CONFIG_MMU=y
CONFIG_PAGE_OFFSET=0x80000000
CONFIG_MEMORY_START=0x0c000000
CONFIG_MEMORY_SIZE=0x01000000
CONFIG_32BIT=y
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
# CONFIG_SPARSEMEM_MANUAL is not set
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SPLIT_PTLOCK_CPUS=4

#
# Cache configuration
#
# CONFIG_SH_DIRECT_MAPPED is not set
# CONFIG_SH_WRITETHROUGH is not set
# CONFIG_SH_OCRAM is not set

#
# Processor features
#
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_SH_FPU is not set
# CONFIG_SH_FPU_EMU is not set
CONFIG_SH_DSP=y
# CONFIG_SH_STORE_QUEUES is not set
CONFIG_CPU_HAS_INTEVT=y
CONFIG_CPU_HAS_SR_RB=y

#
# Timer support
#
CONFIG_SH_TMU=y
CONFIG_SH_PCLK_FREQ=27000000

#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set

#
# DMA support
#
# CONFIG_SH_DMA is not set

#
# Companion Chips
#
# CONFIG_HD6446X_SERIES is not set
CONFIG_HEARTBEAT=y

#
# Kernel features
#
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
# CONFIG_KEXEC is not set
# CONFIG_SMP is not set
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set

#
# Boot options
#
CONFIG_ZERO_PAGE_OFFSET=0x00001000
CONFIG_BOOT_LINK_OFFSET=0x00800000
# CONFIG_UBC_WAKEUP is not set
# CONFIG_CMDLINE_BOOL is not set

#
# Bus options
#
# CONFIG_PCI is not set

#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set

#
# PCI Hotplug Support
#

#
# Executable file formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_FLAT is not set
# CONFIG_BINFMT_MISC is not set

#
# Power management options (EXPERIMENTAL)
#
# CONFIG_PM is not set

#
# Networking
#
CONFIG_NET=y

#
# Networking options
#
# CONFIG_NETDEBUG is not set
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_ARPD is not set
CONFIG_SYN_COOKIES=y
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
# CONFIG_INET_DIAG is not set
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_BIC=y
# CONFIG_IPV6 is not set
# CONFIG_INET6_XFRM_TUNNEL is not set
# CONFIG_INET6_TUNNEL is not set
# CONFIG_NETFILTER is not set

#
# DCCP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_DCCP is not set

#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set

#
# TIPC Configuration (EXPERIMENTAL)
#
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set

#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set

#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_IEEE80211 is not set

#
# Device Drivers
#

#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y

#
# Connector - unified userspace <-> kernelspace linker
#
# CONFIG_CONNECTOR is not set

#
# Memory Technology Devices (MTD)
#
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
CONFIG_MTD_CONCAT=y
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_CMDLINE_PARTS is not set

#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
# CONFIG_RFD_FTL is not set

#
# RAM/ROM/Flash chip drivers
#
CONFIG_MTD_CFI=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
CONFIG_MTD_MAP_BANK_WIDTH_2=y
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CFI_AMDSTD=y
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_RAM=y
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
# CONFIG_MTD_OBSOLETE_CHIPS is not set

#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PHYSMAP is not set
# CONFIG_MTD_SOLUTIONENGINE is not set
# CONFIG_MTD_PLATRAM is not set

#
# Self-contained MTD device drivers
#
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_BLOCK2MTD is not set

#
# Disk-On-Chip Device Drivers
#
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set

#
# NAND Flash Device Drivers
#
# CONFIG_MTD_NAND is not set

#
# OneNAND Flash Device Drivers
#
# CONFIG_MTD_ONENAND is not set

#
# Parallel port support
#
# CONFIG_PARPORT is not set

#
# Plug and Play support
#

#
# Block devices
#
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_BLK_DEV_INITRD is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set

#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set

#
# SCSI device support
#
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set

#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set

#
# Fusion MPT device support
#
# CONFIG_FUSION is not set

#
# IEEE 1394 (FireWire) support
#

#
# I2O device support
#

#
# Network device support
#
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set

#
# PHY device support
#
# CONFIG_PHYLIB is not set

#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_STNIC is not set
CONFIG_SMC91X=y
# CONFIG_NE2000 is not set

#
# Ethernet (1000 Mbit)
#

#
# Ethernet (10000 Mbit)
#

#
# Token Ring devices
#

#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set

#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set

#
# ISDN subsystem
#
# CONFIG_ISDN is not set

#
# Telephony Support
#
# CONFIG_PHONE is not set

#
# Input device support
#
CONFIG_INPUT=y

#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
# CONFIG_INPUT_TSDEV is not set
# CONFIG_INPUT_EVDEV is not set
# CONFIG_INPUT_EVBUG is not set

#
# Input Device Drivers
#
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set

#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set

#
# Character devices
#
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_SERIAL_NONSTANDARD is not set

#
# Serial drivers
#
# CONFIG_SERIAL_8250 is not set

#
# Non-8250 serial port support
#
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=2
CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_UNIX98_PTYS is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256

#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set

#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_RTC is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set

#
# Ftape, the floppy tape device driver
#
# CONFIG_RAW_DRIVER is not set

#
# TPM devices
#
# CONFIG_TCG_TPM is not set
# CONFIG_TELCLOCK is not set

#
# I2C support
#
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y

#
# I2C Algorithms
#
# CONFIG_I2C_ALGOBIT is not set
# CONFIG_I2C_ALGOPCF is not set
# CONFIG_I2C_ALGOPCA is not set

#
# I2C Hardware Bus support
#
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_STUB is not set
# CONFIG_I2C_PCA_ISA is not set
CONFIG_I2C_SH7343=y

#
# Miscellaneous I2C Chip support
#
# CONFIG_SENSORS_DS1337 is not set
# CONFIG_SENSORS_DS1374 is not set
# CONFIG_SENSORS_EEPROM is not set
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_SENSORS_PCA9539 is not set
# CONFIG_SENSORS_PCF8591 is not set
# CONFIG_SENSORS_MAX6875 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set

#
# SPI support
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set

#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set

#
# Hardware Monitoring support
#
# CONFIG_HWMON is not set
# CONFIG_HWMON_VID is not set

#
# Misc devices
#

#
# Multimedia devices
#
CONFIG_VIDEO_DEV=y
CONFIG_VIDEO_V4L1=y
CONFIG_VIDEO_V4L1_COMPAT=y
CONFIG_VIDEO_V4L2=y

#
# Video Capture Adapters
#

#
# Video Capture Adapters
#
# CONFIG_VIDEO_ADV_DEBUG is not set
# CONFIG_VIDEO_VIVI is not set
# CONFIG_VIDEO_CPIA is not set
# CONFIG_VIDEO_SAA5246A is not set
# CONFIG_VIDEO_SAA5249 is not set
# CONFIG_TUNER_3036 is not set
# CONFIG_VIDEO_OVCAMCHIP is not set

#
# Encoders and Decoders
#
# CONFIG_VIDEO_MSP3400 is not set
# CONFIG_VIDEO_CS53L32A is not set
# CONFIG_VIDEO_WM8775 is not set
# CONFIG_VIDEO_WM8739 is not set
# CONFIG_VIDEO_CX25840 is not set
# CONFIG_VIDEO_SAA711X is not set
# CONFIG_VIDEO_SAA7127 is not set
# CONFIG_VIDEO_UPD64031A is not set
# CONFIG_VIDEO_UPD64083 is not set

#
# Radio Adapters
#
# CONFIG_RADIO_MAESTRO is not set

#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set

#
# Graphics support
#
CONFIG_FB=y
# CONFIG_FB_CFB_FILLRECT is not set
# CONFIG_FB_CFB_COPYAREA is not set
# CONFIG_FB_CFB_IMAGEBLIT is not set
# CONFIG_FB_MACMODES is not set
CONFIG_FB_FIRMWARE_EDID=y
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
# CONFIG_FB_EPSON1355 is not set
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_VIRTUAL is not set

#
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE is not set

#
# Logo configuration
#
# CONFIG_LOGO is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set

#
# Sound
#
CONFIG_SOUND=y

#
# Advanced Linux Sound Architecture
#
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
CONFIG_SND_SEQUENCER=y
# CONFIG_SND_SEQ_DUMMY is not set
CONFIG_SND_OSSEMUL=y
# CONFIG_SND_MIXER_OSS is not set
CONFIG_SND_PCM_OSS=y
CONFIG_SND_PCM_OSS_PLUGINS=y
# CONFIG_SND_SEQUENCER_OSS is not set
# CONFIG_SND_DYNAMIC_MINORS is not set
CONFIG_SND_SUPPORT_OLD_API=y
CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set

#
# Generic devices
#
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_VIRMIDI is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set

#
# SuperH devices
#
CONFIG_SH7343_SIU=m
CONFIG_AK4537_CODEC=y

#
# Open Sound System
#
# CONFIG_SOUND_PRIME is not set

#
# USB support
#
# CONFIG_USB_ARCH_HAS_HCD is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
# CONFIG_USB_ARCH_HAS_EHCI is not set

#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
#

#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set

#
# MMC/SD Card support
#
# CONFIG_MMC is not set

#
# LED devices
#
# CONFIG_NEW_LEDS is not set

#
# LED drivers
#

#
# LED Triggers
#

#
# InfiniBand support
#

#
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
#

#
# Real Time Clock
#
# CONFIG_RTC_CLASS is not set

#
# File systems
#
# CONFIG_EXT2_FS is not set
# CONFIG_EXT3_FS is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_INOTIFY is not set
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set

#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set

#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set

#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
# CONFIG_PROC_KCORE is not set
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_HUGETLBFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
# CONFIG_CONFIGFS_FS is not set

#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_JFFS_FS is not set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
CONFIG_JFFS2_FS_WRITEBUFFER=y
# CONFIG_JFFS2_SUMMARY is not set
# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
CONFIG_JFFS2_ZLIB=y
CONFIG_JFFS2_RTIME=y
# CONFIG_JFFS2_RUBIN is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set

#
# Network File Systems
#
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
# CONFIG_NFSD_TCP is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_EXPORTFS=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set

#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y

#
# Native Language Support
#
# CONFIG_NLS is not set

#
# Profiling support
#
# CONFIG_PROFILING is not set

#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_DEBUG_KERNEL is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_SH_STANDARD_BIOS is not set
# CONFIG_EARLY_SCIF_CONSOLE is not set
# CONFIG_KGDB is not set

#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set

#
# Cryptographic options
#
# CONFIG_CRYPTO is not set

#
# Hardware crypto devices
#

#
# Library routines
#
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y

[linuxsh-cvs] CVS: linux/arch/sh/boards/se/7343 Makefile, NONE, 1.1 io.c, NONE, 1.1 irq.c, NONE, 1.1 led.c, NONE, 1.1 setup.c, NONE, 1.1

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh/boards/se/7343
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv25423/arch/sh/boards/se/7343

Added Files:
	Makefile io.c irq.c led.c setup.c 
Log Message:
Add Solution Engine 7343 board support.



--- NEW FILE: Makefile ---
#
# Makefile for the 7343 SolutionEngine specific parts of the kernel
#

obj-y	 := setup.o io.o irq.o

obj-$(CONFIG_HEARTBEAT) += led.o

--- NEW FILE: io.c ---
/*
 * arch/sh/boards/se/7343/io.c
 *
 * I/O routine for SH-Mobile3AS 7343 SolutionEngine.
 *
 */

#include <linux/config.h>
#include <linux/kernel.h>
#include <asm/io.h>
#include <asm/mach/se7343.h>

#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)

struct iop {
	unsigned long start, end;
	unsigned long base;
	struct iop *(*check) (struct iop * p, unsigned long port);
	unsigned char (*inb) (struct iop * p, unsigned long port);
	unsigned short (*inw) (struct iop * p, unsigned long port);
	void (*outb) (struct iop * p, unsigned char value, unsigned long port);
	void (*outw) (struct iop * p, unsigned short value, unsigned long port);
};

struct iop *
simple_check(struct iop *p, unsigned long port)
{
	static int count;
	
	if (count < 100)
		count++;

	port &= 0xFFFF;

	if ((p->start <= port) && (port <= p->end))
		return p;
	else
		badio(check, port);
}

struct iop *
ide_check(struct iop *p, unsigned long port)
{
	if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
		return p;
	return NULL;
}

unsigned char
simple_inb(struct iop *p, unsigned long port)
{
	return *(unsigned char *) (p->base + port);
}

unsigned short
simple_inw(struct iop *p, unsigned long port)
{
	return *(unsigned short *) (p->base + port);
}

void
simple_outb(struct iop *p, unsigned char value, unsigned long port)
{
	*(unsigned char *) (p->base + port) = value;
}

void
simple_outw(struct iop *p, unsigned short value, unsigned long port)
{
	*(unsigned short *) (p->base + port) = value;
}

unsigned char
pcc_inb(struct iop *p, unsigned long port)
{
	unsigned long addr = p->base + port + 0x40000;
	unsigned long v;

	if (port & 1)
		addr += 0x00400000;
	v = *(volatile unsigned char *) addr;
	return v;
}

void
pcc_outb(struct iop *p, unsigned char value, unsigned long port)
{
	unsigned long addr = p->base + port + 0x40000;

	if (port & 1)
		addr += 0x00400000;
	*(volatile unsigned char *) addr = value;
}

unsigned char
bad_inb(struct iop *p, unsigned long port)
{
	badio(inb, port);
}

void
bad_outb(struct iop *p, unsigned char value, unsigned long port)
{
	badio(inw, port);
}

#ifdef CONFIG_SMC91X
/* MSTLANEX01 LAN at 0xb400:0000 */
static struct iop laniop = {
	.start = 0x00,
	.end = 0x0F,
	.base = 0x04000000,
	.check = simple_check,
	.inb = simple_inb,
	.inw = simple_inw,
	.outb = simple_outb,
	.outw = simple_outw,
};
#endif

#ifdef CONFIG_NE2000
/* NE2000 pc card NIC */
static struct iop neiop = {
	.start = 0x280,
	.end = 0x29f,
	.base = 0xb0600000 + 0x80,	/* soft 0x280 -> hard 0x300 */
	.check = simple_check,
	.inb = pcc_inb,
	.inw = simple_inw,
	.outb = pcc_outb,
	.outw = simple_outw,
};
#endif

#ifdef CONFIG_IDE
/* CF in CF slot */
static struct iop cfiop = {
	.base = 0xb0600000,
	.check = ide_check,
	.inb = pcc_inb,
	.inw = simple_inw,
	.outb = pcc_outb,
	.outw = simple_outw,
};
#endif

static __inline__ struct iop *
port2iop(unsigned long port)
{
	if (0) ;
#if defined(CONFIG_SMC91X)
	else if (laniop.check(&laniop, port))
		return &laniop;
#endif
#if defined(CONFIG_NE2000)
	else if (neiop.check(&neiop, port))
		return &neiop;
#endif
#if defined(CONFIG_IDE)
	else if (cfiop.check(&cfiop, port))
		return &cfiop;
#endif
	else
		return NULL;
}

static inline void
delay(void)
{
	ctrl_inw(0xac000000);
	ctrl_inw(0xac000000);
}

unsigned char
sh7343se_inb(unsigned long port)
{
	struct iop *p = port2iop(port);
	return (p->inb) (p, port);
}

unsigned char
sh7343se_inb_p(unsigned long port)
{
	unsigned char v = sh7343se_inb(port);
	delay();
	return v;
}

unsigned short
sh7343se_inw(unsigned long port)
{
	struct iop *p = port2iop(port);
	return (p->inw) (p, port);
}

unsigned int
sh7343se_inl(unsigned long port)
{
	badio(inl, port);
}

void
sh7343se_outb(unsigned char value, unsigned long port)
{
	struct iop *p = port2iop(port);
	(p->outb) (p, value, port);
}

void
sh7343se_outb_p(unsigned char value, unsigned long port)
{
	sh7343se_outb(value, port);
	delay();
}

void
sh7343se_outw(unsigned short value, unsigned long port)
{
	struct iop *p = port2iop(port);
	(p->outw) (p, value, port);
}

void
sh7343se_outl(unsigned int value, unsigned long port)
{
	badio(outl, port);
}

void
sh7343se_insb(unsigned long port, void *addr, unsigned long count)
{
	unsigned char *a = addr;
	struct iop *p = port2iop(port);
	while (count--)
		*a++ = (p->inb) (p, port);
}

void
sh7343se_insw(unsigned long port, void *addr, unsigned long count)
{
	unsigned short *a = addr;
	struct iop *p = port2iop(port);
	while (count--)
		*a++ = (p->inw) (p, port);
}

void
sh7343se_insl(unsigned long port, void *addr, unsigned long count)
{
	badio(insl, port);
}

void
sh7343se_outsb(unsigned long port, const void *addr, unsigned long count)
{
	unsigned char *a = (unsigned char *) addr;
	struct iop *p = port2iop(port);
	while (count--)
		(p->outb) (p, *a++, port);
}

void
sh7343se_outsw(unsigned long port, const void *addr, unsigned long count)
{
	unsigned short *a = (unsigned short *) addr;
	struct iop *p = port2iop(port);
	while (count--)
		(p->outw) (p, *a++, port);
}

void
sh7343se_outsl(unsigned long port, const void *addr, unsigned long count)
{
	badio(outsw, port);
}

--- NEW FILE: irq.c ---
/*
 * arch/sh/boards/se/7343/irq.c
 *
 */

#include <linux/config.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/mach/se7343.h>

static void
disable_intreq_irq(unsigned int irq)
{
	int bit = irq - OFFCHIP_IRQ_BASE;
	u16 val;

	val = ctrl_inw(PA_CPLD_IMSK);
	val |= 1 << bit;
	ctrl_outw(val, PA_CPLD_IMSK);
}

static void
enable_intreq_irq(unsigned int irq)
{
	int bit = irq - OFFCHIP_IRQ_BASE;
	u16 val;

	val = ctrl_inw(PA_CPLD_IMSK);
	val &= ~(1 << bit);
	ctrl_outw(val, PA_CPLD_IMSK);
}

static void
mask_and_ack_intreq_irq(unsigned int irq)
{
	disable_intreq_irq(irq);
}

static unsigned int
startup_intreq_irq(unsigned int irq)
{
	enable_intreq_irq(irq);
	return 0;
}

static void
shutdown_intreq_irq(unsigned int irq)
{
	disable_intreq_irq(irq);
}

static void
end_intreq_irq(unsigned int irq)
{
	if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
		enable_intreq_irq(irq);
}

static struct hw_interrupt_type intreq_irq_type = {
	.typename = "FPGA-IRQ",
	.startup = startup_intreq_irq,
	.shutdown = shutdown_intreq_irq,
	.enable = enable_intreq_irq,
	.disable = disable_intreq_irq,
	.ack = mask_and_ack_intreq_irq,
	.end = end_intreq_irq
};

static void
make_intreq_irq(unsigned int irq)
{
	disable_irq_nosync(irq);
	irq_desc[irq].handler = &intreq_irq_type;
	disable_intreq_irq(irq);
}

int
shmse_irq_demux(int irq)
{
	int bit;
	volatile u16 val;

	if (irq == IRQ5_IRQ) {
		/* Read status Register */
		val = ctrl_inw(PA_CPLD_ST);
		bit = ffs(val);
		if (bit != 0)
			return OFFCHIP_IRQ_BASE + bit - 1;
	}
	return irq;
}

/* IRQ5 is multiplexed between the following sources:
 * 1. PC Card socket
 * 2. Extension slot
 * 3. USB Controller
 * 4. Serial Controller
 *
 * We configure IRQ5 as a cascade IRQ.
 */
static struct irqaction irq5 = { no_action, 0, CPU_MASK_NONE, "IRQ5-cascade", 
				NULL, NULL};

/*
 * Initialize IRQ setting
 */
void __init
init_7343se_IRQ(void)
{
	/* Setup Multiplexed interrupts */
	ctrl_outw(8, PA_CPLD_MODESET);	/* Set all CPLD interrupts to active
					 * low.
					 */
	/* Mask all CPLD controller interrupts */
	ctrl_outw(0x0fff, PA_CPLD_IMSK);
	
	/* PC Card interrupts */
	make_intreq_irq(PC_IRQ0);
	make_intreq_irq(PC_IRQ1);
	make_intreq_irq(PC_IRQ2);
	make_intreq_irq(PC_IRQ3);

	/* Extension Slot Interrupts */
	make_intreq_irq(EXT_IRQ0);
	make_intreq_irq(EXT_IRQ1);
	make_intreq_irq(EXT_IRQ2);
	make_intreq_irq(EXT_IRQ3);

	/* USB Controller interrupts */
	make_intreq_irq(USB_IRQ0);
	make_intreq_irq(USB_IRQ1);

	/* Serial Controller interrupts */
	make_intreq_irq(UART_IRQ0);
	make_intreq_irq(UART_IRQ1);

	/* Setup all external interrupts to be active low */
	ctrl_outw(0xaaaa, INTC_ICR1);

	make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY);
	setup_irq(IRQ5_IRQ, &irq5);
	/* Set port control to use IRQ5 */
	*(u16 *)0xA4050108 &= ~0xc;

	make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
	make_ipr_irq(VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8);

	ctrl_outb(0x0f, INTC_IMCR5);	/* enable SCIF IRQ */

	make_ipr_irq(DMTE0_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
	make_ipr_irq(DMTE1_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
	make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
	make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
	make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
	make_ipr_irq(DMTE5_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);

	/* I2C block */
	make_ipr_irq(IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
	make_ipr_irq(IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
		     IIC0_PRIORITY);
	make_ipr_irq(IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
		     IIC0_PRIORITY);
	make_ipr_irq(IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);

	make_ipr_irq(IIC1_ALI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY);
	make_ipr_irq(IIC1_TACKI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS,
		     IIC1_PRIORITY);
	make_ipr_irq(IIC1_WAITI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS,
		     IIC1_PRIORITY);
	make_ipr_irq(IIC1_DTEI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY);

	/* SIOF */
	make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);

	/* SIU */
	make_ipr_irq(SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY);

	/* VIO interrupt */
	make_ipr_irq(CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
	make_ipr_irq(BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
	make_ipr_irq(VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);

	/*MFI interrupt*/

	make_ipr_irq(MFI_IRQ, MFI_IPR_ADDR, MFI_IPR_POS, MFI_PRIORITY);
	
	/* LCD controller */
	make_ipr_irq(LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY);
	ctrl_outw(0x2000, PA_MRSHPC + 0x0c);	/* mrshpc irq enable */
}

--- NEW FILE: led.c ---
/*
 * arch/sh/boards/se/7343/led.c
 *
 */

#include <linux/config.h>
#include <linux/sched.h>
#include <asm/mach/se7343.h>

/* Cycle the LED's in the clasic Knightrider/Sun pattern */
void heartbeat_7343se(void)
{
	static unsigned int cnt = 0, period = 0;
	volatile unsigned short *p = (volatile unsigned short *) PA_LED;
	static unsigned bit = 0, up = 1;

	cnt += 1;
	if (cnt < period) {
		return;
	}

	cnt = 0;

	/* Go through the points (roughly!):
	 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
	 */
	period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT)));

	if (up) {
		if (bit == 7) {
			bit--;
			up = 0;
		} else {
			bit++;
		}
	} else {
		if (bit == 0) {
			bit++;
			up = 1;
		} else {
			bit--;
		}
	}
	*p = 1 << (bit + LED_SHIFT);

}

--- NEW FILE: setup.c ---
#include <linux/config.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/machvec.h>
#include <asm/mach/se7343.h>
#include <asm/irq.h>

void heartbeat_7343se(void);
void init_7343se_IRQ(void);

static struct resource smc91x_resources[] = {
	[0] = {
		.start	= 0x10000000,
		.end	= 0x1000000F,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		/*
		 * shared with other devices via externel
		 * interrupt controller in FPGA...
		 */
		.start	= EXT_IRQ2,		
		.end	= EXT_IRQ2,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(smc91x_resources),
	.resource	= smc91x_resources,
};

static struct platform_device *smc91x_platform_devices[] __initdata = {
	&smc91x_device,
};

static int __init sh7343se_devices_setup(void)
{
	return platform_add_devices(smc91x_platform_devices,
				    ARRAY_SIZE(smc91x_platform_devices));
}

static void __init sh7343se_setup(char **cmdline_p)
{
	device_initcall(sh7343se_devices_setup);
}

/*
 * The Machine Vector
 */
struct sh_machine_vector mv_7343se __initmv = {
	.mv_name = "SolutionEngine 7343",
	.mv_setup = sh7343se_setup,
	.mv_nr_irqs = 108,
	.mv_inb = sh7343se_inb,
	.mv_inw = sh7343se_inw,
	.mv_inl = sh7343se_inl,
	.mv_outb = sh7343se_outb,
	.mv_outw = sh7343se_outw,
	.mv_outl = sh7343se_outl,

	.mv_inb_p = sh7343se_inb_p,
	.mv_inw_p = sh7343se_inw,
	.mv_inl_p = sh7343se_inl,
	.mv_outb_p = sh7343se_outb_p,
	.mv_outw_p = sh7343se_outw,
	.mv_outl_p = sh7343se_outl,

	.mv_insb = sh7343se_insb,
	.mv_insw = sh7343se_insw,
	.mv_insl = sh7343se_insl,
	.mv_outsb = sh7343se_outsb,
	.mv_outsw = sh7343se_outsw,
	.mv_outsl = sh7343se_outsl,

	.mv_init_irq = init_7343se_IRQ,
	.mv_irq_demux = shmse_irq_demux,
#ifdef CONFIG_HEARTBEAT
	.mv_heartbeat = heartbeat_7343se,
#endif
};
ALIAS_MV(7343se)

[linuxsh-cvs] CVS: linux/include/asm-sh se7343.h, NONE, 1.1 irq.h, 1.34, 1.35

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/include/asm-sh
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv25423/include/asm-sh

Modified Files:
	irq.h 
Added Files:
	se7343.h 
Log Message:
Add Solution Engine 7343 board support.



--- NEW FILE: se7343.h ---
#ifndef __ASM_SH_HITACHI_SE7343_H
#define __ASM_SH_HITACHI_SE7343_H

/*
 * include/asm-sh/se/se7343.h
 *
 * Copyright (C) 2003 Takashi Kusuda <kus...@hi...>
 *
 * SH-Mobile SolutionEngine 7343 support
 */

/* Box specific addresses.  */

/* Area 0 */
#define PA_ROM		0x00000000	/* EPROM */
#define PA_ROM_SIZE	0x00400000	/* EPROM size 4M byte(Actually 2MB) */
#define PA_FROM		0x00400000	/* Flash ROM */
#define PA_FROM_SIZE	0x00400000	/* Flash size 4M byte */
#define PA_SRAM		0x00800000	/* SRAM */
#define PA_FROM_SIZE	0x00400000	/* SRAM size 4M byte */
/* Area 1 */
#define PA_EXT1		0x04000000
#define PA_EXT1_SIZE	0x04000000
/* Area 2 */
#define PA_EXT2		0x08000000
#define PA_EXT2_SIZE	0x04000000
/* Area 3 */
#define PA_SDRAM	0x0c000000
#define PA_SDRAM_SIZE	0x04000000
/* Area 4 */
#define PA_PCIC		0x10000000	/* MR-SHPC-01 PCMCIA */
#define PA_MRSHPC       0xb03fffe0      /* MR-SHPC-01 PCMCIA controller */
#define PA_MRSHPC_MW1   0xb0400000      /* MR-SHPC-01 memory window base */
#define PA_MRSHPC_MW2   0xb0500000      /* MR-SHPC-01 attribute window base */
#define PA_MRSHPC_IO    0xb0600000      /* MR-SHPC-01 I/O window base */
#define MRSHPC_OPTION   (PA_MRSHPC + 6)
#define MRSHPC_CSR      (PA_MRSHPC + 8)
#define MRSHPC_ISR      (PA_MRSHPC + 10)
#define MRSHPC_ICR      (PA_MRSHPC + 12)
#define MRSHPC_CPWCR    (PA_MRSHPC + 14)
#define MRSHPC_MW0CR1   (PA_MRSHPC + 16)
#define MRSHPC_MW1CR1   (PA_MRSHPC + 18)
#define MRSHPC_IOWCR1   (PA_MRSHPC + 20)
#define MRSHPC_MW0CR2   (PA_MRSHPC + 22)
#define MRSHPC_MW1CR2   (PA_MRSHPC + 24)
#define MRSHPC_IOWCR2   (PA_MRSHPC + 26)
#define MRSHPC_CDCR     (PA_MRSHPC + 28)
#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
#define PA_LED		0xb0C00000	/* LED */
#define LED_SHIFT       0
#define PA_DIPSW	0xb0900000	/* Dip switch 31 */
#define PA_CPLD_MODESET	0xb1400004	/* CPLD Mode set register */
#define PA_CPLD_ST	0xb1400008	/* CPLD Interrupt status register */
#define PA_CPLD_IMSK	0xb140000a	/* CPLD Interrupt mask register */
/* Area 5 */
#define PA_EXT5		0x14000000
#define PA_EXT5_SIZE	0x04000000
/* Area 6 */
#define PA_LCD1		0xb8000000
#define PA_LCD2		0xb8800000

#define __IO_PREFIX	sh7343se
#include <asm/io_generic.h>

/* External Multiplexed interrupts */
#define PC_IRQ0		OFFCHIP_IRQ_BASE
#define PC_IRQ1		(PC_IRQ0 + 1)
#define PC_IRQ2		(PC_IRQ1 + 1)
#define PC_IRQ3		(PC_IRQ2 + 1)

#define EXT_IRQ0	(PC_IRQ3 + 1)
#define EXT_IRQ1	(EXT_IRQ0 + 1)
#define EXT_IRQ2	(EXT_IRQ1 + 1)
#define EXT_IRQ3	(EXT_IRQ2 + 1)

#define USB_IRQ0	(EXT_IRQ3 + 1)
#define USB_IRQ1	(USB_IRQ0 + 1)

#define UART_IRQ0	(USB_IRQ1 + 1)
#define UART_IRQ1	(UART_IRQ0 + 1)

#endif  /* __ASM_SH_HITACHI_SE7343_H */

Index: irq.h
===================================================================
RCS file: /cvsroot/linuxsh/linux/include/asm-sh/irq.h,v
retrieving revision 1.34
retrieving revision 1.35
diff -u -d -r1.34 -r1.35
--- irq.h	7 Aug 2006 09:47:14 -0000	1.34
+++ irq.h	7 Aug 2006 11:17:45 -0000	1.35
@@ -317,6 +317,8 @@
 # define OFFCHIP_NR_IRQS 4
 #elif defined(CONFIG_SH_R7780RP)
 # define OFFCHIP_NR_IRQS 16
+#elif defined(CONFIG_SH_7343_SOLUTION_ENGINE)
+# define OFFCHIP_NR_IRQS 12
 #elif defined(CONFIG_SH_UNKNOWN)
 # define OFFCHIP_NR_IRQS 16	/* Must also be last */
 #else

[linuxsh-cvs] CVS: linux/arch/sh/tools mach-types,1.19,1.20

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh/tools
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv25423/arch/sh/tools

Modified Files:
	mach-types 
Log Message:
Add Solution Engine 7343 board support.



Index: mach-types
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/tools/mach-types,v
retrieving revision 1.19
retrieving revision 1.20
diff -u -d -r1.19 -r1.20
--- mach-types	7 Aug 2006 08:15:49 -0000	1.19
+++ mach-types	7 Aug 2006 11:17:45 -0000	1.20
@@ -8,6 +8,7 @@
 SE			SH_SOLUTION_ENGINE
 7751SE			SH_7751_SOLUTION_ENGINE		
 7300SE			SH_7300_SOLUTION_ENGINE		
+7343SE			SH_7343_SOLUTION_ENGINE		
 73180SE			SH_73180_SOLUTION_ENGINE
 7751SYSTEMH		SH_7751_SYSTEMH
 HP6XX			SH_HP6XX

[linuxsh-cvs] CVS: linux/arch/sh Kconfig, 1.114, 1.115 Makefile, 1.73, 1.74

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv25423/arch/sh

Modified Files:
	Kconfig Makefile 
Log Message:
Add Solution Engine 7343 board support.



Index: Kconfig
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/Kconfig,v
retrieving revision 1.114
retrieving revision 1.115
diff -u -d -r1.114 -r1.115
--- Kconfig	7 Aug 2006 09:47:14 -0000	1.114
+++ Kconfig	7 Aug 2006 11:17:45 -0000	1.115
@@ -51,18 +51,23 @@
 
 menu "System type"
 
+config SOLUTION_ENGINE
+	bool
+
 choice
 	prompt "SuperH system type"
 	default SH_UNKNOWN
 
 config SH_SOLUTION_ENGINE
 	bool "SolutionEngine"
+	select SOLUTION_ENGINE
 	help
 	  Select SolutionEngine if configuring for a Hitachi SH7709
 	  or SH7750 evaluation board.
 
 config SH_7751_SOLUTION_ENGINE
 	bool "SolutionEngine7751"
+	select SOLUTION_ENGINE
 	select CPU_SUBTYPE_SH7751
 	help
 	  Select 7751 SolutionEngine if configuring for a Hitachi SH7751
@@ -70,17 +75,27 @@
 
 config SH_7300_SOLUTION_ENGINE
 	bool "SolutionEngine7300"
+	select SOLUTION_ENGINE
 	select CPU_SUBTYPE_SH7300
 	help
-	  Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V)
-	  evaluation board.
+	  Select 7300 SolutionEngine if configuring for a Hitachi
+	  SH7300(SH-Mobile V) evaluation board.
+
+config SH_7343_SOLUTION_ENGINE
+	bool "SolutionEngine7343"
+	select SOLUTION_ENGINE
+	select CPU_SUBTYPE_SH7343
+	help
+	  Select 7343 SolutionEngine if configuring for a Hitachi
+	  SH7343 (SH-Mobile 3AS) evaluation board.
 
 config SH_73180_SOLUTION_ENGINE
        bool "SolutionEngine73180"
-       select CPU_SUBTYPE_SH73180
-       help
-         Select 73180 SolutionEngine if configuring for a Hitachi SH73180(SH-Mobile 3)
-         evaluation board.
+	select SOLUTION_ENGINE
+	select CPU_SUBTYPE_SH73180
+	help
+	  Select 73180 SolutionEngine if configuring for a Hitachi
+	  SH73180(SH-Mobile 3) evaluation board.
 
 config SH_7751_SYSTEMH
 	bool "SystemH7751R"
@@ -395,9 +410,7 @@
 config HEARTBEAT
 	bool "Heartbeat LED"
 	depends on SH_MPC1211 || SH_SH03 || \
-		   SH_BIGSUR || \
-		   SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || \
-		   SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || \
+		   SH_BIGSUR || SOLUTION_ENGINE || \
 		   SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK
 	help
 	  Use the power-on LED on your machine as a load meter.  The exact
@@ -432,10 +445,6 @@
 	  support.  As of this writing the exact hardware interface is
 	  strongly in flux, so no good recommendation can be made.
 
-config PREEMPT
-	bool "Preemptible Kernel (EXPERIMENTAL)"
-	depends on EXPERIMENTAL
-
 config SMP
 	bool "Symmetric multi-processing support"
 	---help---

Index: Makefile
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/Makefile,v
retrieving revision 1.73
retrieving revision 1.74
diff -u -d -r1.73 -r1.74
--- Makefile	7 Aug 2006 08:14:02 -0000	1.73
+++ Makefile	7 Aug 2006 11:17:45 -0000	1.74
@@ -85,6 +85,7 @@
 machdir-$(CONFIG_SH_SOLUTION_ENGINE)		:= se/770x
 machdir-$(CONFIG_SH_7751_SOLUTION_ENGINE)	:= se/7751
 machdir-$(CONFIG_SH_7300_SOLUTION_ENGINE)	:= se/7300
+machdir-$(CONFIG_SH_7343_SOLUTION_ENGINE)	:= se/7343
 machdir-$(CONFIG_SH_73180_SOLUTION_ENGINE)	:= se/73180
 machdir-$(CONFIG_SH_HP6XX)			:= hp6xx
 machdir-$(CONFIG_SH_EC3104)			:= ec3104

[linuxsh-cvs] CVS: linux/arch/sh/boards/se/7343 - New directory

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh/boards/se/7343
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv12562/arch/sh/boards/se/7343

Log Message:
Directory /cvsroot/linuxsh/linux/arch/sh/boards/se/7343 added to the repository

[linuxsh-cvs] CVS: linux/sound/sh ak4537_codec.c, NONE, 1.1 siu_sh7343.h, NONE, 1.1 siu_sh7343_coef.c, NONE, 1.1 siu_sh7343_int.c, NONE, 1.1 siu_sh7343_main.c, NONE, 1.1 siu_sh7343_spbpro.c, NONE, 1.1 Kconfig, 1.2, 1.3 Makefile, 1.1, 1.2

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/sound/sh
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv10942/sound/sh

Modified Files:
	Kconfig Makefile 
Added Files:
	ak4537_codec.c siu_sh7343.h siu_sh7343_coef.c siu_sh7343_int.c 
	siu_sh7343_main.c siu_sh7343_spbpro.c 
Log Message:
SH7343 SIU support.



--- NEW FILE: ak4537_codec.c ---
/*
    siu-sh7343.c - Alsa driver for Renesas' SH7343 SIU peripheral.

    Copyright (c) 2006 Carlos Munoz <ca...@ke...>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/


#include <linux/module.h>
#include <linux/i2c.h>
#include <linux/delay.h>

#define OUT16(addr, val)	(*((volatile u_int16_t *)(addr)) = (val))
#define IN16(addr)		(*((volatile u_int16_t *)(addr)))
#define GENERAL_PURPOSE_REG	0xb1400002
#define CODEC_RESET		0x0100

#define AK4537_I2C_ADDR		0x0010


extern int i2c_sh7343_xfer_mod_poll(int			ch,
				    struct i2c_msg	*msgs,
				    int			num);

int ak4537_codec_start(int		master,
		       u_int32_t	rate)
{
	struct i2c_msg	msg;
	int		rc = 0;
	u_int8_t	buf[3];

	/* Unreset the codec (reset is active low) */
	OUT16(GENERAL_PURPOSE_REG, IN16(GENERAL_PURPOSE_REG) | CODEC_RESET);

	msg.addr = AK4537_I2C_ADDR;
	msg.flags = 0;
	msg.buf = buf;

	/* Power up VCOM block */
	buf[0] = 0x00;			/* Register address */
	buf[1] = 0x80;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* DATTC independent */
	buf[0] = 0x06;			/* Register address */
	buf[1] = 0x01;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* Mute on */
	buf[0] = 0x0c;			/* Register address */
	buf[1] = 0xff;			/* Register value */
	buf[2] = 0xff;			/* Next consecutive register value */
	msg.len = 3;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* DAC to headphone amp enabled */
	buf[0] = 0x03;			/* Register address */
	buf[1] = 0x83;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* Master 11.2896 MHz */
	buf[0] = 0x04;			/* Register address */
	buf[1] = master ? 0x41 : 0x45;	/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* Master clock input enable */
	buf[0] = 0x01;			/* Register address */
	buf[1] = 0x00;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* Must wait for the above commad to take effect */
	udelay(20);

	/* PLL mode on, Master clk enable */
	buf[0] = 0x01;			/* Register address */
	buf[1] = 0x20;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* Must wait for the above commad to take effect */
	udelay(4);

	/* Master clk output enable */
	buf[0] = 0x04;			/* Register address */
	buf[1] = master ? 0x49 : 0x4d;	/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* Sampling freq */
	buf[0] = 0x05;			/* Register address */
	switch (rate) {
	case 44100:
		buf[1] = 0x00;			/* 44.1 KHz */
		break;
	case 22050:
		buf[1] = 0x20;			/* 22.05 KHz */
		break;
	case 11025:
		buf[1] = 0x40;			/* 11.025 KHz */
		break;
	case 48000:
		buf[1] = 0x60;			/* 48 KHz */
		break;
	case 32000:
		buf[1] = 0x80;			/* 32 KHz */
		break;
	case 24000:
		buf[1] = 0xa0;			/* 24 KHz */
		break;
	case 16000:
		buf[1] = 0xc0;			/* 16 KHz */
		break;
	case 8000:
		buf[1] = 0xe0;			/* 8 KHz */
		break;
	}

	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* ALC1 on ADC */
	buf[0] = 0x07;			/* Register address */
	buf[1] = 0x05;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* ALC1 enable */
	buf[0] = 0x09;			/* Register address */
	buf[1] = 0x20;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* ADC Lch on, IPGA Lch on, VCOM on */
	buf[0] = 0x00;			/* Register address */
	buf[1] = 0x85;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* ADC Rch, IPGA Rch, LIN2/RIN2  on */
	buf[0] = 0x10;			/* Register address */
	buf[1] = 0x1d;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* DAC, PLL, Master clk input on */
	buf[0] = 0x01;			/* Register address */
	buf[1] = 0x21;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* HPR, HPL, DAC to headphone amp on */
	buf[0] = 0x03;			/* Register address */
	buf[1] = 0x80;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* DAC, HPR, HPL, master clk input on */
	buf[0] = 0x01;			/* Register address */
	buf[1] = 0x27;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* Must wait for the above commad to take effect */
	udelay(100);

	/* Mute off */
	buf[0] = 0x0c;			/* Register address */
	buf[1] = 0x00;			/* Register value */
	buf[2] = 0x00;			/* Next consucutive register value */
	msg.len = 3;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	return 0;

fail:
	printk(KERN_ERR "i2c_sh7343_xfer_mod_poll() failed err=%d\n", rc);
	return rc;
}


int ak4537_codec_stop(void)
{
	struct i2c_msg	msg;
	int		rc = 0;
	u_int8_t	buf[3];

	msg.addr = AK4537_I2C_ADDR;
	msg.flags = 0;
	msg.buf = buf;

	/* Mute on */
	buf[0] = 0x0c;			/* Register address */
	buf[1] = 0xff;			/* Register value */
	buf[2] = 0xff;			/* Next consecutive register value */
	msg.len = 3;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* PMHPL, PMHPR off */
	buf[0] = 0x01;			/* Register address */
	buf[1] = 0x01;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* Must wait for the above commad to take effect */
	udelay(200);

	/* HPL, HPR off */
	buf[0] = 0x03;			/* Register address */
	buf[1] = 0x83;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* PMDAC off */
	buf[0] = 0x01;			/* Register address */
	buf[1] = 0x00;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* PMMICL, PMADL off */
	buf[0] = 0x00;			/* Register address */
	buf[1] = 0x80;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* PMMICR, PMADR off */
	buf[0] = 0x10;			/* Register address */
	buf[1] = 0x00;			/* Register value */
	msg.len = 2;
	if ((rc = i2c_sh7343_xfer_mod_poll(1, &msg, 1)) != 1)
		goto fail;

	/* Reset the codec (reset is active low) */
	OUT16(GENERAL_PURPOSE_REG, IN16(GENERAL_PURPOSE_REG) & ~CODEC_RESET);

	return 0;

fail:
	printk(KERN_ERR "i2c_sh7343_xfer_mod_poll() failed err=%d\n", rc);
	return rc;
}

--- NEW FILE: siu_sh7343.h ---
/*
    siu-sh7343.h - Alsa driver for Renesas' SH7343 SIU peripheral.

    Copyright (c) 2006 Carlos Munoz <ca...@ke...>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/


#include <asm/semaphore.h>
#include <linux/interrupt.h>
#include <sound/driver.h>
#include <sound/core.h>
#include <sound/pcm.h>

#ifndef SIU_SH7343_H
#define SIU_SH7343_H


#define MAX_SIU_PORTS		3
#define SIU_PORTA		0		/* port A */
#define SIU_PORTB		1		/* port B */
#define SIU_PORTC		2		/* melody */
#define MAX_PCM_PORTS		1


typedef struct{
	u_int32_t	ab1a;	/* input FIFO address */
	u_int32_t	ab0a;	/* output FIFO address */
	u_int32_t	dir;	/* 0=the ather except CPUOUTPUT, 1=CPUINPUT */
	u_int32_t	event;	/* SPB program starting conditions */
	u_int32_t	stfifo;	/* STFIFO register setting value */
	u_int32_t	trdat;	/* TRDAT register setting value */
} T_SPBPAR;

/* SIU driver dynamic information */
typedef struct {
	u_int32_t	stat;		/* SIU driver object status */
	u_int8_t	open_mode;	/* SIU driver open-mode */
	u_int8_t	rw_flg;		/* stream-data transfer status */
	int32_t		ich;		/* input DMA channel */
	int32_t		och;		/* output DMA channel */
	char		i_int_desc[16];	/* Interrupt description */
	char		o_int_desc[16];	/* Interrupt description */
} T_SIU;

typedef struct{
	u_int32_t	undruncnt;	/* buf under-run xfer restart cnt */
	u_int32_t	undctr;		/* buf under-run xfer restart cntr */
	u_int32_t	**rw_pklev;	/* L-R channel data peak level stored 
					   start address. */
	u_int8_t	pk_mtx;		/* total of peaklevel buffer array */
	u_int32_t	pkchk;		/* input or output data peakcheck 
					   status */
	u_int16_t	peak;		/* peak level of input or output 
					   stream-data */
	u_int32_t	dsl;		/* detect silence status */
	u_int32_t	slcchk;		/* silence check status */
	u_int32_t	interval;	/* period of detect silence by 
					   software.(:second) */
	u_int16_t	level;		/* level of detect silence by 
					   software. */
	u_int32_t	slccnt;		/* silence time count */
	u_int32_t	slcctr;		/* silence time counter */
} SIU_STMRW;

struct st_dmac {
	u_int32_t	SAR;
	u_int32_t	DAR;
	u_int32_t	DMATCR;
	u_int32_t	CHCR;
};

typedef struct {
	snd_pcm_substream_t	*substream;
	u_int32_t		rate;
	snd_pcm_format_t	format;
	u_int32_t		channels;
	u_int32_t		*buf;		/* dma area */
	u_int32_t		buf_bytes;
	u_int32_t		period_bytes;
	u_int32_t		cur_period;	/* Period currently in dma */
	u_int32_t		dma_xfer_cnt;
	u_int32_t		*mono_buf;
	u_int32_t		mono_buf_size;
} stream_t;

typedef struct {
	u_int32_t		port;
	struct semaphore	sem;
	u_int32_t		play_cap;	/* Used to track full duplex */
	snd_pcm_t		*pcm;
	stream_t		playback;
	stream_t		capture;
} port_info_t;

typedef struct {
	snd_card_t		*card;
	port_info_t		port_info[MAX_PCM_PORTS];
} siu_info_t;
	
extern irqreturn_t siu_sh7343_in_dma_isr(int irq, void *dev_id, 
					 struct pt_regs	*regs);
extern irqreturn_t siu_sh7343_out_dma_isr(int irq, void *dev_id,
					  struct pt_regs *regs);
extern irqreturn_t siu_sh7343_isr(int irq, void *dev_id, struct pt_regs *regs);
extern int ak4537_codec_start(int master, u_int32_t rate);
extern int ak4537_codec_stop(void);
extern double log10(double x);
extern const u_int32_t SIU_SPB_PRO_Y0[];
extern const u_int32_t SIU_SPB_PRO_Y1[];
extern const u_int32_t SIU_SPB_PRO_Y2[];
extern const u_int32_t SIU_SPB_PRO_Y3[];
extern const u_int32_t SIU_SPB_PRO_Y4[];
extern const u_int32_t SIU_SPB_PRO_P0[];
extern const u_int32_t SIU_SPB_PRO_P1[];

extern const u_int32_t SIU_SRC_8000_44100[];
extern const u_int32_t SIU_SRC_11025_44100[];
extern const u_int32_t SIU_SRC_16000_44100[];
extern const u_int32_t SIU_SRC_22050_44100[];
extern const u_int32_t SIU_SRC_32000_44100[];
extern const u_int32_t SIU_SRC_44100_44100[];
extern const u_int32_t SIU_SRC_48000_44100[];

extern const u_int32_t SIU_SRC_44100_8000[];
extern const u_int32_t SIU_SRC_44100_16000[];
extern const u_int32_t SIU_SRC_44100_22050[];

extern siu_info_t siu_info;
extern const T_SPBPAR t_spbpar[];
extern const u_int32_t dmain[];
extern const u_int32_t dmaout[];
extern volatile struct st_dmac *siu_out_dmac[];
extern volatile struct st_dmac *siu_in_dmac[];
extern T_SIU siu_obj[];
extern SIU_STMRW siu_stmwt[];
extern SIU_STMRW siu_stmrd[];


#define PLAYBACK_ENABLED	0x00000001
#define CAPTURE_ENABLED		0x00000002

#define VOLUME_CAPTURE		0
#define VOLUME_PLAYBACK		1

#define MELDUSE 0

#define PERIOD_BYTES_MAX	8192		/* DMA transfer/period size */
#define PERIOD_BYTES_MIN	256		/* DMA transfer/period size */
#define PERIODS_MAX		64		/* Max periods in buffer */
#define PERIODS_MIN		4		/* Min periods in buffer */
#define BUFFER_BYTES_MAX	(PERIOD_BYTES_MAX * PERIODS_MAX)
#define GET_MAX_PERIODS(buf_bytes, period_bytes) \
                                ((buf_bytes) / (period_bytes))
#define PERIOD_OFFSET(buf_addr, period_num, period_bytes) \
	                        ((int)(buf_addr) + ((period_num) * (period_bytes)))

static inline void copy_playback_period(port_info_t	*port_info)
{
	int		i;
	u_int16_t	*src;
	u_int32_t	*dst;
	int		cp_cnt;

	src = (u_int16_t *)PERIOD_OFFSET(port_info->playback.buf, 
					 port_info->playback.cur_period, 
					 port_info->playback.period_bytes);
	dst = port_info->playback.mono_buf;
	cp_cnt = port_info->playback.dma_xfer_cnt;

	for (i = 0; i < cp_cnt; i++) {
		*dst++ = *src++;
	}		
}

static inline void copy_capture_period(port_info_t	*port_info)
{
	int		i;
	u_int16_t	*src;
	u_int16_t	*dst;
	int		cp_cnt;

	dst = (u_int16_t *)PERIOD_OFFSET(port_info->capture.buf, 
					 port_info->capture.cur_period, 
					 port_info->capture.period_bytes);
	src = (u_int16_t *)port_info->capture.mono_buf;
	cp_cnt = port_info->capture.dma_xfer_cnt;

	for (i = 0; i < cp_cnt; i++) {
		*dst++ = *src;
		src += 2;
	}		
}

#define PKCHKOFF		0x00000000	/* detect peak level by soft 
						   OFF */
#define PKCHKON			0x00000001	/* detect peak level by soft ON */
#define GEQOFF			0x00000000	/* GEQ disable */
#define GEQON			0x00000001	/* GEQ enable */
#define INPUT			0x00000000	/* input */
#define OUTPUT			0x00000001	/* output */
#define INOUTPUT		0x00000002	/* input output */
#define NODEVICE		0x00000000	/* input and output off */
#define PCM			0x00000001	/* PCM */
#define I2S			0x00000002	/* I2S */
#define SPDIF			0x00000003	/* SPDIF */
#define PCMSPDIF		0x00000004	/* PCM & SPDIF */
#define I2SSPDIF		0x00000005	/* I2S & SPDIF */
#define STEREO			0x00000000	/* stereo */
#define MONAURAL		0x00000001	/* nonaural */
#define DSLOFF			0x00000000	/* detect silence off */
#define DSLON			0x00000001	/* detect silence on */
#define DPEAKOFF		0x00000000	/* detect peak level OFF */
#define DPEAKON			0x00000001	/* detect peak level ON */
#define SPQOFF			0x00000000	/* detect Q-code OFF */
#define SPQON			0x00000001	/* detect Q-code ON */
#define CHSTOFF			0x00000000	/* detect channel status OFF */
#define CHSTON			0x00000001	/* detect channel status ON */
#define RWF_STM_RD		0x01	/* during transfer stream-data-Read */
#define RWF_STM_WT		0x02	/* standby transfer stream-data-Write */
#define RWF_STM_WTRN		0x04	/* during transfer stream-data-Write */
#define RWF_STM_WTUR		0x08	/* standby transfer(buffer under run) 
					   stream-data-Write */
#define LuLlRuRl		0x00000000	/* Lch upper, Lch lower, 
						   Rch upper, Rch lower */
#define LlLuRlRu		0x00000001	/* Lch lower, Lch upper, 
						   Rch lower, Rch upper */
#define RuRlLuLl		0x00000002	/* Rch upper, Rch lower, 
						   Lch upper, Lch lower */
#define RlRuLlLu		0x00000003	/* Rch lower, Rch upper, 
						   Lch lower, Lch upper */

/* driver status  states */
#define ST_STOP			0x00000000
#define ST_READY		0x00000001
#define ST_OPEN			0x00000004
#define ST_LPF_CALL		0x00000010	/* _lowpassfilter() call */
#define ST_SRC_CALL		0x00000020	/* _sampling_rate() call */
#define ST_SPE_CALL		0x00000040	/* _speed() call */
#define ST_IIR_CALL		0x00000200	/* _graphic_equalizer() call */
#define ST_PATHA_CALL		0x00000400	/* path A setting called */
#define ST_PATHB_CALL		0x00000800	/* path B setting called */
#define ST_SPBACTIV		0x00001000	/* SPB working */

/* parameter macros */
#define PATHAOFF		0x00000000	/* pathA not use */
#define PATHAON			0x00000001	/* pathA use */
#define PATHBOFF		0x00000000	/* pathB not use */
#define PATHBON			0x00000001	/* pathB use */
#define CPUOUTPUT		0x00000000	/* input from CPU output */
#define PORTAINPUT		0x00000001	/* input from portA input */
#define PORTBINPUT		0x00000002	/* input from portB input */
#define MELOUTPUT		0x00000003
#define CPUINPUT		0x00000000	/* input CPU */
#define PORTAOUTPUT		0x00000001	/* output portA */
#define PORTBOUTPUT		0x00000002	/* output portB */
#define MELINPUT		0x00000003
#define FIRTHR			0x00000000	/* through */
#define FIRLPF			0x00000001	/* LPF */
#define FIRSRC			0x00000002	/* SRC */
#define MIXOFF			0x00000000	/* mix OFF */
#define MIXON			0x00000001	/* mix ON */
#define IIROFF			0x00000000	/* GEQ OFF */
#define IIRON			0x00000001	/* GEQ ON */
#define SCROFF			0x00000000	/* scramble OFF */
#define SCRON			0x00000001	/* scramble ON */


/* SIU memory address definition */
#define siu_p_ram		0xa4540000	/* PRAM */
#define siu_x_ram		0xa4544000	/* XRAM */
#define siu_y_ram		0xa4546000	/* YRAM */
#define siu_fifo_ram		0xa4548000	/* FIFO RAM */

#define YRAM0_SIZE		(0x0040/4)	/* 16 */
#define YRAM1_SIZE		(0x0080/4)	/* 32 */
#define YRAM2_SIZE		(0x0040/4)	/* 16 */
#define YRAM3_SIZE		(0x0080/4)	/* 32 */
#define YRAM4_SIZE		(0x0080/4)	/* 32 */
#define YRAM_DEF_SIZE		(YRAM0_SIZE + YRAM1_SIZE + YRAM2_SIZE + \
                                 YRAM3_SIZE + YRAM4_SIZE)
#define YRAM_FIR_SIZE		(0x0400/4)	/* 256 */
#define YRAM_IIR_SIZE		(0x0200/4)	/* 128 */

#define XRAM0_SIZE		(0x0400/4)	/* 256 */
#define XRAM1_SIZE		(0x0200/4)	/* 128 */
#define XRAM2_SIZE		(0x0200/4)	/* 128 */

/* PRAM program array size */
#define PRAM0_SIZE		(0x0100/4)	/* 64 */
#define PRAM1_SIZE		((0x2000 -0x0100) / 4)	/* 1984 */



/* Register access */
#define IN8(addr)		(*((volatile u_int8_t *)(addr)))
#define IN16(addr)		(*((volatile u_int16_t *)(addr)))
#define IN32(addr)		(*((volatile u_int32_t *)(addr)))
#define OUT8(addr, val)		(*((volatile u_int8_t *)(addr)) = (val))
#define OUT16(addr, val)	(*((volatile u_int16_t *)(addr)) = (val))
#define OUT32(addr, val)	(*((volatile u_int32_t *)(addr)) = (val))

/* Pin function controller (PFC) registers */
#define PSELB			0xa405014e
#define PSELB_PSB0		0x0001
#define PSELB_PSB1		0x0002

#define PSELC			0xa4050150
#define PSELC_PSC15		0x8000
#define PSELC_PSC14		0x4000
#define PSELC_PSC13		0x2000

#define PKCR			0xa4050112
#define PKCR_PK0MD0		0x0001
#define PKCR_PK0MD1		0x0002
#define PKCR_PK1MD0		0x0004
#define PKCR_PK1MD1		0x0008
#define PKCR_PK2MD0		0x0010
#define PKCR_PK2MD1		0x0020
#define PKCR_PK3MD0		0x0040
#define PKCR_PK3MD1		0x0080
#define PKCR_PK4MD0		0x0100
#define PKCR_PK4MD1		0x0200

#define HIZCRB			0xa4050158
#define HIZCRB_HIZB4		0x0010

#define	MSELCR			0xa405015c

#define DRVCR			0xa4050180
#define	PFCR			0xa405010a

/* Power down registers */
#define	MSTPCR0			0xa4150030
#define	MSTPCR0_MSTP022		0x00400000
#define	MSTPCR0_MSTP021		0x00200000

#define	MSTPCR2			0xa4150038
#define	MSTPCR2_MSTP208		0x00000100

/* Clock pulse generator registers */
#define	SCLKACR			0xa4150008
#define	SCLKACR_EXSRC		0x00000080
#define	SCLKACR_MCLKSEL		0x00000020

/* SIU registers */
#define IFCTL			0xa454c000
#define SRCTL			0xa454c004
#define SFORM			0xa454c008
#define CKCTL			0xa454c00c
#define TRDAT			0xa454c010
#define STFIFO			0xa454c014
#define DPAK			0xa454c01c
#define EVNTC			0xa454c028
#define SBCTL			0xa454c040
#define SBPSET			0xa454c044
#define SBDVCA			0xa454c06c
#define SBDVCB			0xa454c070
#define SBACTIV			0xa454c074
#define DMAIA			0xa454c090
#define DMAIB			0xa454c094
#define DMAOA			0xa454c098
#define DMAOB			0xa454c09c
#define DMAML			0xa454c0a0
#define SPSTS			0xa454c0cc
#define BRGASEL			0xa454c100
#define BRRA			0xa454c104
#define BRGBSEL			0xa454c108
#define BRRB			0xa454c10c

/* DMA registers */
#define	SAR0			0xfe008020
#define	SAR1			0xfe008030
#define	SAR2			0xfe008040
#define	SAR3			0xfe008050
#define	SAR4			0xfe008070
#define	SAR5			0xfe008080
#define	DMA0CH_BASE		SAR0
#define	DMA1CH_BASE		SAR1
#define	DMA2CH_BASE		SAR2
#define	DMA3CH_BASE		SAR3
#define	DMA4CH_BASE		SAR4
#define	DMA5CH_BASE		SAR5
#define	DMAC0			(struct st_dmac *)DMA0CH_BASE
#define	DMAC1			(struct st_dmac *)DMA1CH_BASE
#define	DMAC2			(struct st_dmac *)DMA2CH_BASE
#define	DMAC3			(struct st_dmac *)DMA3CH_BASE
#define	DMAC4			(struct st_dmac *)DMA4CH_BASE
#define	DMAC5			(struct st_dmac *)DMA5CH_BASE

#define CHCR_DE_BIT		0
#define CHCR_TE_BIT		1
#define CHCR_IE_BIT		2
#define CHCR_TS10_BIT		3
#define CHCR_TB_BIT		5
#define CHCR_DLDS_BIT		6
#define CHCR_RS_BIT		8
#define CHCR_SM_BIT		12
#define CHCR_DM_BIT		14
#define CHCR_AL_BIT		16
#define CHCR_AM_BIT		17
#define CHCR_DO_BIT		23

#define CHCR_DE_WIDTH		1
#define CHCR_TE_WIDTH		1
#define CHCR_IE_WIDTH		1
#define CHCR_TS10_WIDTH		2
#define CHCR_TB_WIDTH		1
#define CHCR_DLDS_WIDTH		2
#define CHCR_RS_WIDTH		4
#define CHCR_SM_WIDTH		2
#define CHCR_DM_WIDTH		2
#define CHCR_AL_WIDTH		1
#define CHCR_AM_WIDTH		1
#define CHCR_DO_WIDTH		1

#define	DMAOR			0xfe008060
#define	DMAOR_DME_BIT		0
#define	DMAOR_NMIF_BIT		1
#define	DMAOR_AE_BIT		2
#define	DMAOR_PR_BIT		8
#define	DMAOR_CMS_BIT		12

#define	DMAOR_DME_WIDTH		1
#define	DMAOR_NMIF_WIDTH	1
#define	DMAOR_AE_WIDTH		1
#define	DMAOR_PR_WIDTH		2
#define	DMAOR_CMS_WIDTH		4

#define DMARS_0			0xfe009000
#define DMARS_1			0xfe009004
#define DMARS_2			0xfe009008
#define DMARS_ADDR(ch)		(DMARS_0 + 4 * ((ch) / 2))
#define DMARS_VAL(ch, val)	((IN16(DMARS_ADDR(ch)) & 	\
				 0xff00 >> ((ch) % 2) * 8) |	\
				 (val) << ((ch) % 2) * 8)

#define SET_BIT16(addr, bit, width, val)			\
    ((IN16(addr) & ~(((1 << (width)) - 1) << (bit))) |		\
     (val) << (bit))
#define SET_BIT32(addr, bit, width, val)			\
    ((IN32(addr) & ~(((1 << (width)) - 1) << (bit))) |		\
     (val) << (bit))

#endif /* SIU_SH7343_H */

--- NEW FILE: siu_sh7343_coef.c ---
/*
    siu-sh7343.c - Alsa driver for Renesas' SH7343 SIU peripheral.

    Copyright (c) 2006 Carlos Munoz <ca...@ke...>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

#include "siu_sh7343.h"

// Sampling Rate Conversion Filter Coefficient
// Input Sampling Frequency = 44.1 kHz
// Output Sampling Frequency = 44.1 kHz
// Over-Sampling Rate = 8 times
// 31 TAPs
const u_int32_t SIU_SRC_44100_44100[YRAM_FIR_SIZE] = {
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x40000000,0x40000000,
	0x40000000,0x40000000,0x40000000,0x40000000,0x40000000,0x40000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
	0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,
};

--- NEW FILE: siu_sh7343_int.c ---
/*
    siu-sh7343.c - Alsa driver for Renesas' SH7343 SIU peripheral.

    Copyright (c) 2006 Carlos Munoz <ca...@ke...>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/


#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/dma-mapping.h>

#include "siu_sh7343.h"


irqreturn_t siu_sh7343_in_dma_isr(int			irq, 
				  void			*dev_id,
				  struct pt_regs	*regs)
{
	port_info_t		*port_info = (port_info_t *)dev_id;
	u_int32_t		port = port_info->port;
	u_int32_t		nowcnt;
	volatile u_int32_t	dummy;

	if ((siu_obj[port].rw_flg & RWF_STM_RD) == 0x00)
		return IRQ_HANDLED;

	/* ich Interrupt disable, DMA transfer disable */
	siu_in_dmac[port]->CHCR &= ~0x00000005;

	nowcnt = port_info->capture.cur_period;

	/* DMA re-setup next transfer set */
	if (++port_info->capture.cur_period >= 
	    GET_MAX_PERIODS(port_info->capture.buf_bytes, 
			    port_info->capture.period_bytes)) {
		port_info->capture.cur_period = 0;
	}
	siu_in_dmac[port]->SAR = dmain[port];

	/* For mono we use the mono buffer */
	if (port_info->capture.channels == 1) {
		copy_capture_period(port_info);
		siu_in_dmac[port]->DAR = 
			(u_int32_t)port_info->capture.mono_buf;
	}
	else {
		siu_in_dmac[port]->DAR = 
			(u_int32_t)PERIOD_OFFSET(port_info->capture.buf, 
					 port_info->capture.cur_period, 
					 port_info->capture.period_bytes);
	}
	siu_in_dmac[port]->DMATCR = port_info->capture.dma_xfer_cnt;

	/* DMA transfer enable */
	siu_in_dmac[port]->CHCR |= 0x00000005;
	dummy = siu_in_dmac[port]->CHCR;		/* dummy read */
	siu_in_dmac[port]->CHCR = SET_BIT32(&siu_in_dmac[port]->CHCR, 
					    CHCR_TE_BIT, CHCR_TE_WIDTH, 0x00);

	/* Notify alsa a period is done */
	snd_pcm_period_elapsed(port_info->capture.substream);

	return IRQ_HANDLED;
}


irqreturn_t siu_sh7343_out_dma_isr(int			irq, 
				   void			*dev_id,
				   struct pt_regs	*regs)
{
	port_info_t		*port_info = (port_info_t *)dev_id;
	u_int32_t		port = port_info->port;
	volatile u_int32_t 	dummy;

	if ((siu_obj[port].rw_flg & RWF_STM_WTRN) == 0x00)
		return IRQ_HANDLED;

	/* och Interrupt disable, DMA transfer disable */
	siu_out_dmac[port]->CHCR &= ~0x00000005;

	/* DMA re-setup next transfer set */
	if (++port_info->playback.cur_period >= 
	    GET_MAX_PERIODS(port_info->playback.buf_bytes, 
			    port_info->playback.period_bytes)) {
		port_info->playback.cur_period = 0;
	}

	/* For mono we use the mono buffer */
	if (port_info->playback.channels == 1) {
		copy_playback_period(port_info);
		siu_out_dmac[port]->SAR = 
			(u_int32_t)port_info->playback.mono_buf;
	}
	else {
		siu_out_dmac[port]->SAR = 
			(u_int32_t)PERIOD_OFFSET(port_info->playback.buf, 
					 port_info->playback.cur_period, 
					 port_info->playback.period_bytes);
	}
	siu_out_dmac[port]->DAR = dmaout[port];
	siu_out_dmac[port]->DMATCR = port_info->playback.dma_xfer_cnt;

	/* DMA transfer enable */
	siu_out_dmac[port]->CHCR |= 0x00000005;
	dummy = siu_out_dmac[port]->CHCR;		/* dummy read */
	siu_out_dmac[port]->CHCR = SET_BIT32(&siu_out_dmac[port]->CHCR, 
					     CHCR_TE_BIT, CHCR_TE_WIDTH, 0x00);

	/* Notify alsa a period is done */
	snd_pcm_period_elapsed(port_info->playback.substream);

	return IRQ_HANDLED;
}


irqreturn_t siu_sh7343_isr(int			irq, 
			   void			*dev_id,
			   struct pt_regs	*regs)
{
	u_int32_t spsts_tmp;
	u_int32_t evntc_tmp;

	evntc_tmp = IN32(EVNTC);
	spsts_tmp = IN32(SPSTS);

	/* interrupt of detect silence by hardware */
	if (evntc_tmp & 0x00004000) {
		if (siu_stmrd[SIU_PORTA].dsl == DSLON) {
			/* Do something ??? */
		}
	}

	/* interrupt of SPDIF status */
	if (evntc_tmp & 0x00008000) {
		/* changed LR channel status */
		if (spsts_tmp & 0x00003000) {
			/* Do something ??? */
		}
		/* channged Q-code number of music */
		if (spsts_tmp & 0x00004000) {
			/* Do something ??? */
		}
		OUT32(SPSTS, ~spsts_tmp);
	}

	OUT32(EVNTC, ~evntc_tmp);

	return IRQ_HANDLED;
}



--- NEW FILE: siu_sh7343_main.c ---
/*
    siu-sh7343.c - Alsa driver for Renesas' SH7343 SIU peripheral.

    Copyright (c) 2006 Carlos Munoz <ca...@ke...>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
[...1956 lines suppressed...]
fail:
	snd_card_free(card);
	printk("failed to initialize.\n");
	return err;
}

static void __exit alsa_card_siu_sh7343_exit(void)
{
	snd_card_free(siu_info.card);
	free_irq(SIU_IRQ, NULL);
	printk(KERN_INFO "siu-sh7343: exited\n");
}


MODULE_AUTHOR("Carlos Munoz <ca...@ke...>");
MODULE_DESCRIPTION("Alsa SH7343 SIU driver");
MODULE_LICENSE("GPL");

module_init(alsa_card_siu_sh7343_init)
module_exit(alsa_card_siu_sh7343_exit)

--- NEW FILE: siu_sh7343_spbpro.c ---
/*
    siu-sh7343-spbpro.c - Alsa driver for Renesas' SH7343 SIU peripheral.

    Copyright (c) 2006 Carlos Munoz <ca...@ke...>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/


#include <linux/module.h>

#include "siu_sh7343.h"

/* PRAM0 address = siu_p_ram + 0x0000 */
const u_int32_t SIU_SPB_PRO_P0[PRAM0_SIZE] = {
	0x40001a00,0x62281a00,0x40017800,0x60019800,0x41001d00,0x61001d00,0x41001e00,0x61001e00,0x0f7c0500,0x00000000,
	0x00000000,0x0d7c0500,0x1f800000,0x00000000,0x00000000,0x00000000,
};

/* PRAM1 address = siu_p_ram + 0x0100 */
const u_int32_t SIU_SPB_PRO_P1[PRAM1_SIZE] = {
	0x66000600,0x0a181f00,0x0a181f00,0x0a180800,0x0a180900,0x09181000,0x09181f00,0x66014600,0x0a181f00,0x09181f00,
	0x09180300,0x09180000,0x0fd40100,0x14802000,0x2010bc00,0x00000000,0x00000000,0x00000000,0x0f0c1900,0x2410a000,
	0x0f780c00,0x0fb20d00,0x60000c00,0x4060ba00,0x78001a00,0x00000000,0x0f0d1200,0x1748a000,0x20102900,0x16c8a000,
	0x00000000,0x00000000,0x0f0e1200,0x1748a000,0x20102500,0x16c8a000,0x00000000,0x00000000,0x0f4c0a00,0x0f0d1200,
	0x0faa0b00,0x60000a00,0x08280b00,0xeb000000,0x08280b00,0x0ffc0a00,0xe4148000,0xe4f08000,0xe5300000,0x200f0200,
	0xeb400000,0x0ffc0b00,0x00000000,0xe41cc000,0xe4f8c000,0xe5380000,0x0fa80000,0x5fffe100,0x60000100,0x14802000,
	0x0f2e0200,0x200b3e00,0x40000200,0x15004000,0x0f001400,0x0f0d1200,0x17488000,0x0f0e1200,0x17488000,0x0f201900,
	0x20122700,0x6601c600,0x09181f00,0x09181f00,0x09180000,0x0fd40100,0x14802000,0x205d1c00,0x00000000,0x00000000,
	0x00000000,0x0f201900,0x245d0000,0x66010600,0x00000000,0x00000000,0x09181900,0x2014a000,0x0f211200,0x66010600,
	0x60002100,0x0f7c0000,0x0c040600,0x00000000,0x0f001400,0x00000000,0x0f001400,0x00000000,0x0f001400,0x00000000,
	0x0f001400,0x0f201900,0x0f420000,0x0f430100,0x40000200,0x601fe200,0x14804000,0x14844100,0x18002000,0x241abb00,
	0x0f420000,0x40000200,0x601fe200,0x14804000,0x600fe200,0x18004000,0x205d1c00,0x00000000,0x00000000,0x0f221200,
	0x1748a000,0x205d0500,0x16c8a000,0x0f240500,0x40601600,0x607fd600,0x1769c000,0x0d4c0500,0x0f420000,0x0f430100,
	0x40000200,0x601fe200,0x14804000,0x14844100,0x11002000,0x0f820000,0x0f870100,0x15002000,0x0f001000,0x0f240000,
	0x0f140100,0x5fffe200,0x60000200,0x14804000,0x15002000,0x2008fe00,0x0f000900,0x0f240500,0x0f140200,0x0f211200,
	0x1748a000,0x205f0900,0x16c8a000,0x00000000,0x00000000,0x201d6100,0x00000000,0x00000000,0x00000000,0x2020c200,
	0x00000000,0x00000000,0x00000000,0x2029e300,0x00000000,0x00000000,0x00000000,0x20467e00,0x00000000,0x00000000,
	0x00000000,0x0f260500,0x0a941f00,0x09941f00,0x09940000,0x0f000a00,0x60000a00,0x0f820b00,0x0f240000,0x0f960100,
	0x40000200,0x7fffe200,0x14804000,0x15002000,0x0f000900,0x0f240500,0x0f420000,0x0f430100,0x40000200,0x601fe200,
	0x14804000,0x14844100,0x12802000,0x0f820000,0x20467e00,0x0f870100,0x15002000,0x0f001000,0x0f260500,0x0a941f00,
	0x09941f00,0x09940000,0x0f240100,0x0f960200,0x40000300,0x7fffe300,0x14846100,0x15044100,0x0f040900,0x66180600,
	0x0d200600,0x0d240600,0x00000000,0x00000000,0x66044600,0x09981f00,0x09981f00,0x09980100,0x12842200,0x0f881600,
	0x66060600,0x09981f00,0x09981f00,0x09980500,0x0d000500,0x00000000,0x00000000,0x0c940600,0x66040600,0x0a181f00,
	0x0a181f00,0x0a181a00,0x09181600,0x09180600,0x0ffc0a00,0x0ffc0b00,0x40269800,0x6026d800,0x84480000,0x84da0000,
	0x84480000,0x84da0000,0x84488000,0x84da9400,0x84490000,0x84db1700,0x84490000,0x84db1700,0x82490000,0x82db1700,
	0x80010000,0x80011700,0xe4148000,0xe41cc000,0x66180600,0x0a181f00,0x0a181f00,0x0a180800,0x0a180900,0x0f420000,
	0x0f430100,0x40000200,0x601fe200,0x14804000,0x14844100,0x12802000,0x0f820000,0x20467e00,0x0f870100,0x15002000,
	0x0f001000,0x66180600,0x0d200600,0x0d240600,0x00000000,0x00000000,0x66040600,0x0a181f00,0x0a181f00,0x09181a00,
	0x09181600,0x66050600,0x0a181f00,0x0a181f00,0x0a180000,0x0a180100,0x09180200,0x09180300,0x09180500,0x180c0000,
	0x20333b00,0x00000000,0x00000000,0x00000000,0x08000800,0x08040c00,0x08080d00,0x080c0a00,0x0f420000,0x0f430100,
	0x40000200,0x601fe200,0x14804000,0x14844100,0x12802000,0x0f820000,0x0f870100,0x15002000,0x0f001000,0x40601600,
	0x607fd600,0x0f260500,0x0a941f00,0x09941f00,0x09940000,0x0f240100,0x0f960200,0x40000300,0x7fffe300,0x14846100,
	0x15044100,0x0f040900,0x66044600,0x09981f00,0x09981f00,0x09980100,0x12842200,0x0f881600,0x66060600,0x09981f00,
	0x09981f00,0x09980500,0x0d000500,0x00000000,0x00000000,0x0c940600,0x08000800,0x08040c00,0x08080d00,0x080c0a00,
	0x0fb01600,0x202c3e00,0x118c0300,0x66184600,0x0c240600,0x100c2100,0x6605c600,0x0d840600,0x0d940600,0x0ffc0100,
	0x130c4300,0x0f7c1200,0x00000000,0x00000000,0x180c0000,0x20357b00,0x00000000,0x00000000,0x00000000,0x2033fe00,
	0x118c0300,0x11044100,0x00000000,0x66048600,0x09181f00,0x09181f00,0x09180600,0x40000000,0x60004000,0x13004000,
	0x10180600,0x11982600,0x0ffc0a00,0x0ffc0b00,0x4037d800,0x60381800,0x84480000,0x84da0000,0x84480000,0x84da0000,
	0x84488000,0x84da9400,0x84490000,0x84db1700,0x84490000,0x84db1700,0x84490000,0x84db1700,0x80010000,0x80011700,
	0xe4148000,0xe41cc000,0xe4f08000,0xe4f8c000,0xe5300000,0xe5380000,0x66064600,0x0f2a0a00,0x0da80600,0x0f2e0b00,
	0x0dac0600,0x66060600,0x09181f00,0x09181f00,0x09180500,0x66040600,0x0a181f00,0x0a181f00,0x09181a00,0x09181f00,
	0x09180600,0x40000000,0x60004000,0x13004000,0x10180600,0x11982600,0x12984600,0x0ffc0a00,0x0ffc0b00,0x403d7800,
	0x603db800,0x84480000,0x84da0000,0x84480000,0x84da0000,0x84488000,0x84da9400,0x84490000,0x84db1700,0x84490000,
	0x84db1700,0x84490000,0x84db1700,0x80010000,0x80011700,0xe4148000,0xe41cc000,0xe4f08000,0xe4f8c000,0xe5300000,
	0xe5380000,0x66050600,0x09181f00,0x09181f00,0x09180000,0x40021a00,0x68001a00,0x0f8c0c00,0x11806300,0x0f8c0d00,
	0x0f2a0800,0x0ffc0a00,0xe8000000,0x00000000,0x00000000,0xe4148000,0x0f2e0800,0x0ffc0b00,0xe8000000,0x00000000,
	0x00000000,0xe41cc000,0x66064600,0x0a181f00,0x0a181f00,0x0a180800,0x0a180900,0x0a180c00,0xe8400000,0x00000000,
	0x00000000,0xe4148000,0xe9400000,0x00000000,0x00000000,0xe41cc000,0x4064da00,0x78001a00,0x08280800,0x0ffc0a00,
	0xe8000000,0x00000000,0x00000000,0xe4148000,0x082c0800,0x0ffc0b00,0xe8000000,0x00000000,0x00000000,0xe41cc000,
	0x66180600,0x0a181f00,0x0a181f00,0x0a180800,0x0a180900,0x20467e00,0x00000000,0x00000000,0x00000000,0x24480400,
	0x0f231200,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x0f4c0c00,0x0fb20d00,0x0f320c00,0x0fb20c00,
	0xe4108000,0xe41ac000,0x24578500,0x66180600,0x0d200600,0x0d240600,0x00000000,0x00000000,0x16e68000,0x660c0600,
	0x0a181f00,0x0a181f00,0x0a181a00,0x0a180000,0x0a180300,0x404ab800,0x6052f800,0xe5300000,0xe5380000,0x0f29aa00,
	0x0f2dab00,0x00000000,0x00000000,0x11004500,0x110c4600,0x00000000,0x00000000,0x94500000,0x92500000,0x00000000,
	0x92488000,0xe8000000,0xe4148000,0xe4148000,0x11000500,0x0ca80500,0x0ffc0a00,0x94500000,0x94500000,0x92480000,
	0x92488000,0x92488000,0x80010000,0xe4148000,0xe4148000,0x11000500,0x00000000,0x00000000,0x0a940100,0x00000000,
	0x00000000,0x0a940200,0x0c880500,0x11004500,0x0c840500,0x11010500,0x110c4600,0x00000000,0x00000000,0x94500000,
	0x92500000,0x00000000,0x92488000,0xe8000000,0xe41cc000,0xe41cc000,0x1100c500,0x0cac0500,0x0ffc0b00,0x94500000,
	0x94500000,0x92480000,0x92488000,0x92488000,0x80010300,0xe41cc000,0xe41cc000,0x1100c500,0x00000000,0x00000000,
	0x0a940100,0x00000000,0x00000000,0x0a940200,0x0c880500,0x11010500,0x0c840500,0x11018000,0x110d8300,0x660cc600,
	0x0a181f00,0x09181f00,0x09180c00,0x09180800,0x4020da00,0x70201a00,0x08280b00,0xeb800000,0x08280b00,0x0ffc0a00,
	0xe4148000,0xe4f08000,0xe5300000,0xeb800000,0x0ffc0b00,0x00000000,0xe41cc000,0xe4f8c000,0xe5380000,0x2456f400,
	0x00000000,0x00000000,0x00000000,0x0fa00800,0x2056f100,0x00000000,0x00000000,0x00000000,0xe4200000,0x0c200600,
	0x16e68000,0x66180600,0x0a181f00,0x0a181f00,0x0a180800,0x0a180900,0x0f740c00,0x0fb20d00,0x0f320c00,0x0fb20c00,
	0xe4f08000,0xe4f8c000,0xe5300000,0xe5380000,0x4060ba00,0x70001a00,0x08280b00,0xeb000000,0x08280b00,0x0ffc0a00,
	0xe4148000,0xeb400000,0x0ffc0b00,0x00000000,0xe41cc000,0xe4f08000,0xe4f8c000,0xe5300000,0xe5380000,0x0fa80000,
	0x5fffe100,0x60000100,0x14802000,0x0f2e0200,0x40000200,0x15004000,0x245c2600,0x66100600,0x09181f00,0x09181f00,
	0x09180100,0x16002000,0x0c000600,0x0f211200,0x00000000,0x00000000,0x2015de00,0x00000000,0x00000000,0x0f001400,
	0x0f420000,0x0f430100,0x40000200,0x601fe200,0x14804000,0x14844100,0x18002000,0x241abb00,0x00000000,0x00000000,
	0x00000000,0x0f201900,0x2008e700,0x00000000,0x00000000,0x00000000,0x0f211200,0x17488000,0x0f221200,0x17488000,
	0x0f231200,0x17488000,0x66000600,0x0d200600,0x0d240600,0x0d400600,0x00000000,0x00000000,0x00000000,0x1f800000,
	0x00000000,0x00000000,0x00000000,0x12531800,
};

/* YRAM0 address = siu_y_ram + 0x0000 */
const u_int32_t SIU_SPB_PRO_Y0[YRAM0_SIZE] = {
	0x004a4300,		// H'00		ydef[0]		passA=disable
	0x03000300,		// H'04		ydef[1]		
	0x08000000,		// H'08		ydef[2]		
	0x00000000,		// H'0c		ydef[3]		
	0x00000000,		// H'10		ydef[4]		
	0x00414900,		// H'14		ydef[5]		portB -> CPU		passB=disable
	0x00020000,		// H'18		ydef[6]		pathB 
	0x00080000,		// H'1c		ydef[7]		pathA 
};

/* YRAM1 address = siu_y_ram + 0x0040 */
const u_int32_t SIU_SPB_PRO_Y1[YRAM1_SIZE] = {
//	0x0704507b,		// H'40		ydef[16]	LPF
//	0x000000ff,		// H'44		ydef[17]	

	0x2304501b,		// H'40		ydef[16]	SRC -> over=8, 31tap
//	0x03045000,		// H'40		ydef[16]	SRC tapAover-sampling undecided
	0x0000003f,		// H'44		ydef[17]	

	0x00000100,		// H'48		ydef[18]	
	0x00000000,		// H'4c		ydef[19]	

	0x0000ac44,		// H'50		ydef[20]	outfs
	0x0000ac44,		// H'54		ydef[21]	infs
	0x00000003,		// H'58		ydef[22]	over,	=log2(8)
	0x00000000,		// H'5c		ydef[23]	
	0x00000000,		// H'60		ydef[24]	
	0x00000000,		// H'64		ydef[25]	
	0x00000000,		// H'68		ydef[26]	
	0x00005f1b,		// H'6c		ydef[27]	=(1/outfs)*0x40000000
};

/* YRAM2 address = siu_y_ram + 0x00c0 */
const u_int32_t SIU_SPB_PRO_Y2[YRAM2_SIZE] = {
	0x03041000,		// H'c0		ydef[48]	band=undecided
//	0x03041003,		// H'c0		ydef[48]	band=3

	0x00000200,		// H'c4		ydef[49]	(header address / 2 ) of IIR data
	0x00000300,		// H'c8		ydef[50]	
	0x00000000,		// H'cc		ydef[51]	
	0x40000000,		// H'd0		ydef[52]	
};

/* YRAM3 address = siu_y_ram + 0x0100 */
const u_int32_t SIU_SPB_PRO_Y3[YRAM3_SIZE] = {
	0x00000000,
	0x00000000,
};

/* YRAM4 address = siu_y_ram + 0x0180 */
const u_int32_t SIU_SPB_PRO_Y4[YRAM4_SIZE] = {
	0x00000000,
	0x00000000,
	0x00000000,
	0x00000000,
	0x00000000,
	0x00000000,
	0x00000000,
	0x00000000,
	0x00000000,
	0x00000000,
	0x00000000,
	0x00000000,
	0x00000000,
};

const T_SPBPAR t_spbpar[18] = {
//		ab1a,		ab0a,		dir,		event,		stfifo,		trdat
	{	0x0000004a,	0x00000048,	0x00000001,	0x05000000,	0x05000500,	0x05050001	},	// memory to memory pathA 0
	{	0x0000004a,	0x00000043,	0x00000000,	0x00080000,	0x04080008,	0x04040001	},	// memory to portA  pathA 1
	{	0x0000004b,	0x00000044,	0x00000000,	0x00100000,	0x08100010,	0x08080001	},	// memory to portB  pathA 2
	{	0x00000040,	0x00000048,	0x00000000,	0x00010000,	0x01010001,	0x01010001	},	// portA  to memory pathA 3
	{	0x00000041,	0x00000049,	0x00000000,	0x00020000,	0x02020002,	0x02020001	},	// portB  to memory pathA 4
	{	0x0000004a,	0x00000043,	0x00000000,	0x00080000,	0x04080008,	0x04040001	},	// memory to portA  pathB 5
	{	0x0000004b,	0x00000044,	0x00000000,	0x00100000,	0x08100010,	0x08080001	},	// memory to portB  pathB 6
	{	0x00000040,	0x00000048,	0x00000000,	0x00010000,	0x01010001,	0x01010001	},	// portA  to memory pathB 7
	{	0x00000041,	0x00000049,	0x00000000,	0x00020000,	0x02020002,	0x02020001	}	// portB  to memory pathB 8
#if MELDUSE
	,{	0x00000040,	0x00000044,	0x00000000,	0x00100000,	0x00150011,	0x00000001	},	// portA  to portC  pathA 9
	{	0x00000041,	0x00000044,	0x00000000,	0x00100000,	0x00120012,	0x00000001	},	// portB  to portC  pathA 10
	{	0x00000042,	0x00000049,	0x00000000,	0x00040000,	0x03040300,	0x03030001	},	// portC  to memory pathA 11
	{	0x00000042,	0x00000043,	0x00000000,	0x00080000,	0x000c0008,	0x00000001	},	// portC  to portA  pathA 12
	{	0x00000042,	0x00000044,	0x00000000,	0x00100000,	0x00140010,	0x00000001	},	// portC  to portB  pathA 13
	{	0x00000040,	0x00000044,	0x00000000,	0x00100000,	0x00110011,	0x00000001	},	// portA  to portC  pathB 14
	{	0x00000041,	0x00000044,	0x00000000,	0x00100000,	0x00160010,	0x00000001	},	// portB  to portC  pathB 15
	{	0x00000042,	0x00000043,	0x00000000,	0x00080000,	0x000c0008,	0x00000001	},	// portC  to portA  pathB 16
	{	0x00000042,	0x00000044,	0x00000000,	0x00100000,	0x00140010,	0x00000001	}	// portC  to portB  pathB 17
#endif
};

Index: Kconfig
===================================================================
RCS file: /cvsroot/linuxsh/linux/sound/sh/Kconfig,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- Kconfig	5 Jun 2006 15:29:08 -0000	1.2
+++ Kconfig	7 Aug 2006 10:42:00 -0000	1.3
@@ -2,14 +2,31 @@
        depends on SND!=n && SUPERH
 
 config SND_AICA
-       tristate "Yamaha AICA sound for SEGA Dreamcast"
-       depends on SND
-       depends on SH_DREAMCAST
-       select SND_PCM
-       help
-         Say Y here to include support for sound on your SEGA Dreamcast
+	tristate "Yamaha AICA sound for SEGA Dreamcast"
+	depends on SND && SH_DREAMCAST
+	select SND_PCM
+	help
+	  Say Y here to include support for sound on your SEGA Dreamcast
 
-         To compile this driver as a module, choose M here: the module
-         will be called snd-aica.
+	  To compile this driver as a module, choose M here: the module
+	  will be called snd-aica.
+
+config SH7343_SIU
+	tristate "Renesas SH7343 SIU"
+	depends on SND && CPU_SUBTYPE_SH7343
+	help
+	  Say M if you want to use the Sound Interface Unit peripheral
+	  on the SH7343 processor. If you do not want to use the SH7343 on
+	  board SIU, you can safely say N here.
+
+ 	  To compile this driver as a module, choose M here: the module
+          will be called snd-siu-sh7343.
+
+config AK4537_CODEC
+	bool "AK4537 codec"
+	depends on SH7343_SIU
+	help
+	  If you do not have an AK4537 codec connected to the SH7343 SIU
+	  you can safely say N here.
 
 endmenu

Index: Makefile
===================================================================
RCS file: /cvsroot/linuxsh/linux/sound/sh/Makefile,v
retrieving revision 1.1
retrieving revision 1.2
diff -u -d -r1.1 -r1.2
--- Makefile	4 Jun 2006 12:13:05 -0000	1.1
+++ Makefile	7 Aug 2006 10:42:00 -0000	1.2
@@ -1,4 +1,12 @@
+#
+# Makefile for ALSA
+#
 
 snd-aica-objs := aica.o
 obj-$(CONFIG_SND_AICA) += snd-aica.o
 
+obj-$(CONFIG_SH7343_SIU) += snd-siu-sh7343.o
+snd-siu-sh7343-y := siu_sh7343_main.o siu_sh7343_coef.o \
+		    siu_sh7343_spbpro.o siu_sh7343_int.o
+
+snd-siu-sh7343-$(CONFIG_AK4537_CODEC) += ak4537_codec.o

[linuxsh-cvs] CVS: linux/drivers/i2c/busses i2c-sh7343.c, NONE, 1.1 i2c-sh7343.h, NONE, 1.1 Kconfig, 1.12, 1.13 Makefile, 1.9, 1.10

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/drivers/i2c/busses
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv6267/drivers/i2c/busses

Modified Files:
	Kconfig Makefile 
Added Files:
	i2c-sh7343.c i2c-sh7343.h 
Log Message:
SH7343 i2c support.



--- NEW FILE: i2c-sh7343.c ---
/*
    i2c-sh7343.c - i2c bus adapter for Renesas' SH7343 i2c peripheral.

    Copyright (c) 2006 Carlos Munoz <ca...@ke...>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#undef DEBUG

#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <asm/semaphore.h>

#include "i2c-sh7343.h"

/* Flag used to indicate transfer should be in poll mode. When
   called from atomic context. Note, caller will wait until 
   transfer completes */
#define I2C_M_POLL		0x0080

static int 		rx_ack_high[MAX_CH] = {0, 0};
static unsigned long	peripheral_clk = 27000000;
static int		fast_mode[MAX_CH] = {0, 0};


/*
 * msg_status_t: A message can be in one of these states:
 *
 *  DONE:	The message was sent/received successfully.
 *  W_ADDR:	The address of the device is being written.
 *  W:		The message is being written.
 *  R-ADDR:	The address of the device to read from
 *		is being written.
 *  R:		The message is being read.
 *  R1:		The last byte of the message is being read.
 */
typedef enum {
	MSG_STATUS_DONE = 0,
	MSG_STATUS_W_ADDR,
	MSG_STATUS_W,
	MSG_STATUS_R_ADDR,
	MSG_STATUS_R,
	MSG_STATUS_R1,
	MSG_STATUS_ERR
} msg_status_t;


typedef struct {
	msg_status_t		status;
	u_int8_t		int_enb;
	u_int8_t		addr[2];
	struct i2c_msg		*usr_msg;
	u_int32_t		offset;
	u_int32_t		len;
} msg_t;


typedef struct{
	u_int32_t		ch;
	struct semaphore	sem;
	wait_queue_head_t	wait;
	u_int8_t		iccl;
	u_int8_t		icch;
	msg_t			msg;
}ch_info_t;

typedef struct {
	u_int32_t	intevt;
	char		*desc;
	irqreturn_t	(*isr)(int, void *, struct pt_regs *);
} irq_info_t;


static ch_info_t	i2c_info[MAX_CH];

static void activate_ch(ch_info_t	*ch_info)
{
	u_int32_t	ch = ch_info->ch;

	/* Disable power down of the channel */
	if(ch == 0)
		OUT32(MSTPCR1, IN32(MSTPCR1) & ~MSTPCR1_MSTP109);
	else
		OUT32(MSTPCR1, IN32(MSTPCR1) & ~MSTPCR1_MSTP108);

	/* Enable channel and configure rx ack */
	OUT8(ICCR(ch), IN8(ICCR(ch)) | ICCR_ICE | 
	     (rx_ack_high[ch] ? ICCR_RACK : 0));

	/* Mask all interrupts */
	ch_info->msg.int_enb = 0;
	OUT8(ICIC(ch), 0x00 );

	/* Set the clock */
	OUT8(ICCL(ch), ch_info->iccl);
	OUT8(ICCH(ch), ch_info->icch);
}


static void deactivate_ch(ch_info_t	*ch_info)
{
	u_int32_t	ch = ch_info->ch;

	/* Clear/disable interrupts */
	ch_info->msg.int_enb = 0;
	OUT8(ICSR(ch), 0x00 );
	OUT8(ICIC(ch), 0x00 );

	/* Initialize channel */
	OUT8(ICCR(ch), IN8(ICCR(ch)) & ~ICCR_ICE);

	/* Enable power down on the channel */
	if(ch == 0)
		OUT32(MSTPCR1, IN32(MSTPCR1) | MSTPCR1_MSTP109);
	else
		OUT32(MSTPCR1, IN32(MSTPCR1) | MSTPCR1_MSTP108);
}


void restart_ch(ch_info_t	*ch_info)
{
	u_int32_t	ch = ch_info->ch;

	/* Initialize channel registers */
	OUT8(ICCR(ch), IN8(ICCR(ch)) & ~ICCR_ICE);

	/* Enable channel and configure rx ack */
	OUT8(ICCR(ch), IN8(ICCR(ch)) | ICCR_ICE | 
	     (rx_ack_high[ch] ? ICCR_RACK : 0));

	/* Set the clock */
	OUT8(ICCL(ch), ch_info->iccl);
	OUT8(ICCH(ch), ch_info->icch);
}


#if DEBUG
static void dump_msg(struct i2c_msg	*msg)
{
	int		i;
	static u_int8_t	buf[1028];
	int		len = 0;

	printk(KERN_ERR "Address=%04x flags=%04x len=%04x\n", 
	       msg->addr, msg->flags, msg->len);

	if (!(msg->flags & I2C_M_RD)) {
		for (i = 0; i < msg->len; i++) {
			len += snprintf(buf + len, 1028 - len, 
					(i % 0x10) ? "%02x\n" : "%02x ", 
					msg->buf[i]);
		}
		printk(KERN_ERR "%s\n", buf);
	}
}
#endif


u32 i2c_sh7343_func(struct i2c_adapter *adapter)
{
	pr_debug("Functionality query");
	return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR;
}


static void write_data(ch_info_t	*ch_info)
{
	u_int8_t	ch = ch_info->ch;
	msg_t		*msg = &ch_info->msg;

	/* Write the data */
	OUT8(ICDR(ch), msg->usr_msg->buf[msg->offset++]);

	if (msg->offset == msg->len) {
		/* Issue a stop condition */
		OUT8(ICCR(ch), ICCR_ICE | ICCR_TRS);

		/* Disable the dte interrupt */
		msg->int_enb &= ~ICSR_DTE;
		OUT8(ICIC(ch), IN8(ICIC(ch)) & (ICIC_ALE | ICIC_TACKE | 
						ICIC_WAITE));

		msg->status = MSG_STATUS_DONE;

		/* Notify the waiting process the message was sent */
		wake_up_interruptible(&ch_info->wait);
	}
}


static void read_data(ch_info_t	*ch_info)
{
	u_int8_t	ch = ch_info->ch;
	msg_t		*msg = &ch_info->msg;
	u_int8_t	dummy;

	/* Check if we are receiving only 1 byte */
	if (msg->status == MSG_STATUS_R1) {
		/* Disable wait interrpt */
		msg->int_enb &= ~ICSR_WAIT;
		OUT8(ICIC(ch), IN8(ICIC(ch)) & (ICIC_ALE | ICIC_TACKE | 
						ICIC_DTEE));

		/* Read the data */
		msg->usr_msg->buf[msg->offset++] = IN8(ICDR(ch));

		msg->status = MSG_STATUS_DONE;

		/* Notify the waiting process the message was sent */
		wake_up_interruptible(&ch_info->wait);
	} else {
		if (msg->usr_msg->len - msg->offset > 0) {

			/* Disable dte interrupt */
			msg->int_enb &= ~ICSR_DTE;
			OUT8(ICIC(ch), IN8(ICIC(ch)) & (ICIC_ALE | ICIC_TACKE | 
							ICIC_WAITE));

			/* Read the data */
			msg->usr_msg->buf[msg->offset++] = IN8(ICDR(ch));

			/* Check if there is only 1 byte left to read */
			if (msg->usr_msg->len - msg->offset == 1)
				msg->status = MSG_STATUS_R1;
		} else {
			/* After read end. End condition set */
			dummy = IN8(ICDR(ch));

			msg->status = MSG_STATUS_DONE;

			/* Notify the waiting process the message was sent */
			wake_up_interruptible(&ch_info->wait);
		}
	}
}


static void write_addr(ch_info_t	*ch_info)
{
	u_int8_t	ch = ch_info->ch;
	msg_t		*msg = &ch_info->msg;

	/* Wrte the slave address */
	OUT8(ICDR(ch), msg->addr[msg->offset++]);

	if (msg->offset == msg->len) {
		msg->offset = 0;
		msg->len = msg->usr_msg->len;
		msg->status = MSG_STATUS_W;
	}
}


static void read_addr(ch_info_t	*ch_info)
{
	u_int8_t	ch = ch_info->ch;
	msg_t		*msg = &ch_info->msg;

	/* 10 bit addresses are different */
	if (msg->usr_msg->flags == I2C_M_TEN) {
		if (msg->offset == 0) {
			OUT8(ICDR(ch), msg->addr[msg->offset++]);
		} else if (msg->offset == 1) {
			OUT8(ICDR(ch), msg->addr[msg->offset++]);

			/* Generate a resend condition */
			OUT8(ICCR(ch), ICCR_ICE | ICCR_TRS | ICCR_BBSY);
		} else {
			/* Enable the wait interrupt */
			msg->int_enb |= ICSR_WAIT;
			OUT8(ICIC(ch), IN8(ICIC(ch)) | ICIC_WAITE );

			/* Disable the dte interrupt */
			msg->int_enb &= ~ICSR_DTE;
			OUT8(ICIC(ch), IN8(ICIC(ch)) & (ICIC_ALE | ICIC_TACKE | 
							ICIC_WAITE));

			/* Slave address write */
			OUT8(ICDR(ch), msg->addr[0]);
		}
	} else {
		/* 7 bit address type */
		/* Enable the wait interrupt */
		msg->int_enb |= ICSR_WAIT;		
		OUT8(ICIC(ch), IN8(ICIC(ch)) | ICIC_WAITE );

		/* Disable the dte interrupt */
		msg->int_enb &= ~ICSR_DTE;
		OUT8(ICIC(ch), IN8(ICIC(ch)) & (ICIC_ALE | ICIC_TACKE | 
						ICIC_WAITE));

		/* Slave address write */
		OUT8(ICDR(ch), msg->addr[0]);
	}
}


static irqreturn_t i2c_sh7343_wait_isr(int		irq, 
				       void		*dev_id,
				       struct pt_regs	*regs)
{
	u_int32_t	ch = (u_int32_t)dev_id;
	ch_info_t	*ch_info = &i2c_info[ch];
	msg_t		*msg = &ch_info->msg;

	/* Read slave address output */
	if (msg->status == MSG_STATUS_R_ADDR) {
		if (msg->usr_msg->len == 1)
			msg->status = MSG_STATUS_R1;
		else
			msg->status = MSG_STATUS_R;

		/* Send/receive change */
		OUT8(ICCR(ch), ICCR_ICE | ICCR_SCP);

		msg->offset = 0;
	} else if (msg->status == MSG_STATUS_R1) {
		/* Enable dte interrupt */
		msg->int_enb |= ICSR_DTE;
		OUT8(ICIC(ch), IN8(ICIC(ch)) | ICIC_DTEE);

		/* Set stop condition */
		OUT8(ICCR(ch), ICCR_ICE | ICCR_RACK);
	}
	else if (msg->status == MSG_STATUS_R) {
		/* Check if dte is set */
		if ((IN8(ICSR(ch)) & ICSR_DTE) == 1) {
			/* Read one byte of data */
			msg->usr_msg->buf[msg->offset++] = IN8(ICDR(ch));

			/* Check if there is only 1 byte left to read */
			if (msg->usr_msg->len - msg->offset == 1) {
				msg->status = MSG_STATUS_R1;

				/* Set stop condition */
				OUT8(ICCR(ch), ICCR_ICE | ICCR_RACK);
			}
		}

		/* Enable dte interrupt */
		msg->int_enb |= ICSR_DTE;
		OUT8(ICIC(ch), IN8(ICIC(ch)) | ICIC_DTEE);

		/* Check if there is no more data to read */
		if (msg->usr_msg->len - msg->offset == 0) {
			/* Set stop condition */
			OUT8(ICCR(ch), ICCR_ICE | ICCR_RACK);
		}
	}

	/* Clear wait interrupt */
	OUT8(ICSR(ch), IN8(ICSR(ch)) & (ICSR_AL | ICSR_TACK | ICSR_DTE));

	return IRQ_HANDLED;
}


static irqreturn_t i2c_sh7343_dte_isr(int		irq, 
				      void		*dev_id,
				      struct pt_regs	*regs)
{
	u_int32_t	ch = (u_int32_t)dev_id;
	ch_info_t	*ch_info = &i2c_info[ch];

	/* Write the message */
	if (ch_info->msg.status == MSG_STATUS_W) {
		/* Disable the wait interrupt */
		ch_info->msg.int_enb &= ~ICSR_WAIT;
		OUT8(ICIC(ch), IN8(ICIC(ch)) & (ICIC_ALE | ICIC_TACKE | 
						ICIC_DTEE));
		write_data(ch_info);
	}
	/* Read the message */
	else if (ch_info->msg.status == MSG_STATUS_R || 
		 ch_info->msg.status == MSG_STATUS_R1) {
		read_data(ch_info);
	}
	/* Write the slave address */
	else if (ch_info->msg.status == MSG_STATUS_W_ADDR) {
		/* Disable the wait interrupt */
		ch_info->msg.int_enb &= ~ICSR_WAIT;
		OUT8(ICIC(ch), IN8(ICIC(ch)) & (ICIC_ALE | ICIC_TACKE | 
						ICIC_DTEE));
		write_addr(ch_info);
	}
	/* Read slave address output */
	else if (ch_info->msg.status == MSG_STATUS_R_ADDR) {
		/* Disable the wait interrupt */
		ch_info->msg.int_enb &= ~ICSR_WAIT;
		OUT8(ICIC(ch), IN8(ICIC(ch)) & (ICIC_ALE | ICIC_TACKE | 
						ICIC_DTEE));
		read_addr(ch_info);
	}
	else{
		/* Disable the dte interrupt */
		ch_info->msg.int_enb &= ~ICSR_DTE;
		OUT8(ICIC(ch), IN8(ICIC(ch)) & (ICIC_ALE | ICIC_TACKE | 
						ICIC_WAITE));
	}

	return IRQ_HANDLED;
}


static irqreturn_t i2c_sh7343_tack_isr(int		irq, 
				       void		*dev_id,
				       struct pt_regs	*regs)
{
	u_int32_t	ch = (u_int32_t)dev_id;
	ch_info_t	*ch_info = &i2c_info[ch];

	ch_info->msg.status = MSG_STATUS_ERR;

	/* Clear TACK interrupt */
	OUT8(ICSR(ch), IN8(ICSR(ch)) & ~ICSR_TACK);

	/* Disable the dte interrupt */
	ch_info->msg.int_enb &= ~ICSR_DTE;
	OUT8(ICIC(ch), IN8(ICIC(ch)) & (ICIC_ALE | ICIC_TACKE | ICIC_WAITE));

	/* Notify the waiting process the transmition stopped */
	wake_up_interruptible(&ch_info->wait);

	return IRQ_HANDLED;
}


static irqreturn_t i2c_sh7343_al_isr(int		irq, 
				     void		*dev_id,
				     struct pt_regs	*regs)
{
	u_int32_t	ch = (u_int32_t)dev_id;
	ch_info_t	*ch_info = &i2c_info[ch];

	ch_info->msg.status = MSG_STATUS_ERR;

	/* Clear AL interrupt */
	OUT8(ICSR(ch), IN8(ICSR(ch)) & ~ICSR_AL);

	/* Disable the dte interrupt */
	ch_info->msg.int_enb &= ~ICSR_DTE;
	OUT8(ICIC(ch), IN8(ICIC(ch)) & (ICIC_ALE | ICIC_TACKE | ICIC_WAITE));

	/* Notify the waiting process the transmition stopped */
	wake_up_interruptible(&ch_info->wait);

	return IRQ_HANDLED;
}


static irq_info_t	irq_info[MAX_CH][INT_PER_CH] = {
	{{IIC0_ALI_IRQ, "I2C al-0", i2c_sh7343_al_isr},
	 {IIC0_TACKI_IRQ, "I2C tack-0", i2c_sh7343_tack_isr},
	 {IIC0_WAITI_IRQ, "I2C wait-0", i2c_sh7343_wait_isr},
	 {IIC0_DTEI_IRQ, "I2C dte-0", i2c_sh7343_dte_isr}},
	{{IIC1_ALI_IRQ, "I2C al-1", i2c_sh7343_al_isr},
	 {IIC1_TACKI_IRQ, "I2C tack-1", i2c_sh7343_tack_isr},
	 {IIC1_WAITI_IRQ, "I2C wait-1", i2c_sh7343_wait_isr},
	 {IIC1_DTEI_IRQ, "I2C dte-1", i2c_sh7343_dte_isr}}
};


static int start_ch(ch_info_t		*ch_info,
		    struct i2c_msg	*usr_msg)
{
	u_int32_t	ch = ch_info->ch;
	int		i;
	u_int8_t	val;

	/* Wait for last transfer to end */
	for (i = BUSYCHECK_TIMEOUT; i > 0; i--) {
		val = IN8(ICSR(ch));
		if (!(val & ICSR_BUSY) && val & ICSR_SCLM && val & ICSR_SDAM)
			break;
	}
	if (i == 0) {
		pr_debug("Device still busy, timeout");
		return -EBUSY;
	}

	/* Initialize channel registers */
	restart_ch(ch_info);

	/* Set up the address */
	if (usr_msg->flags & I2C_M_RD) {
		val = 1;
		ch_info->msg.status = MSG_STATUS_R_ADDR;
	}
	else {
		val = 0;
		ch_info->msg.status = MSG_STATUS_W_ADDR;
	}
	if (usr_msg->flags & I2C_M_TEN) {
		ch_info->msg.addr[0] = (u_int8_t)(((usr_msg->addr >> 7) & 6) |
						  0xf0 | val);
		ch_info->msg.addr[1] = (u_int8_t)(usr_msg->addr & 0xff);
		ch_info->msg.len = 2;
	} else {
		ch_info->msg.addr[0] = (u_int8_t)((usr_msg->addr << 1) | val);
		ch_info->msg.len = 1;
	}

	ch_info->msg.offset = 0;
	ch_info->msg.usr_msg = usr_msg;

	/* When in poll mode, remove the isrs. We need to do this because
	   the i2c wait interrupt must be enabled for the wait interrupt
	   request to be set. We remove the isrs and leave the i2c 
	   interrupts enabled. */
	if (usr_msg->flags & I2C_M_POLL) {
		for (i = 0; i < INT_PER_CH; i++)
			free_irq(irq_info[ch][i].intevt, (void *)ch);
	}

	/* Enable all interrupts except wait */
	ch_info->msg.int_enb = ICSR_AL | ICSR_TACK | ICSR_DTE;
	OUT8(ICIC(ch), IN8(ICIC(ch)) | ICIC_ALE | ICIC_TACKE | ICIC_DTEE);

	return	0;
}


static msg_status_t end_ch(ch_info_t	*ch_info)
{
	u_int32_t	ch = ch_info->ch;
	int		i;
	u_int8_t	val;
	int		rc;
	
	for (i = BUSYCHECK_TIMEOUT; i > 0; i--) {
		/* If there was an error, stop */
		if (ch_info->msg.status != MSG_STATUS_DONE) {
			break;
		} else {
			/* Wait until the transfer ends */
			val = IN8(ICSR(ch));
			if (!(val & ICSR_BUSY) && val & ICSR_SCLM && 
			    val & ICSR_SDAM) {
				break;
			}
		}
	}

	if (i == 0 || ch_info->msg.status != MSG_STATUS_DONE) {
		pr_debug("Device could not complete last event, timeout i=%d", i);
		ch_info->msg.status = MSG_STATUS_ERR;
		restart_ch(ch_info);
	}
	
	/* Mask all interrupts */
	ch_info->msg.int_enb = 0;
	OUT8(ICIC(ch), 0x00 );

	/* When in poll mode, re-insert the isrs */
	if (ch_info->msg.usr_msg->flags & I2C_M_POLL) {
		for (i = 0; i < INT_PER_CH; i++) {
			if ((rc = request_irq(irq_info[ch][i].intevt, 
					      irq_info[ch][i].isr, SA_INTERRUPT, 
					      irq_info[ch][i].desc, 
					      (void *)ch))) {
				pr_debug("request_irq() failed irq=%d, err=%d", 
				       irq_info[ch][i].intevt, rc);
				ch_info->msg.status = MSG_STATUS_ERR;
				break;
			}
		}
	}

	return ch_info->msg.status;
}


static int i2c_sh7343_xfer(struct i2c_adapter	*adapter,
			   struct i2c_msg	*msgs, 
			   int			num)
{
	int		i;
	int		j;
	ch_info_t	*ch_info;
	u_int32_t	ch;
	struct i2c_msg	*msg;
	int		err = 0;
	u_int8_t	icsr;

	pr_debug("Transfer request: num=%d", num);

	/* Validate parameters */
	if (!adapter || !msgs || !num)
		return -EINVAL;

	/* Point to the right channel info */
	ch_info = adapter->algo_data;
	ch = ch_info->ch;

	/* Serialize access to the channel */
	down_interruptible(&ch_info->sem);

	/* Initialize the channel */
	activate_ch(ch_info);

	/* Process all messages */
	for (i = 0; i < num; i++) {
		msg = &msgs[i];
		if (!msg->len || !msg->buf)
			continue;

#if DEBUG
		dump_msg(msg);
#endif
		if ((err = start_ch(ch_info, msg)))
			break;

		/* Kick start the write/read (DTE interrupts will occur) */
		OUT8(ICCR(ch), ICCR_ICE | ICCR_TRS | ICCR_BBSY);

		/* Check if poll mode was requested */
		if (msg->flags & I2C_M_POLL) {
			for (j = 0; j < POLL_EVENT_TIMEOUT; j++) {
				if (ch_info->msg.status == MSG_STATUS_DONE ||
				    ch_info->msg.status == MSG_STATUS_ERR)
					break;

				/* Monitor the interrupt request bits and 
				   call the corresponding isr */
				icsr = IN8(ICSR(ch));
				if (icsr & ICSR_AL && 
				    ch_info->msg.int_enb & ICSR_AL) {
					i2c_sh7343_al_isr(0, (void *)ch, NULL);
				}

				if (icsr & ICSR_TACK &&
					ch_info->msg.int_enb & ICSR_TACK) {
					i2c_sh7343_tack_isr(0, (void *)ch,
							    NULL);
				}

				if (icsr & ICSR_WAIT &&
					ch_info->msg.int_enb & ICSR_WAIT) {
					i2c_sh7343_wait_isr(0, (void *)ch,
							    NULL);
				}

				if (icsr & ICSR_DTE &&
				    ch_info->msg.int_enb & ICSR_DTE) {
					i2c_sh7343_dte_isr(0, (void *)ch, NULL);
				}
			}
		}
		else {
			/* Sleep until done. The isr will wake us up when the 
			   transfer is done */
			if (!wait_event_interruptible_timeout(ch_info->wait,
							      ch_info->msg.status == 
							      MSG_STATUS_DONE ||
							      ch_info->msg.status ==
							      MSG_STATUS_ERR,
							      WAIT_TIMEOUT)) {
				ch_info->msg.status = MSG_STATUS_ERR;
				pr_debug("Transfer request timed out waiting to "
				       "complete");
			}
		}

		/* Make sure the write was successfull */
		if (end_ch(ch_info) != MSG_STATUS_DONE) {
			err = -EIO;
			break;
		}
	}

	/* Put i2c peripheral in power down mode */
	deactivate_ch(ch_info);

	up(&ch_info->sem);
	if (!err)
		err = num;
	return err;
}


static struct i2c_algorithm sh7343_algo = {
	.functionality	= i2c_sh7343_func,
	.master_xfer	= i2c_sh7343_xfer,
};

static struct i2c_adapter sh7343_adapter[MAX_CH] = {
	{.owner		= THIS_MODULE,
	 .class		= I2C_CLASS_SOUND,
	 .algo		= &sh7343_algo,
	 .algo_data	= &i2c_info[0],
	 .name		= "I2C SH7343 adapter channel 0"
	},
	{.owner		= THIS_MODULE,
	 .class		= I2C_CLASS_ALL,
	 .algo		= &sh7343_algo,
	 .algo_data	= &i2c_info[1],
	 .name		= "I2C SH7343 adapter channel 1"
	}
};


/* This is a wrapper for kernel modules that need to call the transfer 
   function directly. This function can not be called in atomic context
   since it blocks */
int i2c_sh7343_xfer_mod(int		ch,
			struct i2c_msg	*msgs, 
			int		num)
{
	struct i2c_adapter	*adapter;

	adapter = ch == 0 ? &sh7343_adapter[0] : ch == 1 ? &sh7343_adapter[1] : 
		NULL;

	return i2c_sh7343_xfer(adapter, msgs, num);
}


/* This is a wrapper for kernel modules that need to call the transfer 
   function directly. It can be called in atomic context since it polls 
   the hardware until the transfer completes. */
int i2c_sh7343_xfer_mod_poll(int		ch,
			     struct i2c_msg	*msgs, 
			     int		num)
{
	struct i2c_adapter	*adapter;
	int			i;

	adapter = ch == 0 ? &sh7343_adapter[0] : ch == 1 ? &sh7343_adapter[1] : 
		NULL;

	/* Set the poll flag on all messages */
	for (i = 0; i < num; i++)
		msgs[i].flags |= I2C_M_POLL;

	return i2c_sh7343_xfer(adapter, msgs, num);
}


static int __init i2c_sh7343_init(void)
{
	int		i, j;
	u_int32_t	num;
	u_int32_t	denom;
	u_int32_t	tmp;
	int		rc = 0;

	printk(KERN_INFO "i2c-sh7343: ");

	for (i = 0; i < MAX_CH; i++) {
		i2c_info[i].ch = i;
		init_MUTEX(&i2c_info[i].sem);
		init_waitqueue_head(&i2c_info[i].wait);

		/* Calculate the value for iccl. From the data sheet:
		   iccl = (p clock ÷ transfer rate) × (L ÷ (L + H)) 
		   where L and H are the SCL low/high ratio (5/4 in this case). 
		   We also round off the result */
		num = peripheral_clk * 5;
		denom = fast_mode[i] ? FAST_SPEED : NORMAL_SPEED * 9;
		tmp = num * 10 / denom;
		if (tmp % 10 >= 5)
			i2c_info[i].iccl = (u_int8_t)((num/denom) + 1);
		else
			i2c_info[i].iccl = (u_int8_t)(num/denom);

		/* Calculate the value for icch. From the data sheet:
		   icch = (p clock ÷ transfer rate) × (H ÷ (L + H)) */
		num = peripheral_clk * 4;
		tmp = num * 10 / denom;
		if (tmp % 10 >= 5)
			i2c_info[i].icch = (u_int8_t)((num/denom) + 1);
		else
			i2c_info[i].icch = (u_int8_t)(num/denom);

		/* Power down the i2c peripheral until is needed */
		deactivate_ch(&i2c_info[i]);
	}

	/* Register all interrupts, 4 per channel */
	for (i = 0; i < MAX_CH; i++) {
		for (j = 0; j < INT_PER_CH; j++) {
			if ((rc = request_irq(irq_info[i][j].intevt, 
					      irq_info[i][j].isr, SA_INTERRUPT, 
					      irq_info[i][j].desc, 
					      (void *)i))) {
				pr_debug("request_irq() failed irq=%d, err=%d", 
				       irq_info[i][j].intevt, rc);
				for (j -= 1; j >= 0; j--) {
					free_irq(irq_info[i][j].intevt, 
						 (void *)i);
				}
				for (i -= 1; i >= 0; i--) {
					for (j = 0; j < INT_PER_CH; j++) {
						free_irq(irq_info[i][j].intevt, 
							 (void *)i);
					}
				}
				goto fail;
			}
		}
	}

	for (i = 0; i < MAX_CH; i++) {
		if ((rc = i2c_add_adapter(&sh7343_adapter[i]))) {
			pr_debug("i2c_add_adapter() failed err=%d", rc);
			for (i -= 1; i >= 0; i--) {
				i2c_del_adapter(&sh7343_adapter[i]);
			}
			for (i = 0; i < MAX_CH; i++) {
				for (j = 0; j < INT_PER_CH; j++) {
					free_irq(irq_info[i][j].intevt, 
						 (void *)i);
				}
			}
			goto fail;
		}
	}

	printk("initialized.\n");
	return 0;

fail:
	printk("failed to initialize.\n");
	return rc;
}

static void __exit i2c_sh7343_exit(void)
{
	int	i, j;

	for (i = 0; i < MAX_CH; i++) {
		i2c_del_adapter(&sh7343_adapter[i]);
	}

	for (i = 0; i < MAX_CH; i++) {
		for (j = 0; j < INT_PER_CH; j++) {
			free_irq(irq_info[i][j].intevt, (void *)i);
		}
	}

	printk(KERN_INFO "i2c-sh7343: exited\n");
}

EXPORT_SYMBOL(i2c_sh7343_xfer_mod);
EXPORT_SYMBOL(i2c_sh7343_xfer_mod_poll);
EXPORT_SYMBOL(i2c_sh7343_func);

module_param_array(rx_ack_high, bool, NULL, 0);
MODULE_PARM_DESC(rx_ack_high, "Use SDA high to ack received data");
module_param(peripheral_clk, ulong, 0);
MODULE_PARM_DESC(peripheral_clk, "Clock rate of external peripheral clock");
module_param_array(fast_mode, bool, NULL, 0);
MODULE_PARM_DESC(fast_mode, "Force fast mode (400 Kbs)");

MODULE_AUTHOR("Carlos Munoz <ca...@ke...>");
MODULE_DESCRIPTION("I2C SH7343 driver");
MODULE_LICENSE("GPL");

module_init(i2c_sh7343_init);
module_exit(i2c_sh7343_exit);

--- NEW FILE: i2c-sh7343.h ---
/*
    i2c-sh7343.h - i2c bus adapter for Renesas' SH7343 i2c peripheral.

    Copyright (c) 2006 Carlos Munoz <ca...@ke...>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/


#ifndef I2C_SH7343_H
#define I2C_SH7343_H


#define MAX_CH			2
#define NORMAL_SPEED		100000
#define FAST_SPEED		400000 

/* Four interrupts: al, tack, dte and wait */
#define INT_PER_CH		4

/* How long to wait for the last event to complete (about 100ms) */
#define BUSYCHECK_TIMEOUT	150000

/* How long to wait for an event to complete in poll mode */
#define POLL_EVENT_TIMEOUT	(BUSYCHECK_TIMEOUT * 5)

/* How long to wait for the transfer to complete (500 msec) */
#define WAIT_TIMEOUT		(500 / (1000 / HZ))

/* Register offsets */
#define	I2C_BASE		0xa4470000
#define	ICDR(ch)		(I2C_BASE + 0x00 + ch * 0x2e0000)
#define	ICCR(ch)		(I2C_BASE + 0x04 + ch * 0x2e0000)
#define	ICSR(ch)		(I2C_BASE + 0x08 + ch * 0x2e0000)
#define	ICIC(ch)		(I2C_BASE + 0x0c + ch * 0x2e0000)
#define	ICCL(ch)		(I2C_BASE + 0x10 + ch * 0x2e0000)
#define	ICCH(ch)		(I2C_BASE + 0x14 + ch * 0x2e0000)

/* Register access */
#define IN8(addr)		(*((volatile u_int8_t *)(addr)))
#define IN16(addr)		(*((volatile u_int16_t *)(addr)))
#define IN32(addr)		(*((volatile u_int32_t *)(addr)))
#define OUT8(addr, val)		(*((volatile u_int8_t *)(addr)) = (val))
#define OUT16(addr, val)	(*((volatile u_int16_t *)(addr)) = (val))
#define OUT32(addr, val)	(*((volatile u_int32_t *)(addr)) = (val))

/* Register bits */
#define ICCR_ICE		0x80
#define ICCR_RACK		0x40
#define ICCR_TRS		0x10
#define ICCR_BBSY		0x04
#define ICCR_SCP		0x01

#define ICSR_SCLM		0x80
#define ICSR_SDAM		0x40
#define ICSR_BUSY		0x10
#define ICSR_AL			0x08
#define ICSR_TACK		0x04
#define ICSR_WAIT		0x02
#define ICSR_DTE		0x01

#define ICIC_ALE		0x08
#define ICIC_TACKE		0x04
#define ICIC_WAITE		0x02
#define ICIC_DTEE		0x01

/* Interrupt event codes */
#define AL_INTEVT_CH0		0x0e00
#define TACK_INTEVT_CH0		0x0e20
#define WAIT_INTEVT_CH0		0x0e40
#define DTE_INT_EVT_CH0		0x0e60
#define AL_INTEVT_CH1		0x0780
#define TACK_INTEVT_CH1		0x07a0
#define WAIT_INTEVT_CH1		0x07c0
#define DTE_INT_EVT_CH1		0x07e0

/* Power down module */
#define MSTPCR1			0xa4150034
#define MSTPCR1_MSTP108		0x00000100
#define MSTPCR1_MSTP109		0x00000200

#endif /* I2C_SH7343_H */

Index: Kconfig
===================================================================
RCS file: /cvsroot/linuxsh/linux/drivers/i2c/busses/Kconfig,v
retrieving revision 1.12
retrieving revision 1.13
diff -u -d -r1.12 -r1.13
--- Kconfig	5 Jul 2006 08:46:48 -0000	1.12
+++ Kconfig	7 Aug 2006 10:31:50 -0000	1.13
@@ -527,4 +527,14 @@
 	  This driver can also be built as a module.  If so, the module
 	  will be called i2c-mv64xxx.
 
+config I2C_SH7343
+	tristate "Renesas sh7343 I2C Controller"
+	depends on I2C && SUPERH && CPU_SUBTYPE_SH7343
+	help
+	  If you say yes to this option, support will be included for the
+	  built-in I2C interface on the Renesas SH7343 processor.
+
+	  This driver can also be built as a module.  If so, the module
+	  will be called i2c-sh7343.
+
 endmenu

Index: Makefile
===================================================================
RCS file: /cvsroot/linuxsh/linux/drivers/i2c/busses/Makefile,v
retrieving revision 1.9
retrieving revision 1.10
diff -u -d -r1.9 -r1.10
--- Makefile	27 Mar 2006 21:06:14 -0000	1.9
+++ Makefile	7 Aug 2006 10:31:50 -0000	1.10
@@ -43,6 +43,7 @@
 obj-$(CONFIG_I2C_VOYAGER)	+= i2c-voyager.o
 obj-$(CONFIG_SCx200_ACB)	+= scx200_acb.o
 obj-$(CONFIG_SCx200_I2C)	+= scx200_i2c.o
+obj-$(CONFIG_I2C_SH7343)	+= i2c-sh7343.o
 
 ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
 EXTRA_CFLAGS += -DDEBUG

[linuxsh-cvs] CVS: linux/arch/sh/kernel/cpu/sh4 setup-sh7343.c, NONE, 1.1 Makefile, 1.15, 1.16

[Paul M. <le...@us...>]

Update of /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/sh4
In directory sc8-pr-cvs6.sourceforge.net:/tmp/cvs-serv29960/arch/sh/kernel/cpu/sh4

Modified Files:
	Makefile 
Added Files:
	setup-sh7343.c 
Log Message:
SH7343 SCIF support.



--- NEW FILE: setup-sh7343.c ---
/*
 * SH7343 Setup
 *
 *  Copyright (C) 2006  Paul Mundt
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/serial.h>
#include <asm/sci.h>

static struct plat_sci_port sci_platform_data[] = {
	{
		.mapbase	= 0xffe00000,
		.flags		= UPF_BOOT_AUTOCONF,
		.type		= PORT_SCIF,
		.irqs		= { 80, 81, 83, 82 },
	}, {
		.flags = 0,
	}
};

static struct platform_device sci_device = {
	.name		= "sh-sci",
	.id		= -1,
	.dev		= {
		.platform_data	= sci_platform_data,
	},
};

static struct platform_device *sh7343_devices[] __initdata = {
	&sci_device,
};

static int __init sh7343_devices_setup(void)
{
	return platform_add_devices(sh7343_devices,
				    ARRAY_SIZE(sh7343_devices));
}
__initcall(sh7343_devices_setup);

Index: Makefile
===================================================================
RCS file: /cvsroot/linuxsh/linux/arch/sh/kernel/cpu/sh4/Makefile,v
retrieving revision 1.15
retrieving revision 1.16
diff -u -d -r1.15 -r1.16
--- Makefile	1 Aug 2006 02:44:12 -0000	1.15
+++ Makefile	7 Aug 2006 10:10:36 -0000	1.16
@@ -14,6 +14,7 @@
 obj-$(CONFIG_CPU_SUBTYPE_SH7770)	+= setup-sh7770.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7780)	+= setup-sh7780.o
 obj-$(CONFIG_CPU_SUBTYPE_SH73180)	+= setup-sh73180.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7343)	+= setup-sh7343.o
 obj-$(CONFIG_CPU_SUBTYPE_SH4_202)	+= setup-sh4-202.o
 
 # Primary on-chip clocks (common)