[Linuxptp-users] Need help debugging failed clock synchronization

[John H. <jhu...@no...>]

Apologies if this has already been asked and answered.  I tried to look 
for solutions to my problem in the mailing list archive, but when I 
click the list archive link on the mailman page, I get a sourceforge 
page telling me Error 403 "Read access required".

I'm trying to configure a machine running CentOS 7 (3.10 kernel) with an 
Intel 82574L NIC to use PTP as its time source.  I was able to 
successfully do this with another CentOS 7 machine (Intel i350 NIC) but 
I'm having problems with this new system.  In both cases the PTP Master 
is a Spectracom SecureSync PTP Grand Master. I've followed Redhat's 
directions [1] for configuring PTP.  My ptp4l options are "-f 
/etc/ptp4l.conf -i eno1 -A" and my phc2sys option are "-a -r -u 60".  My 
ptp4l.conf file is the CentOS 7 default and the same across both 
system.  I can supply that if you think it'll be useful.  The master is 
connected to the problem machine through a non-boundary switch; 
specifically an HP-ProCurve 2910al-24g.  The other machine is connected 
through that same switch plus a non-boundary Cisco switch, and at least 
two or three more switches of unknown manufacturers.

My log shows two repeating ptp4l log messages [2] with the master offset 
counting slowly upwards.  The path delay is kind of stable but always 
negative.  What does a negative path delay mean?  The message about 
clock jump: is that saying that the ptp master clock has jumped 
forward/running fast, or is it referring to the system clock or a 
hardware clock?  Overall does anyone have any suggestions for what might 
be wrong?  FWIW [3] shows the ph2sys log messages.

Thanks in advance

[1] 
https://access.redhat.com/documentation/en-US/Red_Hat_Enterprise_Linux/7/html/System_Administrators_Guide/ch-Configuring_PTP_Using_ptp4l.html

[2]
Mar 15 15:35:47 statler ptp4l[2628]: [2582.823] clockcheck: clock jumped 
forward or running faster than expected!
Mar 15 15:37:37 statler ptp4l[2628]: [2693.041] master offset 
993697857563 s0 freq +23999999 path delay -713598018

[3]
Mar 15 15:31:22 statler systemd[1]: Started Synchronize system clock or 
PTP hardware clock (PHC).
Mar 15 15:31:33 statler phc2sys[773]: [2332.991] port 
002590.fffe.a1f6a1-1 changed state
Mar 15 15:31:33 statler phc2sys[773]: [2332.991] reconfiguring after 
port state change
Mar 15 15:31:33 statler phc2sys[773]: [2332.991] selecting 
CLOCK_REALTIME for synchronization
Mar 15 15:31:33 statler phc2sys[773]: [2332.991] selecting eno1 as the 
master clock
Mar 15 15:31:38 statler phc2sys[773]: [2333.991] port 
002590.fffe.a1f6a1-1 changed state
Mar 15 15:31:38 statler phc2sys[773]: [2333.991] reconfiguring after 
port state change
Mar 15 15:31:38 statler phc2sys[773]: [2333.991] master clock not ready, 
waiting...



-- 
-john

To be or not to be, that is the question
                 2b || !2b
(0b10)*(0b1100010) || !(0b10)*(0b1100010)
         0b11000100 || !0b11000100
         0b11000100 ||  0b00111011
                0b11111111
255, that is the answer.