Re: [Linuxptp-users] Boundary Clock with single MAC

[Reto H. <ret...@ki...>]

Hello Richard,
thank you very much for your quick reply! I have an additional question regarding the use of the DP83640 driver together with multiple PHYs:  Unfortunately in my hardware-setup each PHY has its own 25MHz crystal reference clock. The good news is, that the PTP clock input/outputs are wired together, so one PHY could output the PTP clock and the other PHYs can use this clock as PTP reference. My question is now: Does the driver support such a setup or does the recalibrate() function assume that all PHYs use the same reference clock, as it is suggested in AN-1838 (http://www.ti.com/lit/an/snla104a/snla104a.pdf) from TI.

Best regards
Reto

-----Ursprüngliche Nachricht-----
Von: Richard Cochran [mailto:ric...@gm...] 
Gesendet: Mittwoch, 22. Oktober 2014 19:55
An: Hermann Reto
Cc: 'lin...@li...'
Betreff: Re: [Linuxptp-users] Boundary Clock with single MAC

On Wed, Oct 22, 2014 at 01:55:00PM +0000, Reto Hermann wrote:
> We have an ARM Cortex A8 Processor (AM3359) with an internal
> hardware Ethernet switch. One of the switch ports is connected with
> the CPU and two ports of that switch are connected to two external
> PHYs (DP83640). Both PHYs are connected to the same MDIO bus. The
> aim of this setup is, that our devices (A and B) behave like a
> PTP-Ethernet-switch using hardware time-stamping in the PHYs and
> implement an BC (or even better an PTP v2 TC)

Coincidentally I am working on a PTP Hardware Clock driver for a
switch with a similar setup.

> [http://kiwaglxswd06.ch.int.kistler.com/wiki/swd/images/1/1a/PTP_HW.jpg]

Sorry, server not found.

> >From the CPU point of view, there is only one Ethernet MAC /
> Interface because the Ethernet switch is implemented as hardware
> module. The PHYs can be accessed separately using the MDIO bus.
> Questions:
> 
> (1) Is it possible to use the Linux PTP Project to implement a
> Boundary Clock with this hardware setup or would that require two
> independent MAC interfaces?

You need two interfaces. Linux already has drivers for the
"Distributed Switch Architecture" (DSA), where each external switch
port appears as a seperate interface on the host CPU.

If your switch supports DSA or similar, then if you take care that the
phydev driver of the DSA interfaces is the dp83640, then it might just
work.

But you will need to do some driver work. It may also be tricky to get
the switch to properly tag and forward the PTP frames to and from the
host CPU.

> (2) DP83640 Driver: I found several comments that the GPIOs of the
> PHYs should be connected together on order to be able to synchronize
> the two PHYs (recalibrate) but I did't find the detail information
> which GPIO of PHY 1should be connected to which GPIO of PHY 2.

If does not matter which GPIO. You can choose any one of these.

	1, 2, 3, 4, 8, 9, 10, 11

The dp83640 driver has a module parameter that lets you configure
this.

HTH,
Richard