Re: [Linuxptp-users] Synchronization fault with stmmac
PTP IEEE 1588 stack for Linux
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From: Mohamed B. <mbe...@ad...> - 2014-03-18 08:31:32
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Hi Jacob, ----- Mail original ----- > Hi! > > On Mon, 2014-03-17 at 17:46 +0100, BELAOUAD Mohamed wrote: > > Hi all :), > > > > I am new here but following you for 2 months since the beginning of my > > internship :p. > > > > Enough for the introduction, let's get real. I am using a Cyclone V > > from Altera (dual ARM Cortex A9 + FPGA) which includes a GMAC. > > The MAC supports HW timestamping and is used with the stmmac driver > > (same IP but slightly modified). > > > > What does slightly modified mean? The Hardware IP used in the Cyclone V is based on a Synopsys IP. Same goes for the IP covered by the stmmac driver. However, there are some extra registers and some at a different location or with a different size. For example, I had to modify the multicast Hash Table management in the driver since it was not receiving the multicast packets. The core registers of the IP are the same. To me, everything seems fine with the registers addresses related to the reception/transmit/timestamping. > > > > > My setup is the following: > > > > PC (SW timestamping) <--------> switch <------> Board (HW > > timestamping) > > > > ptp4l gives a Synchronization Fault with Hardware timestamping. > > Everything is fine with Software timestamping. > > > > I tried to set pi_offset_const to 1.0 but the clock still jumps > > backward somehow. > > > > This is almost surely caused by the driver or hardware not doing the > RightThing(tm), in regards to the clock on the MAC. I am concerned since > you said "slightly modified" hardware what that all means... Yes, I also guess it is coming from the driver. I just want to make sure that it is not a misconfiguration on my settings. As it is most likely the case and if you have any idea of the cause, do you think it is coming: - from the time management (adjust/set freq/time) - from the timestamping receive end on the hardware I think it is time to dig into the driver again (>,<). > > > > > > > Could you please help me on this matter and point me to possible > > sources of this problem? > > > > On a side note, does anyone use linuxptp with HW timestamping on > > stmmac successfully? > > > > > > > > Below is the log with -l 7. Please let me know if you need further > > information. > > > > Kernel version, and what driver you are using? I am using a 3.12 kernel from rocketboards.org git. It is a git repo with tweaks/patches for the Cyclone V and Altera is trying to push the changes upstream in the mainline. The driver, as mentioned, is stmmac from stmicro in the 3.12 kernel. > > Thanks, > Jake > > > > > Thanks, > > > > Mohamed > > Thanks for your help and your time, Mohamed > > > > > > # ./ptp4l -i eth0 -H -f test.cfg > > ptp4l[147.489]: selected /dev/ptp0 as PTP clock > > ptp4l[147.515]: port 1: INITIALIZING to LISTENING on INITIALIZE > > ptp4l[147.515]: port 0: INITIALIZING to LISTENING on INITIALIZE > > ptp4l[148.459]: port 1: new foreign master d48564.fffe.0b41d0-1 > > ptp4l[152.457]: selected best master clock d48564.fffe.0b41d0 > > ptp4l[152.457]: foreign master not using PTP timescale > > ptp4l[152.458]: port 1: LISTENING to UNCALIBRATED on RS_SLAVE > > ptp4l[153.546]: master offset -1395073665119852258 s0 freq +0 > > path delay 85828161 > > ptp4l[154.459]: master offset -1395073665720073020 s1 freq -32767999 > > path delay 85828161 > > ptp4l[155.459]: master offset -587136672 s2 freq -32767999 path delay > > 85828161 > > ptp4l[155.459]: port 1: UNCALIBRATED to SLAVE on MASTER_CLOCK_SELECTED > > ptp4l[156.458]: clockcheck: clock jumped backward or running slower > > than expected! > > ptp4l[156.458]: master offset -1237588174 s0 freq -32767999 path delay > > 149160250 > > ptp4l[156.459]: port 1: SLAVE to UNCALIBRATED on SYNCHRONIZATION_FAULT > > ptp4l[157.458]: clockcheck: clock jumped backward or running slower > > than expected! > > ptp4l[157.458]: master offset -1824727375 s0 freq -32767999 path delay > > 149160250 > > ptp4l[158.457]: clockcheck: clock jumped backward or running slower > > than expected! > > ptp4l[158.458]: master offset -2348516905 s0 freq -32767999 path delay > > 85828161 > > ptp4l[159.457]: clockcheck: clock jumped backward or running slower > > than expected! > > ptp4l[159.457]: master offset -2935665289 s0 freq -32767999 path delay > > 85828161 > > ptp4l[160.457]: clockcheck: clock jumped backward or running slower > > than expected! > > ptp4l[160.457]: master offset -3522777179 s0 freq -32767999 path delay > > 85828161 > > ptp4l[161.456]: clockcheck: clock jumped backward or running slower > > than expected! > > ptp4l[161.456]: master offset -4148584796 s0 freq -32767999 path delay > > 124477361 > > ptp4l[162.533]: clockcheck: clock jumped backward or running slower > > than expected! > > > > > > ------------------------------------------------------------------------------ > > Learn Graph Databases - Download FREE O'Reilly Book > > "Graph Databases" is the definitive new guide to graph databases and their > > applications. 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