[Linuxptp-users] phc offset explodes after a while
PTP IEEE 1588 stack for Linux
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From: Koehrer M. (ETAS/ESW5) <mat...@et...> - 2014-01-30 09:11:08
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Hi all, I am very new in using linuxptp. I want to synchronize two PC using a separate point-to-point Ethernet connection between both PCs. This Ethernet connection is used only for PTP, any other network traffic is routed via another NIC. Kernel 3.2.48-rt69 (RT_PREEMPT patch). I use the Intel Gigabit CT Desktop adapter (82574L). For this is use the latest e1000e driver (Version 2.5.4) and build it outside the kernel to have the PTP support. One of the PCs (PCA) runs using 64 bit kernel, the other PC (PCB) runs using a 32 bit kernel. linux-ptp version 1.3. On PCA I start the following commands: # ./ptp4l -i eth1 -p /dev/ptp1 -m -H -P and after a couple of seconds: # ./phc2sys -s /dev/ptp1 -w -m On PCB I do the very same (unless I have to use /dev/ptp0 here). This works really fine for a while. However after a while the value of phc explodes dramatically. The value will be -35192325800 which looks like a kind of value overrun! In hex this is 0xFFFFFFF7CE5FB958. Please see the logfiles below. What could be the issue for that?!? Thanks for any feedback on this! Regards Mathias Here are extracts of the logfiles of the two PCs. PCA: Jan 30 08:17:14 pca ptp4l: [1175.684] selected /dev/ptp1 as PTP clock Jan 30 08:17:14 pca ptp4l: [1175.684] failed to read out the clock frequency adjustment: Operation not supported Jan 30 08:17:14 pca ptp4l: [1175.684] port 1: get_ts_info not supported Jan 30 08:17:14 pca ptp4l: [1175.686] port 1: INITIALIZING to LISTENING on INITIALIZE Jan 30 08:17:14 pca ptp4l: [1175.686] port 0: INITIALIZING to LISTENING on INITIALIZE Jan 30 08:17:20 pca ptp4l: [1181.686] port 1: LISTENING to MASTER on ANNOUNCE_RECEIPT_TIMEOUT_EXPIRES Jan 30 08:17:20 pca ptp4l: [1181.686] selected best master clock 001b21.fffe.84554a Jan 30 08:17:20 pca ptp4l: [1181.686] assuming the grand master role Jan 30 08:17:48 pca ptp4l: [1209.687] port 1: new foreign master 001b21.fffe.525477-1 Jan 30 08:17:52 pca ptp4l: [1213.687] selected best master clock 001b21.fffe.525477 Jan 30 08:17:52 pca ptp4l: [1213.687] port 1: MASTER to UNCALIBRATED on RS_SLAVE Jan 30 08:17:53 pca ptp4l: [1214.688] master offset -70195994425 s0 freq +0 path delay 742 Jan 30 08:17:54 pca ptp4l: [1215.688] master offset -70196000905 s1 freq -6480 path delay 742 Jan 30 08:17:55 pca ptp4l: [1216.688] master offset -6537 s2 freq -13017 path delay 740 Jan 30 08:17:55 pca ptp4l: [1216.688] port 1: UNCALIBRATED to SLAVE on MASTER_CLOCK_SELECTED Jan 30 08:17:56 pca ptp4l: [1217.688] master offset -98 s2 freq -8539 path delay 742 Jan 30 08:17:57 pca ptp4l: [1218.688] master offset 1877 s2 freq -6594 path delay 740 Jan 30 08:17:58 pca ptp4l: [1219.688] master offset 1984 s2 freq -5924 path delay 736 Jan 30 08:17:59 pca ptp4l: [1220.688] master offset 1381 s2 freq -5931 path delay 732 Jan 30 08:18:00 pca ptp4l: [1221.688] master offset 814 s2 freq -6084 path delay 732 Jan 30 08:18:01 pca ptp4l: [1222.688] master offset 306 s2 freq -6348 path delay 728 Jan 30 08:18:02 pca ptp4l: [1223.688] master offset 40 s2 freq -6522 path delay 728 Jan 30 08:18:03 pca ptp4l: [1224.688] master offset 44 s2 freq -6506 path delay 728 Jan 30 08:18:04 pca ptp4l: [1225.688] master offset 5 s2 freq -6532 path delay 732 (....) Jan 30 08:19:11 pca ptp4l: [1292.689] master offset -6 s2 freq -6535 path delay 736 Jan 30 08:19:12 pca ptp4l: [1293.689] master offset -1 s2 freq -6532 path delay 736 ******** Start of phc2sys: Jan 30 08:19:12 pca phc2sys: [1293.734] phc offset -35192325800 s0 freq +0 delay 7266 Jan 30 08:19:13 pca ptp4l: [1294.689] master offset 44 s2 freq -6487 path delay 736 Jan 30 08:19:48 pca phc2sys: [1294.734] phc offset -35192297567 s1 freq +28228 delay 6665 Jan 30 08:19:49 pca ptp4l: [1295.689] master offset 47 s2 freq -6471 path delay 736 Jan 30 08:19:49 pca phc2sys: [1295.734] phc offset 706 s2 freq +28934 delay 6665 Jan 30 08:19:50 pca ptp4l: [1296.689] master offset -46 s2 freq -6550 path delay 738 Jan 30 08:19:50 pca phc2sys: [1296.735] phc offset 1343 s2 freq +29782 delay 6918 Jan 30 08:19:51 pca ptp4l: [1297.689] master offset 40 s2 freq -6478 path delay 736 Jan 30 08:19:51 pca phc2sys: [1297.735] phc offset 87 s2 freq +28929 delay 7279 Jan 30 08:19:52 pca ptp4l: [1298.689] master offset -89 s2 freq -6595 path delay 734 Jan 30 08:19:52 pca phc2sys: [1298.735] phc offset 102 s2 freq +28970 delay 7246 Jan 30 08:19:53 pca ptp4l: [1299.689] master offset 49 s2 freq -6484 path delay 736 Jan 30 08:19:53 pca phc2sys: [1299.735] phc offset 1354 s2 freq +30253 delay 6624 Jan 30 08:19:54 pca ptp4l: [1300.689] master offset -4 s2 freq -6522 path delay 738 Jan 30 08:19:54 pca phc2sys: [1300.735] phc offset -1532 s2 freq +27773 delay 7274 Jan 30 08:19:55 pca ptp4l: [1301.689] master offset 40 s2 freq -6479 path delay 738 Jan 30 08:19:55 pca phc2sys: [1301.735] phc offset -45 s2 freq +28801 delay 6823 Jan 30 08:19:56 pca ptp4l: [1302.689] master offset -51 s2 freq -6558 path delay 738 (....) Jan 30 08:26:40 pca phc2sys: [1706.797] phc offset 392 s2 freq +29395 delay 7273 Jan 30 08:26:41 pca ptp4l: [1707.685] master offset -18 s2 freq -6405 path delay 742 Jan 30 08:26:41 pca phc2sys: [1707.798] phc offset 1021 s2 freq +30142 delay 6896 Jan 30 08:26:42 pca ptp4l: [1708.685] master offset -25 s2 freq -6418 path delay 738 Jan 30 08:26:42 pca phc2sys: [1708.798] phc offset -483 s2 freq +28944 delay 7244 Jan 30 08:26:43 pca ptp4l: [1709.685] master offset -70368744177618 s2 freq -599999999 path delay 736 Jan 30 08:26:43 pca phc2sys: [1709.798] phc offset -67811266 s2 freq -500000 delay 7278 Jan 30 08:26:44 pca ptp4l: [1710.685] master offset -70368145248865 s2 freq -599999999 path delay 3131 Jan 30 08:26:44 pca phc2sys: [1710.798] phc offset -667045232 s2 freq -500000 delay 6418 Jan 30 08:26:45 pca ptp4l: [1711.685] master offset -70367545570068 s2 freq -599999999 path delay 5610 Jan 30 08:26:45 pca phc2sys: [1711.798] phc offset -1266289231 s2 freq -500000 delay 6651 Jan 30 08:26:46 pca ptp4l: [1712.685] master offset -70366945886718 s2 freq -599999999 path delay 8048 And PCB: Jan 30 08:18:51 pcb ptp4l: [1167.142] selected /dev/ptp0 as PTP clock Jan 30 08:18:51 pcb ptp4l: [1167.142] failed to read out the clock frequency adjustment: Operation not supported Jan 30 08:18:51 pcb ptp4l: [1167.142] port 1: get_ts_info not supported Jan 30 08:18:51 pcb ptp4l: [1167.143] port 1: INITIALIZING to LISTENING on INITIALIZE Jan 30 08:18:51 pcb ptp4l: [1167.143] port 0: INITIALIZING to LISTENING on INITIALIZE Jan 30 08:18:52 pcb ptp4l: [1168.287] port 1: new foreign master 001b21.fffe.84554a-1 Jan 30 08:18:56 pcb ptp4l: [1172.287] selected best master clock 001b21.fffe.84554a Jan 30 08:18:56 pcb ptp4l: [1172.287] assuming the grand master role Jan 30 08:18:56 pcb ptp4l: [1172.287] port 1: LISTENING to GRAND_MASTER on RS_GRAND_MASTER ******** Start of phc2sys: Jan 30 08:26:41 pcb phc2sys: [1637.218] phc offset 35017079063 s0 freq +0 delay 4679 Jan 30 08:26:07 pcb phc2sys: [1638.218] phc offset 35017116539 s1 freq +37466 delay 4679 Jan 30 08:26:08 pcb phc2sys: [1639.219] phc offset 264 s2 freq +37730 delay 4749 Jan 30 08:26:09 pcb phc2sys: [1640.219] phc offset -2373 s2 freq +35173 delay 4749 Jan 30 08:26:10 pcb phc2sys: [1641.219] phc offset -1372 s2 freq +35462 delay 4679 Jan 30 08:26:11 pcb phc2sys: [1642.219] phc offset -803 s2 freq +35619 delay 4749 Jan 30 08:26:12 pcb phc2sys: [1643.219] phc offset -1386 s2 freq +34795 delay 4680 Jan 30 08:26:13 pcb phc2sys: [1644.219] phc offset 1419 s2 freq +37184 delay 4749 Jan 30 08:26:14 pcb phc2sys: [1645.219] phc offset 1560 s2 freq +37751 delay 4749 Jan 30 08:26:15 pcb phc2sys: [1646.220] phc offset -1381 s2 freq +35278 delay 4749 Jan 30 08:26:16 pcb phc2sys: [1647.220] phc offset 1027 s2 freq +37272 delay 4749 Jan 30 08:26:17 pcb phc2sys: [1648.220] phc offset -742 s2 freq +35811 delay 4749 (...) Jan 30 08:26:39 pcb phc2sys: [1670.223] phc offset -432 s2 freq +35828 delay 4679 Jan 30 08:26:40 pcb phc2sys: [1671.223] phc offset 611 s2 freq +36741 delay 4749 Jan 30 08:26:41 pcb phc2sys: [1672.223] phc offset -30 s2 freq +36284 delay 4749 Jan 30 08:26:42 pcb phc2sys: [1673.223] phc offset -55 s2 freq +36250 delay 4679 Jan 30 08:26:43 pcb phc2sys: [1674.223] phc offset -70368743932001 s2 freq -499999 delay 4749 Jan 30 08:26:44 pcb phc2sys: [1675.223] phc offset -70368743642083 s2 freq -499999 delay 4752 Jan 30 08:26:45 pcb phc2sys: [1676.223] phc offset -70368743106050 s2 freq -499999 delay 4682 Jan 30 08:26:46 pcb phc2sys: [1677.223] phc offset -70368742570005 s2 freq -499999 delay 4682 Jan 30 08:26:47 pcb phc2sys: [1678.224] phc offset -70368742033964 s2 freq -499999 delay 4751 Jan 30 08:26:48 pcb phc2sys: [1679.224] phc offset -70368741497965 s2 freq -499999 delay 4681 Jan 30 08:26:49 pcb phc2sys: [1680.224] phc offset -70368740961901 s2 freq -499999 delay 4751 Jan 30 08:26:50 pcb phc2sys: [1681.224] phc offset -70368740425857 s2 freq -499999 delay 4751 Jan 30 08:26:51 pcb phc2sys: [1682.224] phc offset -70368739889757 s2 freq -499999 delay 4682 Jan 30 08:26:52 pcb phc2sys: [1683.224] phc offset -70368739353913 s2 freq -499999 delay 4751 |