Re: [Linuxptp-users] MPC8308rdb

[Richard C. <ric...@gm...>]

On Mon, Apr 22, 2013 at 12:36:03PM -0400, Chris LaRocque wrote:
> 
> I am using buildroot 2013.02 and have a working system. I have been trying
> to use the testptp application to verify operation of the 1588 pps, alarm,
> and trigger interface. The code compiles and executes. I get the ptp
> capabilities listing using "-c" and it is consistent with the data in
> /sys/class/ptp/ptp0; alarm=1, external trigger=2, pps = 1, periodic=0.
> 
> However, I get an error when I try to set a oneshot or periodic alarm.
> "timer_create: Operation not supported".

The driver says it has one alarm, but that is a bug. An early version
of the patch series did implement one alarm, but that code was
dropped. So the error message is the expected response. Although the
API allows timers, none of the drivers have that implemented.

I will submit a patch to fix the wrong capability result.

> Further, when I enable pps output,
> "echo '0 1' > /sys/class/ptp/ptp0/pps_enable", none of the pps pins toggle
> though no error is indicated.

The 'PPS' here is an interrupt from the ETSEC to the CPU. This
provides a PPS event just like an external GPS would, for
synchronizing the Linux system time to the PTP time.

However, you should see a 1 PPS and a 10000 PPS on the fiper output
pins. Check your datasheet to see if those pins are multiplexed. You
can change the second fiper frequency (but not phase) using the
"fsl,tmr-fiper2" device tree property.

(I never worked with your board, but I did once try the similar
MPC8313, so there might be some gotchas.)

An alternative way to measure the synchronization is to feed an
external PPS (like from the master clock) into the external time stamp
inputs.
 
> As far as I can tell this should work. The one other piece of information I
> can offer is that the DAC which drives the VCXO supplyingTSEC_TMR_CLK is
> not populated so no external clock is supplied to the interface. This
> shouldn't matter as TMRCK is available internally.

Right.

Please check that the clock settings are correct in the device tree
file for your SoC.

> What am I missing?

Sorry about the confusion. Hope this is clear to you now.

Thanks,
Richard