[Linuxptp-users] The ptp4l is not sync sometimes.
PTP IEEE 1588 stack for Linux
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From: Takahiro S. <tsh...@gm...> - 2012-03-08 07:22:43
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Hello, I am trying ptp4l with Intel EG20T. ptp4l is not sync sometimes, when we transfer many data simultaneously like follwoing. ptp4l[17353]: master offset 2 s2 adj +32755854 path delay 2942 ptp4l[17353]: master offset 31 s2 adj +32755883 path delay 2945 ptp4l[17353]: master offset -33 s2 adj +32755828 path delay 2945 ptp4l[17353]: master offset 31 s2 adj +32755883 path delay 2945 ptp4l[17353]: master offset -1 s2 adj +32755860 path delay 2945 ptp4l[17353]: master offset -41 s2 adj +32755820 path delay 2953 ptp4l[17353]: master offset -8 s2 adj +32755840 path delay 2952 ptp4l[17353]: master offset 56 s2 adj +32755902 path delay 2952 ptp4l[17353]: master offset -14 s2 adj +32755849 path delay 2958 ptp4l[17353]: master offset -55176644235214 s2 adj -50000000 path delay 2958 ptp4l[17353]: negative path delay -27588322110544 ptp4l[17353]: path_delay = (t2 - t3) + (t4 - t1) ptp4l[17353]: t2 - t3 = -55177301241888 ptp4l[17353]: t4 - t1 = +657020800 ptp4l[17353]: c1 0 ptp4l[17353]: c2 0 ptp4l[17353]: c3 0 ptp4l[17353]: master offset 2758832199206 s2 adj +50000000 path delay -2758832208390 ptp4l[17353]: master offset 2758832186448 s2 adj +50000000 path delay -2758832207792 ptp4l[17353]: master offset 2758832174544 s2 adj +50000000 path delay -2758832207792 ptp4l[17353]: master offset 2758832161990 s2 adj +50000000 path delay -2758832207590 ptp4l[17353]: master offset 2758832149267 s2 adj +50000000 path delay -2758832206995 ptp4l[17353]: master offset 2758832137072 s2 adj +50000000 path delay -2758832206960 ptp4l[17353]: master offset 2758832124875 s2 adj +50000000 path delay -2758832206891 ptp4l[17353]: master offset 2758832112171 s2 adj +50000000 path delay -2758832206379 ptp4l[17353]: master offset 2758832100043 s2 adj +50000000 path delay -2758832206379 ptp4l[17353]: master offset 2758832087416 s2 adj +50000000 path delay -2758832205880 ptp4l[17353]: master offset -136851 s2 adj +32619007 path delay 6259 ptp4l[17353]: master offset -179 s2 adj +32714624 path delay 6259 ptp4l[17353]: negative path delay -7904 ptp4l[17353]: path_delay = (t2 - t3) + (t4 - t1) ptp4l[17353]: t2 - t3 = -507698240 ptp4l[17353]: t4 - t1 = +507682432 ptp4l[17353]: c1 0 ptp4l[17353]: c2 0 ptp4l[17353]: c3 0 ptp4l[17353]: negative path delay -9136 ptp4l[17353]: path_delay = (t2 - t3) + (t4 - t1) ptp4l[17353]: t2 - t3 = -566457632 ptp4l[17353]: t4 - t1 = +566439360 ptp4l[17353]: c1 0 ptp4l[17353]: c2 0 ptp4l[17353]: c3 0 ptp4l[17353]: master offset 44452 s2 adj +32759201 path delay 3164 ptp4l[17353]: master offset 40900 s2 adj +32768985 path delay 3164 ptp4l[17353]: master offset 28141 s2 adj +32768496 path delay 3795 ptp4l[17353]: master offset 15981 s2 adj +32764778 path delay 3795 ptp4l[17353]: master offset 6644 s2 adj +32760236 path delay 4204 ptp4l[17353]: master offset 2640 s2 adj +32758225 path delay 3856 ptp4l[17353]: master offset 272 s2 adj +32756649 path delay 3856 ptp4l[17353]: master offset -11 s2 adj +32756447 path delay 3371 ptp4l[17353]: master offset -201 s2 adj +32756254 path delay 2985 ptp4l[17353]: master offset -233 s2 adj +32756162 path delay 2569 ptp4l[17353]: master offset -1025 s2 adj +32755300 path delay 3105 ptp4l[17353]: master offset -705 s2 adj +32755312 path delay 3105 ptp4l[17353]: master offset -1126 s2 adj +32754680 path delay 4294 ptp4l[17353]: master offset 212 s2 adj +32755680 path delay 4140 ptp4l[17353]: master offset 1002 s2 adj +32756534 path delay 3542 ptp4l[17353]: master offset 727 s2 adj +32756559 path delay 3145 ptp4l[17353]: master offset 114 s2 adj +32756164 path delay 3022 ptp4l[17353]: master offset -153 s2 adj +32755932 path delay 3033 ptp4l[17353]: master offset -248 s2 adj +32755791 path delay 3032 ptp4l[17353]: master offset -169 s2 adj +32755795 path delay 3017 ptp4l[17353]: master offset -105 s2 adj +32755809 path delay 3017 ptp4l[17353]: master offset -28 s2 adj +32755854 path delay 3004 I chedked t1, .. t4 value. t2 or t4 is 0 at the time. ptp4l[20494]: negative path delay -45370388164880 ptp4l[20494]: path_delay = (t2 - t3) + (t4 - t1) ptp4l[20494]: t2 - t3 = -90741482576736 ptp4l[20494]: t4 - t1 = +706246976 ptp4l[20494]: t1 = +90740776333280 ptp4l[20494]: t2 = +0 ptp4l[20494]: t3 = +90741482576736 ptp4l[20494]: t4 = +90741482580256 ptp4l[20494]: c1 0 ptp4l[20494]: c2 0 ptp4l[20494]: c3 0 I think EG20T ieee1588 hardware is independent from the GbE hardware. The GbE driver get the timestamp from ieee1588 hardware. If the 2 PTP messages are received in short period and the GbE driver can not get the timestamp in fast response, the timestamp of 2nd message can not be locked and the value is 0. So I modify the ptp4l as follows. Please see "TS add here". --- void clock_path_delay(struct clock *c, struct timespec req, struct timestamp rx, : if (pd < 0) { pr_warning("negative path delay %10lld", pd); pr_warning("path_delay = (t2 - t3) + (t4 - t1)"); pr_warning("t2 - t3 = %+10lld", t2 - t3); pr_warning("t4 - t1 = %+10lld", t4 - t1); pr_warning("t1 = %+10lld", t1); pr_warning("t2 = %+10lld", t2); pr_warning("t3 = %+10lld", t3); pr_warning("t4 = %+10lld", t4); pr_warning("c1 %10lld", c1); pr_warning("c2 %10lld", c2); pr_warning("c3 %10lld", c3); return; // TS add here } enum servo_state clock_synchronize(struct clock *c, : if ((origin != 0) && (ingress != 0)) // TS add here c->master_offset = tmv_sub(ingress, tmv_add(origin, tmv_add(c->path_delay, tmv_add(c->c1, c->c2)))); --- This means if t1, .. t4 are 0, ptp4l will not update master_offset and path_delay. After modification, ptp4l is sync always with Intel EG20T hardware. My questions are: 1. Intel EG20T ieee1588 is similar ixp4xx. Did anyone face the similar issue? 2. Is my modification correct? Thanks and Best regards, Takahiro Shimizu |