linuxptp-users

[Linuxptp-users] phc2sys: Bouncing Back and Forth Between Master and Slave

[Harold L. <hla...@pi...>]

To Whom It May Concern,

In a current design using PTP IEEE-1588 (linuxptp) for clock synchronization one of the systems continues to bounce back and forth from master to slave and vice versa and the other systems maintain original master and slave status determined some time ago. From my understanding the hierarchy is created and updated automatically by the best master clock (BMC) algorithm that runs on every clock ( or PTP IEEE-1588 system), so is this a case where one system determines it should be the master and then drops back to slave (is this correct operation, if not is there some attribute setting for minimizing the occurrence)?


root@zx3-pm3-zynq7:~# phc2sys -a -r -r -m

phc2sys[92755.856]: reconfiguring after port state change
phc2sys[92755.857]: selecting eth0 for synchronization
phc2sys[92755.857]: selecting CLOCK_REALTIME as the master clock
phc2sys[92755.857]: sys offset     -3401 s0 freq -3910000 delay   4752
phc2sys[92756.858]: sys offset     -3489 s2 freq -3910000 delay   4833
phc2sys[92757.858]: sys offset     -3582 s2 freq -3910000 delay   4770
phc2sys[92758.859]: sys offset     -3586 s2 freq -3910000 delay   4869
phc2sys[92759.859]: sys offset     -3745 s2 freq -3910000 delay   4896
phc2sys[92760.859]: sys offset     -3741 s2 freq -3910000 delay   4806
phc2sys[92761.860]: sys offset     -3802 s2 freq -3910000 delay   4779
phc2sys[92762.860]: sys offset     -3796 s2 freq -3910000 delay   4788
phc2sys[92763.860]: sys offset     -3803 s2 freq -3910000 delay   4815
phc2sys[92764.861]: sys offset     -3956 s2 freq -3910000 delay   4842
phc2sys[92765.861]: sys offset     -3987 s2 freq -3910000 delay   4797
phc2sys[92766.862]: sys offset     -4046 s2 freq -3910000 delay   4923
phc2sys[92767.862]: sys offset     -4102 s2 freq -3910000 delay   4815
phc2sys[92768.862]: sys offset     -4155 s2 freq -3910000 delay   4815
phc2sys[92769.863]: sys offset     -4205 s2 freq -3910000 delay   4779
phc2sys[92770.863]: sys offset     -4273 s2 freq -3910000 delay   4743
phc2sys[92771.863]: sys offset     -4281 s2 freq -3910000 delay   4851
phc2sys[92772.864]: sys offset     -4350 s2 freq -3910000 delay   4770
phc2sys[92773.864]: sys offset     -4399 s2 freq -3910000 delay   4797
phc2sys[92774.864]: port 00214a.fffe.000003-1 changed state
phc2sys[92774.865]: port 00214a.fffe.000003-1 changed state
phc2sys[92774.865]: reconfiguring after port state change
phc2sys[92774.865]: selecting CLOCK_REALTIME for synchronization
phc2sys[92774.866]: selecting eth0 as the master clock
phc2sys[92774.866]: phc offset      4756 s0 freq     -33 delay   1434
phc2sys[92775.866]: phc offset      4795 s2 freq      +6 delay   1425
phc2sys[92776.866]: phc offset      4830 s2 freq   +4836 delay   1407
phc2sys[92777.867]: phc offset        26 s2 freq   +1481 delay   1413
phc2sys[92778.867]: phc offset     -1462 s2 freq      +1 delay   1407
phc2sys[92779.867]: phc offset     -1455 s2 freq    -431 delay   1401
phc2sys[92780.868]: phc offset      -984 s2 freq    -396 delay   1440
phc2sys[92781.868]: phc offset      -552 s2 freq    -260 delay   1425
phc2sys[92782.868]: phc offset      -313 s2 freq    -186 delay   1380
phc2sys[92783.869]: phc offset       -90 s2 freq     -57 delay   1401
phc2sys[92784.869]: phc offset       -32 s2 freq     -26 delay   1401
phc2sys[92785.869]: phc offset        35 s2 freq     +31 delay   1425
phc2sys[92786.870]: port 00214a.fffe.000003-1 changed state
phc2sys[92786.870]: reconfiguring after port state change
phc2sys[92786.870]: selecting eth0 for synchronization
phc2sys[92786.870]: selecting CLOCK_REALTIME as the master clock
phc2sys[92786.871]: sys offset       287 s2 freq -3909713 delay   4833
phc2sys[92787.871]: sys offset       280 s2 freq -3909634 delay   4824
phc2sys[92788.871]: sys offset       310 s2 freq -3909520 delay   4941
phc2sys[92789.872]: sys offset       288 s2 freq -3909449 delay   4752
phc2sys[92790.872]: sys offset       326 s2 freq -3909324 delay   4770
phc2sys[92791.872]: sys offset       299 s2 freq -3909254 delay   4752
phc2sys[92792.873]: sys offset       326 s2 freq -3909137 delay   4842


Thanks,
Harold

Re: [Linuxptp-users] phc2sys: Bouncing Back and Forth Between Master and Slave

[Richard C. <ric...@gm...>]

On Wed, Sep 16, 2015 at 04:17:55PM +0000, Harold Lapprich wrote:
> In a current design using PTP IEEE-1588 (linuxptp) for clock
> synchronization one of the systems continues to bounce back and
> forth from master to slave and vice versa and the other systems
> maintain original master and slave status determined some time
> ago. From my understanding the hierarchy is created and updated
> automatically by the best master clock (BMC) algorithm that runs on
> every clock ( or PTP IEEE-1588 system), so is this a case where one
> system determines it should be the master and then drops back to
> slave (is this correct operation, if not is there some attribute
> setting for minimizing the occurrence)?

Yes, the BMC determines the role of each port automatically.

And no, there is no attribute to prevent the role changing.  This is
supposed to happen if the GM goes missing, for example.  You *can*
influence the timing of the BMC using logAnnounceInterval and
announceReceiptTimeout.  See the ptp4l man page for details.

Richard