Thread: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC
PTP IEEE 1588 stack for Linux
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From: John L. <joh...@fo...> - 2017-05-16 16:04:05
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Hello, I am trying to add ptp support into my Altera Arria 10 SoC dev kit (Cortex-A9). Eventually I would like to use a 10G MAC with SGDMAs and SFP port, but for now I am trying to get it working using the ARM HPS Gb-EMAC and Micrel KSZ9031RN triple speed PHY . I have built Linux both using Yocto and also my own build from Altera's LTSI kernel and Buildroot/Busybox for filesystem. My question is how to add LinuxPTP to my embedded Linux and add driver bindings to the MAC, etc. so that I can run as an OC slave? I have downloaded the LinuxPTP source, and set my: ARCH=arm CROSS_COMPILE=CROSS_COMPILE=/localcad/skyfather/ArriaX/ltsi_4_1_33/gcc-lin aro-5.4.1-2017.01-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- And then I ran: make install which put the output files into usr/local/sbin and usr/local/man/man8 Can I just copy those directories to my embedded Linux FS and run them? BTW - When I run ethtool -T eth0 to check capabilities I get: Time stamping parameters for eth0: Capabilities: hardware-transmit (SOF_TIMESTAMPING_TX_HARDWARE) software-transmit (SOF_TIMESTAMPING_TX_SOFTWARE) hardware-receive (SOF_TIMESTAMPING_RX_HARDWARE) software-receive (SOF_TIMESTAMPING_RX_SOFTWARE) software-system-clock (SOF_TIMESTAMPING_SOFTWARE) hardware-raw-clock (SOF_TIMESTAMPING_RAW_HARDWARE) PTP Hardware Clock: 0 Hardware Transmit Timestamp Modes: off (HWTSTAMP_TX_OFF) on (HWTSTAMP_TX_ON) Hardware Receive Filter Modes: none (HWTSTAMP_FILTER_NONE) all (HWTSTAMP_FILTER_ALL) ptpv1-l4-event (HWTSTAMP_FILTER_PTP_V1_L4_EVENT) ptpv1-l4-sync (HWTSTAMP_FILTER_PTP_V1_L4_SYNC) ptpv1-l4-delay-req (HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) ptpv2-l4-event (HWTSTAMP_FILTER_PTP_V2_L4_EVENT) ptpv2-l4-sync (HWTSTAMP_FILTER_PTP_V2_L4_SYNC) ptpv2-l4-delay-req (HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) ptpv2-event (HWTSTAMP_FILTER_PTP_V2_EVENT) ptpv2-sync (HWTSTAMP_FILTER_PTP_V2_SYNC) ptpv2-delay-req (HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) root@arria10:/# Thank you, John |
From: Richard C. <ric...@gm...> - 2017-05-16 20:00:39
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On Tue, May 16, 2017 at 10:44:13AM -0500, John Lemonovich wrote: > And then I ran: make install which put the output files into > usr/local/sbin and usr/local/man/man8 BTW, your can do 'make install DESTDIR=/my/embedded/fs' to install the binaries and man pages to the proper place. > Can I just copy those directories to my embedded Linux FS and run them? Yes. Thanks, Richard |
From: John L. <joh...@fo...> - 2017-05-17 13:51:30
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Richard, Thanks for the reply! I have the slave link up running the best master clock routine. I am going to program another Arria 10 SoC as the master and see if I can sync. Do you know if wireshark can filter/decode on PTP only messages only? John L. -----Original Message----- From: Richard Cochran [mailto:ric...@gm...] Sent: Tuesday, May 16, 2017 4:00 PM To: John Lemonovich <joh...@fo...> Cc: lin...@li... Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC On Tue, May 16, 2017 at 10:44:13AM -0500, John Lemonovich wrote: > And then I ran: make install which put the output files into > usr/local/sbin and usr/local/man/man8 BTW, your can do 'make install DESTDIR=/my/embedded/fs' to install the binaries and man pages to the proper place. > Can I just copy those directories to my embedded Linux FS and run them? Yes. Thanks, Richard |
From: John L. <joh...@fo...> - 2017-05-17 19:29:17
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Richard, I was able to get the files compiled/installed and was able to run one A10 dev kit as the GM, and the other as a slave. When using software timestamping, it seemed to work and achieve an offset of around 100us or so. Now I am trying with the -H option for PHC to achieve better timing (hopefully). Should it work for the EMAC with the 4.1.22-ltsi-altera kernel? I had to adjust tx_timestamp_timeout up to 100 (maybe smaller would work, I think 10 did not work) to avoid faults. At first the master offset numbers start around -1000 and come up to 0 and then keep climbing forever, as if it's servo'ing but getting no feedback. I get a clockcheck warning for every master offset print: ptp4l[2546.894]: clockcheck: clock jumped backward or running slower than expected! ptp4l[2546.894]: master offset -45 s0 freq +6859 path delay 1205 ptp4l[2547.894]: clockcheck: clock jumped backward or running slower than expected! ptp4l[2547.926]: master offset -45 s0 freq +6859 path delay 1205 ptp4l[2548.894]: clockcheck: clock jumped backward or running slower than expected! ptp4l[2548.926]: master offset -5 s0 freq +6859 path delay 1205 ptp4l[2549.894]: clockcheck: clock jumped backward or running slower than expected! ptp4l[2549.926]: master offset 0 s0 freq +6859 path delay 1200 ptp4l[2550.894]: clockcheck: clock jumped backward or running slower than expected! ptp4l[2550.926]: master offset 40 s0 freq +6859 path delay 1200 ptp4l[2551.894]: clockcheck: clock jumped backward or running slower than expected! ptp4l[2551.926]: master offset 40 s0 freq +6859 path delay 1200 ptp4l[2552.894]: clockcheck: clock jumped backward or running slower than expected! ptp4l[2552.926]: master offset 80 s0 freq +6859 path delay 1200 ptp4l[2553.894]: clockcheck: clock jumped backward or running slower than expected! ptp4l[2553.923]: master offset 80 s0 freq +6859 path delay 1200 ptp4l[2554.894]: clockcheck: clock jumped backward or running slower than expected! ptp4l[2554.926]: master offset 120 s0 freq +6859 path delay 1200 ptp4l[2555.894]: clockcheck: clock jumped backward or running slower than expected! ptp4l[2555.898]: master offset 160 s0 freq +6859 path delay 1200 ptp4l[2556.894]: clockcheck: clock jumped backward or running slower than expected! ptp4l[2556.926]: master offset 160 s0 freq +6859 path delay 1200 ptp4l[2557.894]: clockcheck: clock jumped backward or running slower than expected! ptp4l[2557.926]: master offset 200 s0 freq +6859 path delay 1200 ptp4l[2558.894]: clockcheck: clock jumped backward or running slower than expected! ptp4l[2558.926]: master offset 220 s0 freq +6859 path delay 1200 Thank you, John -----Original Message----- From: Richard Cochran [mailto:ric...@gm...] Sent: Tuesday, May 16, 2017 4:00 PM To: John Lemonovich <joh...@fo...> Cc: lin...@li... Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC On Tue, May 16, 2017 at 10:44:13AM -0500, John Lemonovich wrote: > And then I ran: make install which put the output files into > usr/local/sbin and usr/local/man/man8 BTW, your can do 'make install DESTDIR=/my/embedded/fs' to install the binaries and man pages to the proper place. > Can I just copy those directories to my embedded Linux FS and run them? Yes. Thanks, Richard |
From: Richard C. <ric...@gm...> - 2017-05-18 12:26:45
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On Wed, May 17, 2017 at 02:29:09PM -0500, John Lemonovich wrote: > Now I am trying with the -H option for PHC to achieve better timing > (hopefully). Should it work for the EMAC with the 4.1.22-ltsi-altera > kernel? IIRC, last time I looked, the altera HW and drivers are hopelessly broken. Ditto for the similar xilinx parts. Neither have drivers in mainline Linux, IIRC. Thanks, Richard |
From: John L. <joh...@fo...> - 2017-05-18 13:02:30
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Richard, That's what I was afraid of. It seemed as though SW timestamping was working, but then I had a problem with my rootfs in my Linux build, and I didn't go back to try it again. The Altera TSE MAC is listed as supported (whereas the ARM EMAC is not, specifically), would you suspect I would have more luck with that? It's only listed as supporting software timestamping - not PHC. Thank you, John -----Original Message----- From: Richard Cochran [mailto:ric...@gm...] Sent: Thursday, May 18, 2017 8:27 AM To: John Lemonovich <joh...@fo...> Cc: lin...@li... Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC On Wed, May 17, 2017 at 02:29:09PM -0500, John Lemonovich wrote: > Now I am trying with the -H option for PHC to achieve better timing > (hopefully). Should it work for the EMAC with the 4.1.22-ltsi-altera > kernel? IIRC, last time I looked, the altera HW and drivers are hopelessly broken. Ditto for the similar xilinx parts. Neither have drivers in mainline Linux, IIRC. Thanks, Richard |
From: Hunter O. <hu...@al...> - 2017-05-18 16:00:05
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John, I'm going through the same troubles right now on Altera's Cyclone V SOC platform. I've found that if no PTP clock is specified for the emac entry in your device tree, the stmmac driver defaults to expect the emac clock (250Mhz), but it seems Altera is feeding in the eosc1 clock (25mhz). If you run the testptp application, you'll see the ptp clock is running at 1/10th speed. This is causing ptp4l to throw those 'clockcheck' warnings that you're seeing. See *https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd* <https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd>for how to add the ptp clock to your device tree, allowing the driver to grab the correct ptp clock rate. I also backported to Altera's 4.1.22 some ptp related commits that show up in mainline kernel 4.5, such as: *https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f <https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f>* Like you noticed, I had to bump ptp4l's tx_timestamp_timeout up to 100. Still testing, but it appears LinuxPTP H/W timestamping works after these changes. Regards, Hunter On Thu, May 18, 2017 at 9:02 AM, John Lemonovich < joh...@fo...> wrote: > Richard, > > That's what I was afraid of. It seemed as though SW timestamping was > working, but then I had a problem with my rootfs in my Linux build, and I > didn't go back to try it again. > > The Altera TSE MAC is listed as supported (whereas the ARM EMAC is not, > specifically), would you suspect I would have more luck with that? It's > only listed as supporting software timestamping - not PHC. > > Thank you, > > John > > -----Original Message----- > From: Richard Cochran [mailto:ric...@gm...] > Sent: Thursday, May 18, 2017 8:27 AM > To: John Lemonovich <joh...@fo...> > Cc: lin...@li... > Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC > > On Wed, May 17, 2017 at 02:29:09PM -0500, John Lemonovich wrote: > > Now I am trying with the -H option for PHC to achieve better timing > > (hopefully). Should it work for the EMAC with the 4.1.22-ltsi-altera > > kernel? > > IIRC, last time I looked, the altera HW and drivers are hopelessly broken. > Ditto for the similar xilinx parts. > > Neither have drivers in mainline Linux, IIRC. > > Thanks, > Richard > > ------------------------------------------------------------ > ------------------ > Check out the vibrant tech community on one of the world's most > engaging tech sites, Slashdot.org! http://sdm.link/slashdot > _______________________________________________ > Linuxptp-users mailing list > Lin...@li... > https://lists.sourceforge.net/lists/listinfo/linuxptp-users > |
From: Phil R. <pr...@el...> - 2017-05-22 05:44:01
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On 18/05/2017 23:29, Hunter Olson wrote: > John, > > I'm going through the same troubles right now on Altera's Cyclone V SOC platform. > > I've found that if no PTP clock is specified for the emac entry in your device tree, the stmmac driver defaults to expect the emac clock (250Mhz), but it seems > Altera is feeding in the eosc1 clock (25mhz). If you run the testptp application, you'll see the ptp clock is running at 1/10th speed. This is causing ptp4l > to throw those 'clockcheck' warnings that you're seeing. > > See _https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd_ > <https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd>for how to add the ptp clock to your device tree, allowing the driver to grab > the correct ptp clock rate. > > I also backported to Altera's 4.1.22 some ptp related commits that show up in mainline kernel 4.5, such as: > _https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f > <https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f>_ > > Like you noticed, I had to bump ptp4l's tx_timestamp_timeout up to 100. > > Still testing, but it appears LinuxPTP H/W timestamping works after these changes. From memory there where also issues with the ptp clk config and resets with those older kernels. Some related patches to things I had tofix to get it going.. https://github.com/torvalds/linux/commit/734e00fa02eff5003827abc06a7ebf9449349109 https://github.com/torvalds/linux/commit/e6dbe1eb2db0d7a14991c06278dd3030c45fb825 https://github.com/torvalds/linux/commit/43569814fa35b2ae68f09780c4ee3d4a182711e9 https://github.com/torvalds/linux/commit/27015f8c17578e14b3c6cc098b915b0f8db3ac36 -- Regards Phil Reid |
From: Baya O. <bay...@gm...> - 2017-05-22 07:16:27
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Hallo Reid, I am about to use PTP on my Altera Cyclone V. I want to use the altera 1588 solution IP core. Iam using quaturs to set my system .. Please could you let me know what variable I should enable in the configuration, also which PTP open software do you use. Will it work by using the PTP Linux one? or is there a version for NIOS Altera. I thank you in advance for your help, Baya 2017-05-22 7:17 GMT+02:00 Phil Reid <pr...@el...>: > On 18/05/2017 23:29, Hunter Olson wrote: > > John, > > > > I'm going through the same troubles right now on Altera's Cyclone V SOC > platform. > > > > I've found that if no PTP clock is specified for the emac entry in your > device tree, the stmmac driver defaults to expect the emac clock (250Mhz), > but it seems > > Altera is feeding in the eosc1 clock (25mhz). If you run the testptp > application, you'll see the ptp clock is running at 1/10th speed. This is > causing ptp4l > > to throw those 'clockcheck' warnings that you're seeing. > > > > See _https://github.com/torvalds/linux/commit/ > bf171f01afe31f0c593deb55b96c3cb9e20cd6dd_ > > <https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3c > b9e20cd6dd>for how to add the ptp clock to your device tree, allowing the > driver to grab > > the correct ptp clock rate. > > > > I also backported to Altera's 4.1.22 some ptp related commits that show > up in mainline kernel 4.5, such as: > > _https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0 > cd0098714f > > <https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0 > cd0098714f>_ > > > > Like you noticed, I had to bump ptp4l's tx_timestamp_timeout up to 100. > > > > Still testing, but it appears LinuxPTP H/W timestamping works after > these changes. > > From memory there where also issues with the ptp clk config and resets > with those older kernels. > Some related patches to things I had tofix to get it going.. > > > https://github.com/torvalds/linux/commit/734e00fa02eff5003827abc06a7ebf > 9449349109 > https://github.com/torvalds/linux/commit/e6dbe1eb2db0d7a14991c06278dd30 > 30c45fb825 > https://github.com/torvalds/linux/commit/43569814fa35b2ae68f09780c4ee3d > 4a182711e9 > https://github.com/torvalds/linux/commit/27015f8c17578e14b3c6cc098b915b > 0f8db3ac36 > > > -- > Regards > Phil Reid > > > ------------------------------------------------------------ > ------------------ > Check out the vibrant tech community on one of the world's most > engaging tech sites, Slashdot.org! http://sdm.link/slashdot > _______________________________________________ > Linuxptp-users mailing list > Lin...@li... > https://lists.sourceforge.net/lists/listinfo/linuxptp-users > |
From: Ian T. <Ian...@pg...> - 2017-05-17 13:39:36
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John We are running ptp4l on a Cyclone V SoC through the stmicro mac. Are you using that or the Altera triple-speed mac? The stmmac driver has a few quirks with Kernel 3.18 but things improve with later kernels >4.8. The driver doesn't use the correct system call for setting initial timings and ptp4l will do a re-initialize on certain fault conditions. We see missing delay request responses under heavy traffic loads and then will get a "glitch" in ptp times. Unfortunately, we can't move to the later kernels, as we don't believe the PCIe root port is configured correctly with 4.x kernels, which we need to work. Good Luck Ian T. From: John Lemonovich [mailto:joh...@fo...] Sent: Tuesday, May 16, 2017 10:44 AM To: lin...@li... Subject: [External] [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC Hello, I am trying to add ptp support into my Altera Arria 10 SoC dev kit (Cortex-A9). Eventually I would like to use a 10G MAC with SGDMAs and SFP port, but for now I am trying to get it working using the ARM HPS Gb-EMAC and Micrel KSZ9031RN triple speed PHY . I have built Linux both using Yocto and also my own build from Altera's LTSI kernel and Buildroot/Busybox for filesystem. My question is how to add LinuxPTP to my embedded Linux and add driver bindings to the MAC, etc. so that I can run as an OC slave? I have downloaded the LinuxPTP source, and set my: ARCH=arm CROSS_COMPILE=CROSS_COMPILE=/localcad/skyfather/ArriaX/ltsi_4_1_33/gcc-linaro-5.4.1-2017.01-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- And then I ran: make install which put the output files into usr/local/sbin and usr/local/man/man8 Can I just copy those directories to my embedded Linux FS and run them? BTW - When I run ethtool -T eth0 to check capabilities I get: Time stamping parameters for eth0: Capabilities: hardware-transmit (SOF_TIMESTAMPING_TX_HARDWARE) software-transmit (SOF_TIMESTAMPING_TX_SOFTWARE) hardware-receive (SOF_TIMESTAMPING_RX_HARDWARE) software-receive (SOF_TIMESTAMPING_RX_SOFTWARE) software-system-clock (SOF_TIMESTAMPING_SOFTWARE) hardware-raw-clock (SOF_TIMESTAMPING_RAW_HARDWARE) PTP Hardware Clock: 0 Hardware Transmit Timestamp Modes: off (HWTSTAMP_TX_OFF) on (HWTSTAMP_TX_ON) Hardware Receive Filter Modes: none (HWTSTAMP_FILTER_NONE) all (HWTSTAMP_FILTER_ALL) ptpv1-l4-event (HWTSTAMP_FILTER_PTP_V1_L4_EVENT) ptpv1-l4-sync (HWTSTAMP_FILTER_PTP_V1_L4_SYNC) ptpv1-l4-delay-req (HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) ptpv2-l4-event (HWTSTAMP_FILTER_PTP_V2_L4_EVENT) ptpv2-l4-sync (HWTSTAMP_FILTER_PTP_V2_L4_SYNC) ptpv2-l4-delay-req (HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) ptpv2-event (HWTSTAMP_FILTER_PTP_V2_EVENT) ptpv2-sync (HWTSTAMP_FILTER_PTP_V2_SYNC) ptpv2-delay-req (HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) root@arria10:/# Thank you, John |
From: John L. <joh...@fo...> - 2017-05-17 13:57:55
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Ian, Thanks for the response. I am using the HPS EMAC, not the TSE MAC.although there is no reason I can't use the TSE MAC really. My kernel version is the 4.1.22-ltsi-altera (Angstrom v2015.12 built with Yocto). What accuracy have you been able to achieve using the TSE MAC? Are you using SW timestamping only? John L. From: Ian Thompson [mailto:Ian...@pg...] Sent: Wednesday, May 17, 2017 9:39 AM To: John Lemonovich <joh...@fo...>; lin...@li... Subject: RE: Adding LinuxPTP to Arria 10 SoC John We are running ptp4l on a Cyclone V SoC through the stmicro mac. Are you using that or the Altera triple-speed mac? The stmmac driver has a few quirks with Kernel 3.18 but things improve with later kernels >4.8. The driver doesn't use the correct system call for setting initial timings and ptp4l will do a re-initialize on certain fault conditions. We see missing delay request responses under heavy traffic loads and then will get a "glitch" in ptp times. Unfortunately, we can't move to the later kernels, as we don't believe the PCIe root port is configured correctly with 4.x kernels, which we need to work. Good Luck Ian T. From: John Lemonovich [mailto:joh...@fo...] Sent: Tuesday, May 16, 2017 10:44 AM To: lin...@li... <mailto:lin...@li...> Subject: [External] [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC Hello, I am trying to add ptp support into my Altera Arria 10 SoC dev kit (Cortex-A9). Eventually I would like to use a 10G MAC with SGDMAs and SFP port, but for now I am trying to get it working using the ARM HPS Gb-EMAC and Micrel KSZ9031RN triple speed PHY . I have built Linux both using Yocto and also my own build from Altera's LTSI kernel and Buildroot/Busybox for filesystem. My question is how to add LinuxPTP to my embedded Linux and add driver bindings to the MAC, etc. so that I can run as an OC slave? I have downloaded the LinuxPTP source, and set my: ARCH=arm CROSS_COMPILE=CROSS_COMPILE=/localcad/skyfather/ArriaX/ltsi_4_1_33/gcc-lin aro-5.4.1-2017.01-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf- And then I ran: make install which put the output files into usr/local/sbin and usr/local/man/man8 Can I just copy those directories to my embedded Linux FS and run them? BTW - When I run ethtool -T eth0 to check capabilities I get: Time stamping parameters for eth0: Capabilities: hardware-transmit (SOF_TIMESTAMPING_TX_HARDWARE) software-transmit (SOF_TIMESTAMPING_TX_SOFTWARE) hardware-receive (SOF_TIMESTAMPING_RX_HARDWARE) software-receive (SOF_TIMESTAMPING_RX_SOFTWARE) software-system-clock (SOF_TIMESTAMPING_SOFTWARE) hardware-raw-clock (SOF_TIMESTAMPING_RAW_HARDWARE) PTP Hardware Clock: 0 Hardware Transmit Timestamp Modes: off (HWTSTAMP_TX_OFF) on (HWTSTAMP_TX_ON) Hardware Receive Filter Modes: none (HWTSTAMP_FILTER_NONE) all (HWTSTAMP_FILTER_ALL) ptpv1-l4-event (HWTSTAMP_FILTER_PTP_V1_L4_EVENT) ptpv1-l4-sync (HWTSTAMP_FILTER_PTP_V1_L4_SYNC) ptpv1-l4-delay-req (HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) ptpv2-l4-event (HWTSTAMP_FILTER_PTP_V2_L4_EVENT) ptpv2-l4-sync (HWTSTAMP_FILTER_PTP_V2_L4_SYNC) ptpv2-l4-delay-req (HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) ptpv2-event (HWTSTAMP_FILTER_PTP_V2_EVENT) ptpv2-sync (HWTSTAMP_FILTER_PTP_V2_SYNC) ptpv2-delay-req (HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) root@arria10:/# Thank you, John |
From: John L. <joh...@fo...> - 2017-05-26 20:51:17
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Hello, I am happy to report that I was able to get HW timestamping working and two of my A10 SoC kits (one as GM , one as slave) are synchronized, and the pps output / offset reports are maintaining @ <30-40ns! It’s really neat to watch them converge on the scope! Thanks very much to Ian and Hunter, who both helped me to figure things out. I do have some problem where they suddenly lose sync after about 5 minutes or so. The offsets suddenly jump way up and it never gets back in sync. I will be debugging this next. ************************************************************************** Just as information, in case it helps someone else who is trying to get ptp HW timestamping working in an Altera SoC using the HPS EMAC, I thought I would list what I had to do: First off I am using the Altera-opensource 4.1.33-ltsi kernel on Arria 10 SoC kits, so results may be different with different kits/kernels/device trees. There are a few ptp-related kernel options in the .config file that must be set to =y (yes). Just search for PTP or 1588 and enable everything, or use the menu tool for the same. The Cyclone V SoC and Arria10 SoC have implemented the STM Synopsys MAC IP Core (stmmac) for the HPS MAC. Upon boot it should report: stmmac - user ID: 0x10, Synopsys ID: 0x37 Once you verify this - the driver files are located in /drivers/net/ethernet/stmicro/stmmac I then manually applied the changes to a few of these driver files per https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f The device tree source must be changed to add the ptp engine clock, and this must (obviously) be the correct clock for your implementation. This was tricky for the A10 as there are dozens of clocks and I kept getting it wrong until I figured it all out. For the A10 Qsys has an option for using the Main PLL Clock or Peripheral PLL clock. For my system I am using the C4 output (Feature EMAC PTP) Peripheral PLL clock @ 100MHz. In order to direct the driver to this clock there are 2 lines that must be changed in the device tree source (you can see the old and new here): //clocks = <&l4_mp_clk>; /* appended from boardinfo */ clocks = <&l4_mp_clk &peri_emac_ptp_clk>; /* appended from boardinfo */ //clock-names = "stmmaceth"; /* embeddedsw.dts.params.clock-names type STRING */ clock-names = "stmmaceth","clk_ptp_ref"; /* embeddedsw.dts.params.clock-names type STRING */ And then I downloaded and compiled the linuxPTP source, and installed the output programs/files into my rootfs. When running the ptp4l program (see man pages or search online for help) I had to increase the following parameter, based on errors I was getting (this was actually a suggestion from the program itself via the console). [global] tx_timestamp_timeout 100 So I made a ptp4l.conf file with these lines, and then directed ptp4l to use this file as a config file. There is a very helpful command for debugging the ptp engine clocking and it is: phc_ctl /dev/ptp0 freq 10000 set 0.0 wait 10.0 get This will delay for 10 seconds from epoch and report how much time has elapsed from epoch, based on the ptp clock. The output should be as follows, if it’s reporting more or less then 10 seconds have elapsed, there is a clock problem! phc_ctl[9886.541]: adjusted clock frequency offset to 10000.000000ppb phc_ctl[9886.541]: set clock time to 0.000000000 or Thu Jan 1 00:00:00 1970 phc_ctl[9896.541]: process slept for 10.000000 seconds phc_ctl[9896.542]: clock time is 10.000404880 or Thu Jan 1 00:00:10 1970 Thank you, John L. From: Hunter Olson [mailto:hu...@al...] Sent: Thursday, May 18, 2017 11:30 AM To: John Lemonovich <joh...@fo...> Cc: lin...@li... Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC John, I'm going through the same troubles right now on Altera's Cyclone V SOC platform. I've found that if no PTP clock is specified for the emac entry in your device tree, the stmmac driver defaults to expect the emac clock (250Mhz), but it seems Altera is feeding in the eosc1 clock (25mhz). If you run the testptp application, you'll see the ptp clock is running at 1/10th speed. This is causing ptp4l to throw those 'clockcheck' warnings that you're seeing. See <https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd> https://github.com/torvalds/linux/commit/bf171f01afe31f0c593deb55b96c3cb9e20cd6dd for how to add the ptp clock to your device tree, allowing the driver to grab the correct ptp clock rate. I also backported to Altera's 4.1.22 some ptp related commits that show up in mainline kernel 4.5, such as: https://github.com/torvalds/linux/commit/19d857c9038e5c07db8f8cc02b5ad0cd0098714f Like you noticed, I had to bump ptp4l's tx_timestamp_timeout up to 100. Still testing, but it appears LinuxPTP H/W timestamping works after these changes. Regards, Hunter On Thu, May 18, 2017 at 9:02 AM, John Lemonovich <joh...@fo... <mailto:joh...@fo...> > wrote: Richard, That's what I was afraid of. It seemed as though SW timestamping was working, but then I had a problem with my rootfs in my Linux build, and I didn't go back to try it again. The Altera TSE MAC is listed as supported (whereas the ARM EMAC is not, specifically), would you suspect I would have more luck with that? It's only listed as supporting software timestamping - not PHC. Thank you, John -----Original Message----- From: Richard Cochran [mailto:ric...@gm... <mailto:ric...@gm...> ] Sent: Thursday, May 18, 2017 8:27 AM To: John Lemonovich <joh...@fo... <mailto:joh...@fo...> > Cc: lin...@li... <mailto:lin...@li...> Subject: Re: [Linuxptp-users] Adding LinuxPTP to Arria 10 SoC On Wed, May 17, 2017 at 02:29:09PM -0500, John Lemonovich wrote: > Now I am trying with the -H option for PHC to achieve better timing > (hopefully). Should it work for the EMAC with the 4.1.22-ltsi-altera > kernel? IIRC, last time I looked, the altera HW and drivers are hopelessly broken. Ditto for the similar xilinx parts. Neither have drivers in mainline Linux, IIRC. Thanks, Richard ------------------------------------------------------------------------------ Check out the vibrant tech community on one of the world's most engaging tech sites, Slashdot.org! http://sdm.link/slashdot _______________________________________________ Linuxptp-users mailing list Lin...@li... <mailto:Lin...@li...> https://lists.sourceforge.net/lists/listinfo/linuxptp-users |