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From: Aditya V. <adi...@5g...> - 2023-01-16 10:10:39
|
Hi Miroslav, Attaching the slave and master's config files below. On Mon, Jan 16, 2023 at 3:38 PM Miroslav Lichvar <mli...@re...> wrote: > On Mon, Jan 16, 2023 at 12:17:33PM +0530, Aditya Venu via Linuxptp-users > wrote: > > Hi All, > > In other words, what could be the reason for slave's servo clock state > not > > going to locked state? > > Clock stepping would be one example. > > > Literally stuck at this point. Any inputs will help me in setting the > > direction for debugging. > > If you provided your config, you might get a better advice. > > -- > Miroslav Lichvar > > -- Disclaimer:- This footer text is to convey that this email is sent by one of the users of IITH. So, do not mark it as SPAM. |
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From: Miroslav L. <mli...@re...> - 2023-01-16 10:08:59
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On Mon, Jan 16, 2023 at 12:17:33PM +0530, Aditya Venu via Linuxptp-users wrote: > Hi All, > In other words, what could be the reason for slave's servo clock state not > going to locked state? Clock stepping would be one example. > Literally stuck at this point. Any inputs will help me in setting the > direction for debugging. If you provided your config, you might get a better advice. -- Miroslav Lichvar |
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From: Aditya V. <adi...@5g...> - 2023-01-16 06:47:53
|
Hi All, In other words, what could be the reason for slave's servo clock state not going to locked state? Literally stuck at this point. Any inputs will help me in setting the direction for debugging. -Aditya On Fri, Jan 13, 2023 at 12:32 PM Aditya Venu <adi...@5g...> wrote: > Hi fellow linuxptp users, > > I want to know what might be the reason for the slave's clock servo state > not going to locked state. State always oscillates between S0 and S1. Here > are my setup details. > > a) My FPGA card acting as a ptp master > b) Intel NIC as a ptp slave > c) I'm doing two step, HW timestamping > d) I'm using default config files for both master and slave(attaching them > for reference) > > The slave's servo state wouldn't get locked after running the master and > slave. What can be the potential reason for that? > > Please let me know if any further information is required. > > Regards, > Aditya > -- Disclaimer:- This footer text is to convey that this email is sent by one of the users of IITH. So, do not mark it as SPAM. |
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From: Aditya V. <adi...@5g...> - 2023-01-13 07:02:47
|
Hi fellow linuxptp users, I want to know what might be the reason for the slave's clock servo state not going to locked state. State always oscillates between S0 and S1. Here are my setup details. a) My FPGA card acting as a ptp master b) Intel NIC as a ptp slave c) I'm doing two step, HW timestamping d) I'm using default config files for both master and slave(attaching them for reference) The slave's servo state wouldn't get locked after running the master and slave. What can be the potential reason for that? Please let me know if any further information is required. Regards, Aditya -- Disclaimer:- This footer text is to convey that this email is sent by one of the users of IITH. So, do not mark it as SPAM. |
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From: Gururaj B. <gur...@gm...> - 2023-01-13 05:30:10
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> The option works for me. @Miroslav Lichvar, Could you elaborate how you test this to confirm the behavior? I'll try the same too. On Thu, 12 Jan 2023 at 17:38, Gururaj Badiger <gur...@gm...> wrote: > That was a typo. I set it to 20 nanoseconds. > Monitor comparing the reference timing of Dev2 with Delay introduced > Timing of Dev1 (i.e., Dev1 has Delay Asymmetry set to 20ns). > . > > > On Thu, 12 Jan 2023 at 17:22, Miroslav Lichvar <mli...@re...> > wrote: > >> On Thu, Jan 12, 2023 at 04:21:11PM +0530, Gururaj Badiger wrote: >> > Waveform Monitor takes Black inputs generated by Dev1 and Dev2 devices. >> > >> > In this setup, Dev2 is locked to Dev1 PTP Leader. Now, when I change the >> > "delayAsymmetry '' value of Dev2, from 0 to 20us, we are expecting a >> timing >> > shift in Waveform Monitor. However, we dont see any change. >> > This seems to indicate the value set to parameter delayAsymmetry doesn't >> > have any effect. >> >> The option works for me. Did you set it to 20000 (nanoseconds)? >> What exactly is the monitor comparing, two PPS signals from PHC on the >> server and client? >> >> -- >> Miroslav Lichvar >> >> |
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From: Gururaj B. <gur...@gm...> - 2023-01-12 12:09:29
|
That was a typo. I set it to 20 nanoseconds. Monitor comparing the reference timing of Dev2 with Delay introduced Timing of Dev1 (i.e., Dev1 has Delay Asymmetry set to 20ns). . On Thu, 12 Jan 2023 at 17:22, Miroslav Lichvar <mli...@re...> wrote: > On Thu, Jan 12, 2023 at 04:21:11PM +0530, Gururaj Badiger wrote: > > Waveform Monitor takes Black inputs generated by Dev1 and Dev2 devices. > > > > In this setup, Dev2 is locked to Dev1 PTP Leader. Now, when I change the > > "delayAsymmetry '' value of Dev2, from 0 to 20us, we are expecting a > timing > > shift in Waveform Monitor. However, we dont see any change. > > This seems to indicate the value set to parameter delayAsymmetry doesn't > > have any effect. > > The option works for me. Did you set it to 20000 (nanoseconds)? > What exactly is the monitor comparing, two PPS signals from PHC on the > server and client? > > -- > Miroslav Lichvar > > |
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From: Miroslav L. <mli...@re...> - 2023-01-12 11:52:35
|
On Thu, Jan 12, 2023 at 04:21:11PM +0530, Gururaj Badiger wrote: > Waveform Monitor takes Black inputs generated by Dev1 and Dev2 devices. > > In this setup, Dev2 is locked to Dev1 PTP Leader. Now, when I change the > "delayAsymmetry '' value of Dev2, from 0 to 20us, we are expecting a timing > shift in Waveform Monitor. However, we dont see any change. > This seems to indicate the value set to parameter delayAsymmetry doesn't > have any effect. The option works for me. Did you set it to 20000 (nanoseconds)? What exactly is the monitor comparing, two PPS signals from PHC on the server and client? -- Miroslav Lichvar |
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From: Gururaj B. <gur...@gm...> - 2023-01-12 10:51:54
|
Hello, I have been using ptp4l and my setup has 3 devices. 1. Dev1 running with ptp4l LEADER 2. Dev2 is running with ptp4l FOLLOWER. 3. Also a Waveform Monitor Waveform Monitor takes Black inputs generated by Dev1 and Dev2 devices. In this setup, Dev2 is locked to Dev1 PTP Leader. Now, when I change the "delayAsymmetry '' value of Dev2, from 0 to 20us, we are expecting a timing shift in Waveform Monitor. However, we dont see any change. This seems to indicate the value set to parameter delayAsymmetry doesn't have any effect. Could someone help me with, 1. How do we check/test if the delayAsymmetry value is being effective in ptp4l 2. Are there any other settings that need to be modified to get it working?. Let me know if you need more information. Thankyou, Guru |
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From: Richard C. <ric...@gm...> - 2023-01-11 14:19:38
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On Thu, Jan 05, 2023 at 09:54:21AM -0500, Jason Lehmann wrote:
> Hello,
>
> I am polling pmc in a thread at 1hz in a program with the following command
> -
>
> statusResp = exec("pmc -u -s /var/run/ptp4lro -i /tmp/pmc.socket 'GET
> TIME_STATUS_NP'");
>
> It returns the status but takes about 100ms to execute. Is this time
> expected or is there a way to reduce it?
That doesn't sound unreasonable.
If you want better performance, you can script your own PMC client using:
https://github.com/erezgeva/libpmc
HTH,
Richard
|
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From: Aditya V. <adi...@5g...> - 2023-01-11 12:33:17
|
Got it. Thanks. On Wed, Jan 11, 2023 at 5:39 PM Miroslav Lichvar <mli...@re...> wrote: > On Wed, Jan 11, 2023 at 03:33:31PM +0530, Aditya Venu via Linuxptp-users > wrote: > > I'm doing a two step time stamping and acting as a master. My doubt is: > > Should the sequence ID for sync, followup, announce, delay req and delay > > resp as shown in the screenshot be the same for one iteration? > > Only messages that are responses to other message are expected to have > the same sequence ID. That is sync and follow_up, delay_req and > delay_resp, and pdelay_req and pdelay_resp/pdelay_resp_follow_up. > > > > > After the follow_up is received by the slave, will the immediate next > > message from the slave be delay_request? > > No, delay requests are independent from sync/followup messages. There > can be zero, one, or multiple delay requests between two sync > messages. > > -- > Miroslav Lichvar > > -- Disclaimer:- This footer text is to convey that this email is sent by one of the users of IITH. So, do not mark it as SPAM. |
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From: Miroslav L. <mli...@re...> - 2023-01-11 12:09:45
|
On Wed, Jan 11, 2023 at 03:33:31PM +0530, Aditya Venu via Linuxptp-users wrote: > I'm doing a two step time stamping and acting as a master. My doubt is: > Should the sequence ID for sync, followup, announce, delay req and delay > resp as shown in the screenshot be the same for one iteration? Only messages that are responses to other message are expected to have the same sequence ID. That is sync and follow_up, delay_req and delay_resp, and pdelay_req and pdelay_resp/pdelay_resp_follow_up. > > After the follow_up is received by the slave, will the immediate next > message from the slave be delay_request? No, delay requests are independent from sync/followup messages. There can be zero, one, or multiple delay requests between two sync messages. -- Miroslav Lichvar |
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From: Aditya V. <adi...@5g...> - 2023-01-11 11:07:33
|
Hi fellow ptp4l users, Need help in understanding reg sequence id I'm doing a two step time stamping and acting as a master. My doubt is: Should the sequence ID for sync, followup, announce, delay req and delay resp as shown in the screenshot be the same for one iteration? After the follow_up is received by the slave, will the immediate next message from the slave be delay_request? If it doesn't happen like that, can I assume something is not right? Regards, Aditya -- Disclaimer:- This footer text is to convey that this email is sent by one of the users of IITH. So, do not mark it as SPAM. |
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From: Jason L. <ja...@as...> - 2023-01-05 15:17:44
|
Hello,
I am polling pmc in a thread at 1hz in a program with the following
command -
statusResp = exec("pmc -u -s /var/run/ptp4lro -i /tmp/pmc.socket 'GET
TIME_STATUS_NP'");
It returns the status but takes about 100ms to execute. Is this time
expected or is there a way to reduce it?
Thanks,
Jason
|
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From: Richard C. <ric...@gm...> - 2023-01-04 14:22:52
|
On Wed, Jan 04, 2023 at 08:55:51AM +0530, Gururaj Badiger wrote: > Could someone clarify why these multiple ports are getting created for each > PTP insace and what is the significance of these extra ports. The port numbering follows the requirements of IEEE standard 1588. If you run ONE ptp4l instance using both ports, then the port numbering will be what you are expecting. HTH, Richard |
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From: Gururaj B. <gur...@gm...> - 2023-01-04 03:26:43
|
Hello, I have two PTP ports (PTP1 and PTP2) running with two ptp4l instances respectively. When I observe the syslogs, I see logs with multiple port numbers under each PTP instance. I was expecting one port for each PTP instance. Below is the syslog snippet. For each port (ptp1 and ptp2), *port0*, *port1 *etc., are created. Could someone clarify why these multiple ports are getting created for each PTP insace and what is the significance of these extra ports. *Mar 24 10:25:33 magneto-pq16-2.local ptp4l: [17.684] ptp1 ioctl SIOCETHTOOL failed: No such deviceMar 24 10:25:33 magneto-pq16-2.local ptp4l: [17.684] ptp1 selected /dev/ptp0 as PTP clockMar 24 10:25:33 magneto-pq16-2.local ptp4l: [17.686] ptp1 port 2: get_ts_info not supportedMar 24 10:25:33 magneto-pq16-2.local ptp4l: [17.687] ptp1 port 1: INITIALIZING to LISTENING on INIT_COMPLETEMar 24 10:25:33 magneto-pq16-2.local ptp4l: [17.691] ptp1 ioctl SIOCGIFHWADDR failed: No such deviceMar 24 10:25:33 magneto-pq16-2.local ptp4l: [17.696] ptp1 ioctl SIOCGIFINDEX failed: No such deviceMar 24 10:25:33 magneto-pq16-2.local ptp4l: [17.696] ptp1 port 2: INITIALIZING to FAULTY on FAULT_DETECTED (FT_UNSPECIFIED)Mar 24 10:25:33 magneto-pq16-2.local ptp4l: [17.696] ptp1 port 0: INITIALIZING to LISTENING on INIT_COMPLETEMar 24 10:25:37 magneto-pq16-2.local ptp4l: [21.037] ptp1 port 1: LISTENING to MASTER on ANNOUNCE_RECEIPT_TIMEOUT_EXPIRESMar 24 10:25:37 magneto-pq16-2.local ptp4l: [21.037] ptp1 selected local clock 009056.fffe.151617 as best masterMar 24 10:25:37 magneto-pq16-2.local ptp4l: [21.037] ptp1 port 1: assuming the grand master roleMar 24 10:25:37 magneto-pq16-2.local ptp4l: [21.037] ptp1 port 2: assuming the grand master roleMar 24 10:25:38 magneto-pq16-2.local ptp4l: [22.760] ptp2 ioctl SIOCETHTOOL failed: No such deviceMar 24 10:25:38 magneto-pq16-2.local ptp4l: [22.760] ptp2 selected /dev/ptp1 as PTP clockMar 24 10:25:38 magneto-pq16-2.local ptp4l: [22.761] ptp2 port 2: get_ts_info not supportedMar 24 10:25:38 magneto-pq16-2.local ptp4l: [22.761] ptp2 port 1: INITIALIZING to LISTENING on INIT_COMPLETEMar 24 10:25:38 magneto-pq16-2.local ptp4l: [22.766] ptp2 ioctl SIOCGIFHWADDR failed: No such deviceMar 24 10:25:38 magneto-pq16-2.local ptp4l: [22.770] ptp2 ioctl SIOCGIFINDEX failed: No such deviceMar 24 10:25:38 magneto-pq16-2.local ptp4l: [22.770] ptp2 port 2: INITIALIZING to FAULTY on FAULT_DETECTED (FT_UNSPECIFIED)Mar 24 10:25:38 magneto-pq16-2.local ptp4l: [22.771] ptp2 port 0: INITIALIZING to LISTENING on INIT_COMPLETEMar 24 10:25:42 magneto-pq16-2.local ptp4l: [26.479] ptp2 selected local clock 009056.fffe.121314 as best masterMar 24 10:25:42 magneto-pq16-2.local ptp4l: [26.479] ptp2 port 2: assuming the grand master roleMar 24 10:25:42 magneto-pq16-2.local ptp4l: [26.479] ptp2 port 2: master state recommended in slave only modeMar 24 10:25:42 magneto-pq16-2.local ptp4l: [26.479] ptp2 port 2: defaultDS.priority1 probably misconfiguredMar 24 10:25:45 magneto-pq16-2.local ptp4l: [29.615] ptp2 selected local clock 009056.fffe.121314 as best masterMar 24 10:25:45 magneto-pq16-2.local ptp4l: [29.615] ptp2 port 2: assuming the grand master roleMar 24 10:25:45 magneto-pq16-2.local ptp4l: [29.615] ptp2 port 2: master state recommended in slave only modeMar 24 10:25:45 magneto-pq16-2.local ptp4l: [29.615] ptp2 port 2: defaultDS.priority1 probably misconfiguredJan 4 02:14:26 magneto-pq16-2.local avahi-daemon[267]: Registering new address record for 169.254.184.208 on eth0.IPv4.* Thanks in advance. Regards, Guru Gururaj S.Badiger |
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From: <lyn...@L3...> - 2022-12-20 22:06:37
|
Hello,
I have ptp4l configured as a slave with 2 master clocks (the second to act as a backup if the first fails). About 50% of the time when starting ptp4l after it has been stopped for several minutes, ptp4l will signal for one of the master clocks to send sync messages and then proceed to make send delay_req to the other master clock. As a result ptp4l will be unable to calculate the offset for either master clock and will not sync up with either of the clocks' times.
In my ptp4l.conf file I have:
[global]
#
# Default Data Set
#
twoStepFlag 0
slaveOnly 1
...
[unicast_master_table]
table_id 1
logQueryInterval 2
UDPv4 10.128.39.33
UDPv4 10.128.39.34
The clocks I am using are the Microchip TimeProvider 4100 (priority2 set to 128) and the Trimble Thunderbolt PTP GM200 (priority2 set to 129).
When the issue is occurring and I run the following command:
pmc -u -b 0 -f ptp4l.conf "get TIME_STATUS_NP"
I get:
sending: GET TIME_STATUS_NP
7ea070.fffe.014392-0 seq 0 RESPONSE MANAGEMENT TIME_STATUS_NP
master_offset 0
ingress_time 0
cumulativeScaledRateOffset +0.000000000
scaledLastGmPhaseChange 0
gmTimeBaseIndicator 0
lastGmPhaseChange 0x0000'0000000000000000.0000
gmPresent true
gmIdentity 00b0ae.fffe.0740a6
These are the logs produced by ptp4l:
ptp4l[525]: [31.405] selected /dev/ptp1 as PTP clock
ptp4l[525]: [31.408] port 0: hybrid_e2e only works with E2E
ptp4l[525]: [31.410] port 1: INITIALIZING to LISTENING on INIT_COMPLETE
ptp4l[525]: [31.411] port 0: INITIALIZING to LISTENING on INIT_COMPLETE
ptp4l[525]: [36.532] port 1: new foreign master 001747.fffe.70156c-1
ptp4l[525]: [37.391] port 1: new foreign master 00b0ae.fffe.0740a6-2
ptp4l[525]: [37.782] selected local clock 7ea070.fffe.014392 as best master
ptp4l[525]: [40.567] selected best master clock 001747.fffe.70156c
ptp4l[525]: [40.567] updating UTC offset to 37
ptp4l[525]: [40.567] port 1: LISTENING to UNCALIBRATED on RS_SLAVE
ptp4l[525]: [41.391] selected best master clock 00b0ae.fffe.0740a6
ptp4l[525]: [41.392] updating UTC offset to 37
ptp4l[525]: [44.627] selected best master clock 00b0ae.fffe.0740a6
ptp4l[525]: [44.627] updating UTC offset to 37
ptp4l[525]: [48.678] selected best master clock 00b0ae.fffe.0740a6
ptp4l[525]: [48.678] updating UTC offset to 37
ptp4l[525]: [52.708] selected best master clock 00b0ae.fffe.0740a6
ptp4l[525]: [52.708] updating UTC offset to 37
We are typically running ptp4l version 2.0, but I have also tested this against 3.1.1 and have observed the same issue. We using Linux kernel version 5.10.69.
Is this a bug or do I have something improperly configured?
Thank you,
Lyndsey
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From: First L. <ssr...@gm...> - 2022-12-20 01:57:47
|
Hello, I am trying to implement both the Ingress and Egress methods as outlined in this document: (link <https://www.ieee802.org/1/files/public/docs2016/as-aregev-measuring-recovered-clock-quality.pdf>, pages 3 and 5). My setup is very simple, it's just a Grandmaster running automotive-master.cfg and a slave running automotive-slave.cfg. I plan on adding a time-aware bridge between the two, later on, but for now it's just the two PTP nodes. The Ingress method is already built into LinuxPTP, and is able to be accessed using pmc using GET TIME_STATUS_NP, under the master_offset field. For the Egress Method, the Time Error needs to be calculated on the Master, I need the values of pathDelay, requestReceiptTimestamp (when PDelay_Req is received by master, t4), and the timestamp when PDelay_Req is sent out (pdelayReqEventEgressTimestamp, t3). The pathDelay and requestReceiptTimestamp are values I can get, but in order to receive the timestamp when PDelay_Req is sent from slave to master, I need a management/signaling message to request that value. Upon looking at pmc_common.c and pmc.c, I can't find a management/signaling message that gives me a value for the PDelay_Req Egress Timestamp. Is this implemented into LinuxPTP, or is this something I will need to change myself? Regards, |
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From: James C. <jj...@jc...> - 2022-12-13 16:49:37
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I am experimenting using ts2phc with a GPS module connected to an i210-T1. I have a question and a bug report. 1. In Richard's helpful guide ( https://linuxptp.sourceforge.net/i210-rework/i210-rework.html), he describes making this connection via two RS232 transceivers. In my experiment, I am powering the GPS with a USB-to-TTL converter plugged into the same PC as the i210-T1 with - the GND pin of the GPS, the GND pin on the 6-pin header of the i210-T1 and the GND pin of the USB-TTL converter all connected - the PPS pin of the GPS connected to the SDP0 pin on the i210-T1 - the other GPS pins (TX, RX, VCC) connected to the USB-TTL converter This seems to work fine, but I am wondering if it risks damaging the PC (I know very little about the hardware side of things). 2. The GPS pulse width is 0.1s. Since the i210 timestamps both edges, I am using ts2phc.extts_polarity both ts2phc.pulsewidth 100000000 This works great with ts2phc -s generic (with the system clock synchronized by chrony). But when I use ts2phc -s nmea, both edges are ignored. The log looks like this: Dec 13 21:47:13 fedora ts2phc[5953]: [9098.668] nmea sentence: GNRMC,144713.000,A,1343.91532,N,10038.69349,E,0.00,0.00,131222,,,A,V Dec 13 21:47:13 fedora ts2phc[5953]: [9098.748] nmea sentence: GPTXT,01,01,01,ANTENNA OK Dec 13 21:47:14 fedora ts2phc[5953]: [9099.354] nmea delay: 313627523 ns Dec 13 21:47:14 fedora ts2phc[5953]: [9099.354] enp1s0 SKIP extts index 0 at 1670942870.999978485 src 1670942870.686460377 Dec 13 21:47:14 fedora ts2phc[5953]: [9099.454] nmea delay: 313627523 ns Dec 13 21:47:14 fedora ts2phc[5953]: [9099.454] enp1s0 SKIP extts index 0 at 1670942871.099978644 src 1670942870.786456578 Dec 13 21:47:14 fedora ts2phc[5953]: [9099.675] nmea sentence: GNRMC,144714.000,A,1343.91532,N,10038.69349,E,0.00,0.00,131222,,,A,V Dec 13 21:47:14 fedora ts2phc[5953]: [9099.739] nmea sentence: GPTXT,01,01,01,ANTENNA OK Dec 13 21:47:15 fedora ts2phc[5953]: [9100.354] nmea delay: 320719950 ns Dec 13 21:47:15 fedora ts2phc[5953]: [9100.354] enp1s0 SKIP extts index 0 at 1670942871.999978482 src 1670942871.679368362 Dec 13 21:47:15 fedora ts2phc[5953]: [9100.454] nmea delay: 320719950 ns Dec 13 21:47:15 fedora ts2phc[5953]: [9100.454] enp1s0 SKIP extts index 0 at 1670942872.099978632 src 1670942871.779363564 Dec 13 21:47:15 fedora ts2phc[5953]: [9100.682] nmea sentence: GNRMC,144715.000,A,1343.91532,N,10038.69349,E,0.00,0.00,131222,,,A,V Dec 13 21:47:15 fedora ts2phc[5953]: [9100.762] nmea sentence: GPTXT,01,01,01,ANTENNA OK Dec 13 21:47:16 fedora ts2phc[5953]: [9101.354] nmea delay: 328011876 ns Dec 13 21:47:16 fedora ts2phc[5953]: [9101.354] enp1s0 SKIP extts index 0 at 1670942872.999978478 src 1670942872.672071554 Dec 13 21:47:16 fedora ts2phc[5953]: [9101.454] nmea delay: 328011876 ns Dec 13 21:47:16 fedora ts2phc[5953]: [9101.454] enp1s0 SKIP extts index 0 at 1670942873.099978629 src 1670942872.772072077 I have tried both 3.1.1 and the current git source. I had a look at the source, and it is not clear to me that the current approach can work in the nmea case. I wonder if we could decide whether to ignore an edge by considering the time elapsed since the previous edge. This won't work if the pulsewidth is close to 0.5s, but the most common default pulsewidth for GPS modules seems to be 0.1s. James |
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From: Subramanyam, A. <ama...@ra...> - 2022-12-13 05:25:37
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Hi, LinuxPTP community We are trying to use the VPHC feature for a few test cases, and we saw that the number of Virtual clocks is limited to 20 by the PTP driver code. Is there any reason for this? https://lwn.net/ml/linux-kernel/202...@nx.../ [cid:image002.jpg@01D90EE1.6185F620] [cid:image004.jpg@01D90EE1.6185F620] Thanks, Amar Thanks, Amar |
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From: Nemo C. <nem...@gm...> - 2022-12-05 17:37:39
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This helps, Thank you Miroslav!
On Monday, 5 December, 2022 at 03:22:44 am GMT-5, Miroslav Lichvar <mli...@re...> wrote:
On Thu, Dec 01, 2022 at 09:36:54PM +0000, Nemo Crypto wrote:
> Hi Experts,
>
> According to the man page of phc2sys, it is used to synchronize 2 or more clocks in the system. May I know what does this mean?
Maybe more clear would be to say it synchronizes one or more clocks to
another clock.
With some options it doesn't even have to synchronize anything.
> To my understanding, phc2sys is used to synchronize the system clock based on the phc in 2 ways, either by directly reading the phc time periodically, or using the PHC's PPS output as PPS source. So it is always for synchronizing the system clock? I do not understand why 2 or more clocks would be synchronized? Does it mean, there could be multiple system clocks and minimum no. of sys clock is 2?
There is just one system clock.
> option -a => I looked at the code, and according to this, it is "autocfg". Can someone please explain the scenario of this autocfg?
Instead of the clocks being specified on the phc2sys command line it
asks ptp4l with what clocks it is configured.
> The manpage says - read the "clocks" to synchronize. Does it mean, there can be multiple PHC?
> Can there be one PHC on each port of a system?
Yes, it depends on the hardware. Each port of a NIC can have its own
PHC or they can share a common PHC.
--
Miroslav Lichvar
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From: Miroslav L. <mli...@re...> - 2022-12-05 08:22:50
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On Thu, Dec 01, 2022 at 09:36:54PM +0000, Nemo Crypto wrote: > Hi Experts, > > According to the man page of phc2sys, it is used to synchronize 2 or more clocks in the system. May I know what does this mean? Maybe more clear would be to say it synchronizes one or more clocks to another clock. With some options it doesn't even have to synchronize anything. > To my understanding, phc2sys is used to synchronize the system clock based on the phc in 2 ways, either by directly reading the phc time periodically, or using the PHC's PPS output as PPS source. So it is always for synchronizing the system clock? I do not understand why 2 or more clocks would be synchronized? Does it mean, there could be multiple system clocks and minimum no. of sys clock is 2? There is just one system clock. > option -a => I looked at the code, and according to this, it is "autocfg". Can someone please explain the scenario of this autocfg? Instead of the clocks being specified on the phc2sys command line it asks ptp4l with what clocks it is configured. > The manpage says - read the "clocks" to synchronize. Does it mean, there can be multiple PHC? > Can there be one PHC on each port of a system? Yes, it depends on the hardware. Each port of a NIC can have its own PHC or they can share a common PHC. -- Miroslav Lichvar |
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From: Nemo C. <nem...@gm...> - 2022-12-01 21:37:04
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Hi Experts, According to the man page of phc2sys, it is used to synchronize 2 or more clocks in the system. May I know what does this mean? To my understanding, phc2sys is used to synchronize the system clock based on the phc in 2 ways, either by directly reading the phc time periodically, or using the PHC's PPS output as PPS source. So it is always for synchronizing the system clock? I do not understand why 2 or more clocks would be synchronized? Does it mean, there could be multiple system clocks and minimum no. of sys clock is 2? option -a => I looked at the code, and according to this, it is "autocfg". Can someone please explain the scenario of this autocfg? The manpage says - read the "clocks" to synchronize. Does it mean, there can be multiple PHC? Can there be one PHC on each port of a system? Thanks,Nemo |
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From: Nemo C. <nem...@gm...> - 2022-11-30 23:47:11
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Hi James,This is wonderful! Thank you so much!
On Tuesday, 29 November, 2022 at 08:33:58 pm GMT-5, James Clark <jj...@jc...> wrote:
I have been working on a guide to using PTP on the CM4:
https://github.com/jclark/rpi-cm4-ptp-guide
Fortunately, it is not necessary to recompile the kernel. You just need to make sure you use the 20220830 version of the kernel. You can do this by adding an apt pin. If you have already upgraded to a bad kernel, then you can download and install a good version from the raspberry pi archive. Details here:
https://github.com/jclark/rpi-cm4-ptp-guide/blob/main/os.md
This has now been fixed in the raspberrypi stable kernel:
https://github.com/raspberrypi/linux/issues/5104#issuecomment-1304593383
so it should be in the next update.
James
On Wed, Nov 30, 2022 at 3:16 AM Maciek Machnikowski <ma...@ma...> wrote:
On 28 Nov 2022, at 23:30, Nemo Crypto <nem...@gm...> wrote:
Hi All,
I found that Rasberry Pi CM4 has support for PTP timestamping. It has Gigabit Ethernet PHY with IEEE 1588 support.If anyone is using the same and running ptp4l on it, please respond. We can collaborate.
Thanks :)
Linuxptp runs on RPi CM4 with HW timestamping support and 1PPS in/out. See details in this thread: https://github.com/raspberrypi/linux/issues/4151#issuecomment-1214951075
Bear in mind that this support was disabled in mainstream kernel and needs kernel recompilation to enable it.
RegardsMaciek
On Monday, 28 November, 2022 at 12:00:03 pm GMT-5, Nemo Crypto <nem...@gm...> wrote:
Hi Experts,
I have experience developing/implementing the entire PTP stack (IEEE1588) in a proprietary environment. So I am familiar with PTP, but I am new to linuxPTP and would like to test/debug it on my own and looking for inputs to proceed the right way.
Anyone here have tried using/running linuxptp in Rasberry Pi or Auduino? Or any other leads or better way to proceed is highly appreciated.
_______________________________________________
Linuxptp-users mailing list
Lin...@li...
https://lists.sourceforge.net/lists/listinfo/linuxptp-users
_______________________________________________
Linuxptp-users mailing list
Lin...@li...
https://lists.sourceforge.net/lists/listinfo/linuxptp-users
|
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From: Nemo C. <nem...@gm...> - 2022-11-30 23:38:27
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Thanks for your input Rich!
On Tuesday, 29 November, 2022 at 03:25:48 pm GMT-5, Rich Schmidt <sch...@gm...> wrote:
See Jeff Geerling's experiment with RPi CM4s and PTP...pretty straightforward...https://www.youtube.com/watch?v=RvnG-ywF6_s
https://www.jeffgeerling.com/blog/2022/ptp-and-ieee-1588-hardware-timestamping-on-raspberry-pi-cm4
Rich SchmidtUS Naval Observatory
On Tue, Nov 29, 2022 at 3:17 PM Maciek Machnikowski <ma...@ma...> wrote:
On 28 Nov 2022, at 23:30, Nemo Crypto <nem...@gm...> wrote:
Hi All,
I found that Rasberry Pi CM4 has support for PTP timestamping. It has Gigabit Ethernet PHY with IEEE 1588 support.If anyone is using the same and running ptp4l on it, please respond. We can collaborate.
Thanks :)
Linuxptp runs on RPi CM4 with HW timestamping support and 1PPS in/out. See details in this thread: https://github.com/raspberrypi/linux/issues/4151#issuecomment-1214951075
Bear in mind that this support was disabled in mainstream kernel and needs kernel recompilation to enable it.
RegardsMaciek
On Monday, 28 November, 2022 at 12:00:03 pm GMT-5, Nemo Crypto <nem...@gm...> wrote:
Hi Experts,
I have experience developing/implementing the entire PTP stack (IEEE1588) in a proprietary environment. So I am familiar with PTP, but I am new to linuxPTP and would like to test/debug it on my own and looking for inputs to proceed the right way.
Anyone here have tried using/running linuxptp in Rasberry Pi or Auduino? Or any other leads or better way to proceed is highly appreciated.
_______________________________________________
Linuxptp-users mailing list
Lin...@li...
https://lists.sourceforge.net/lists/listinfo/linuxptp-users
_______________________________________________
Linuxptp-users mailing list
Lin...@li...
https://lists.sourceforge.net/lists/listinfo/linuxptp-users
--
"We learn from history that we learn nothing from history."
George Bernard Shaw
“The ideal subject of totalitarian rule is not the convinced Nazi or the convinced communist, but people for whom the distinction between fact and fiction . . . and the distinction between true and false . . . no longer exist.” —Hanna Arendt, “The Origins of Totalitarianism” (1951) |
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From: Nemo C. <nem...@gm...> - 2022-11-30 23:37:48
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Thank you for your input Maciek!
On Tuesday, 29 November, 2022 at 03:14:44 pm GMT-5, Maciek Machnikowski <ma...@ma...> wrote:
On 28 Nov 2022, at 23:30, Nemo Crypto <nem...@gm...> wrote:
Hi All,
I found that Rasberry Pi CM4 has support for PTP timestamping. It has Gigabit Ethernet PHY with IEEE 1588 support.If anyone is using the same and running ptp4l on it, please respond. We can collaborate.
Thanks :)
Linuxptp runs on RPi CM4 with HW timestamping support and 1PPS in/out. See details in this thread: https://github.com/raspberrypi/linux/issues/4151#issuecomment-1214951075
Bear in mind that this support was disabled in mainstream kernel and needs kernel recompilation to enable it.
RegardsMaciek
On Monday, 28 November, 2022 at 12:00:03 pm GMT-5, Nemo Crypto <nem...@gm...> wrote:
Hi Experts,
I have experience developing/implementing the entire PTP stack (IEEE1588) in a proprietary environment. So I am familiar with PTP, but I am new to linuxPTP and would like to test/debug it on my own and looking for inputs to proceed the right way.
Anyone here have tried using/running linuxptp in Rasberry Pi or Auduino? Or any other leads or better way to proceed is highly appreciated.
_______________________________________________
Linuxptp-users mailing list
Lin...@li...
https://lists.sourceforge.net/lists/listinfo/linuxptp-users
|
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