From: M. R. B. <mr...@0x...> - 2001-12-02 20:06:41
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* Paul Mundt <pm...@mv...> on Sun, Dec 02, 2001: >=20 > If the FIFO is slow in dealing with, there's likely a good reason for it.. > doing DMA directly without any kind of flow control might also cause you = to > kill the AICA. >=20 I have to see how Dan Potter does AICA DMA in KOS and review the notes from my reverse-engineering sessions. I think it operates like any other DMA on the DC's G2 bus .. let's hope so. Whoops! Just grabbed kos from CVS and yeah, it uses bitmaster's original AICA DMA example, so it's normal G2 DMA, nothing special. > The other thing to consider (as I've told you on IRC), the AICA is likely= not > too responsive.. and expecting it to be will likely end up shooting you i= n the > foot. Perhaps something more along the lines of waiting for a brief durat= ion > of time after a read (mdelay(5) perhaps?), and doing the reads with inter= rupts > disabled might prove to yield more consistent data without the need to do= a > nasty read-twice and compare hack. >=20 Yeah, I think the tests that people have done on the AICA haven't been that intensive ... if something broke that passed it off as broken instead of exploring work arounds. A couple of us need to sit down and really plug the fscker :P. M. R. |