From: M. R. B. <mr...@us...> - 2002-10-29 21:50:40
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Update of /cvsroot/linuxdc/linux-sh-dc/arch/sh/boards/dreamcast In directory usw-pr-cvs1:/tmp/cvs-serv570/arch/sh/boards/dreamcast Added Files: Makefile io.c irq.c mach.c pci.c rtc.c setup.c Log Message: Linux-SH 2.5.44 switchover (complete) --- NEW FILE: Makefile --- # # Makefile for the Sega Dreamcast specific parts of the kernel # # Note! Dependencies are done automagically by 'make dep', which also # removes any old dependencies. DON'T put your own dependencies here # unless it's something special (ie not a .c file). # obj-y := mach.o setup.o io.o irq.o rtc.o obj-$(CONFIG_PCI) += pci.o include $(TOPDIR)/Rules.make --- NEW FILE: io.c --- /* * $Id: io.c,v 1.1 2002/10/29 21:50:36 mrbrown Exp $ * I/O routines for SEGA Dreamcast */ #include <asm/io.h> #include <asm/machvec.h> unsigned long dreamcast_isa_port2addr(unsigned long offset) { return offset + 0xa0000000; } --- NEW FILE: irq.c --- /* * arch/sh/boards/dreamcast/irq.c * * Holly IRQ support for the Sega Dreamcast. * * Copyright (c) 2001, 2002 M. R. Brown <mr...@0x...> * * This file is part of the LinuxDC project (www.linuxdc.org) * Released under the terms of the GNU GPL v2.0 */ #include <linux/irq.h> #include <asm/io.h> #include <asm/irq.h> #include <asm/dreamcast/sysasic.h> /* Dreamcast System ASIC Hardware Events - The Dreamcast's System ASIC (a.k.a. Holly) is responsible for receiving hardware events from system peripherals and triggering an SH7750 IRQ. Hardware events can trigger IRQs 13, 11, or 9 depending on which bits are set in the Event Mask Registers (EMRs). When a hardware event is triggered, it's corresponding bit in the Event Status Registers (ESRs) is set, and that bit should be rewritten to the ESR to acknowledge that event. There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908. Event types can be found in include/asm-sh/dc_sysasic.h. There are three groups of EMRs that parallel the ESRs. Each EMR group corresponds to an IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928 triggers IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9. In the kernel, these events are mapped to virtual IRQs so that drivers can respond to them as they would a normal interrupt. In order to keep this mapping simple, the events are mapped as: 6900/6910 - Events 0-31, IRQ 13 6904/6924 - Events 32-63, IRQ 11 6908/6938 - Events 64-95, IRQ 9 */ #define ESR_BASE 0x005f6900 /* Base event status register */ #define EMR_BASE 0x005f6910 /* Base event mask register */ /* Helps us determine the EMR group that this event belongs to: 0 = 0x6910, 1 = 0x6920, 2 = 0x6930; also determine the event offset */ #define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32) /* Return the hardware event's bit positon within the EMR/ESR */ #define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31) /* For each of these *_irq routines, the IRQ passed in is the virtual IRQ (logically mapped to the corresponding bit for the hardware event). */ /* Disable the hardware event by masking its bit in its EMR */ static inline void disable_systemasic_irq(unsigned int irq) { unsigned long flags; __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); __u32 mask; save_and_cli(flags); mask = inl(emr); mask &= ~(1 << EVENT_BIT(irq)); outl(mask, emr); restore_flags(flags); } /* Enable the hardware event by setting its bit in its EMR */ static inline void enable_systemasic_irq(unsigned int irq) { unsigned long flags; __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); __u32 mask; save_and_cli(flags); mask = inl(emr); mask |= (1 << EVENT_BIT(irq)); outl(mask, emr); restore_flags(flags); } /* Acknowledge a hardware event by writing its bit back to its ESR */ static void ack_systemasic_irq(unsigned int irq) { __u32 esr = ESR_BASE + (LEVEL(irq) << 2); disable_systemasic_irq(irq); outl((1 << EVENT_BIT(irq)), esr); } /* After a IRQ has been ack'd and responded to, it needs to be renabled */ static void end_systemasic_irq(unsigned int irq) { if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) enable_systemasic_irq(irq); } static unsigned int startup_systemasic_irq(unsigned int irq) { enable_systemasic_irq(irq); return 0; } static void shutdown_systemasic_irq(unsigned int irq) { disable_systemasic_irq(irq); } struct hw_interrupt_type systemasic_int = { typename: "System ASIC", startup: startup_systemasic_irq, shutdown: shutdown_systemasic_irq, enable: enable_systemasic_irq, disable: disable_systemasic_irq, ack: ack_systemasic_irq, end: end_systemasic_irq, }; /* * Map the hardware event indicated by the processor IRQ to a virtual IRQ. */ int systemasic_irq_demux(int irq) { __u32 emr, esr, status, level; __u32 j, bit; switch (irq) { case 13: level = 0; break; case 11: level = 1; break; case 9: level = 2; break; default: return irq; } emr = EMR_BASE + (level << 4) + (level << 2); esr = ESR_BASE + (level << 2); /* Mask the ESR to filter any spurious, unwanted interrtupts */ status = inl(esr); status &= inl(emr); /* Now scan and find the first set bit as the event to map */ for (bit = 1, j = 0; j < 32; bit <<= 1, j++) { if (status & bit) { irq = HW_EVENT_IRQ_BASE + j + (level << 5); return irq; } } /* Not reached */ return irq; } --- NEW FILE: mach.c --- /* * $Id: mach.c,v 1.1 2002/10/29 21:50:36 mrbrown Exp $ * SEGA Dreamcast machine vector */ #include <linux/config.h> #include <linux/init.h> #include <linux/time.h> #include <asm/machvec.h> #include <asm/machvec_init.h> #include <asm/io_generic.h> #include <asm/dreamcast/io.h> #include <asm/irq.h> void __init dreamcast_pcibios_init(void); /* * The Machine Vector */ struct sh_machine_vector mv_dreamcast __initmv = { mv_nr_irqs: NR_IRQS, mv_inb: generic_inb, mv_inw: generic_inw, mv_inl: generic_inl, mv_outb: generic_outb, mv_outw: generic_outw, mv_outl: generic_outl, mv_inb_p: generic_inb_p, mv_inw_p: generic_inw, mv_inl_p: generic_inl, mv_outb_p: generic_outb_p, mv_outw_p: generic_outw, mv_outl_p: generic_outl, mv_insb: generic_insb, mv_insw: generic_insw, mv_insl: generic_insl, mv_outsb: generic_outsb, mv_outsw: generic_outsw, mv_outsl: generic_outsl, mv_readb: generic_readb, mv_readw: generic_readw, mv_readl: generic_readl, mv_writeb: generic_writeb, mv_writew: generic_writew, mv_writel: generic_writel, mv_ioremap: generic_ioremap, mv_iounmap: generic_iounmap, mv_isa_port2addr: dreamcast_isa_port2addr, mv_irq_demux: systemasic_irq_demux, mv_hw_dreamcast: 1, }; ALIAS_MV(dreamcast) --- NEW FILE: pci.c --- /* $ $Id: pci.c,v 1.1 2002/10/29 21:50:36 mrbrown Exp $ * Dreamcast PCI: Supports SEGA Broadband Adaptor only. */ #include <linux/config.h> #include <linux/sched.h> #include <linux/kernel.h> #include <linux/param.h> #include <linux/interrupt.h> #include <linux/init.h> #include <linux/irq.h> #include <linux/pci.h> #include <asm/io.h> #include <asm/irq.h> #include <asm/dreamcast/sysasic.h> #define GAPSPCI_REGS 0x01001400 #define GAPSPCI_DMA_BASE 0x01840000 #define GAPSPCI_DMA_SIZE 32768 #define GAPSPCI_BBA_CONFIG 0x01001600 #define GAPSPCI_IRQ HW_EVENT_EXTERNAL static int gapspci_dma_used; /* XXX: Uh... */ static struct resource gapspci_io_resource = { "GAPSPCI IO", 0x01001600, 0x010016ff, IORESOURCE_IO }; static struct resource gapspci_mem_resource = { "GAPSPCI mem", 0x01840000, 0x01847fff, IORESOURCE_MEM }; static struct pci_ops gapspci_pci_ops; struct pci_channel board_pci_channels[] = { {&gapspci_pci_ops, &gapspci_io_resource, &gapspci_mem_resource, 0, 1}, {NULL, NULL, NULL, 0, 0}, }; struct pci_fixup pcibios_fixups[] = { {0, 0, 0, NULL} }; #define BBA_SELECTED(bus,devfn) (bus->number==0 && devfn==0) static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val) { switch (size) { case 1: if (BBA_SELECTED(bus, devfn)) *val = (u8)inb(GAPSPCI_BBA_CONFIG+where); else *val = (u8)0xff; break; case 2: if (BBA_SELECTED(bus, devfn)) *val = (u16)inw(GAPSPCI_BBA_CONFIG+where); else *val = (u16)0xffff; break; case 4: if (BBA_SELECTED(bus, devfn)) *val = inl(GAPSPCI_BBA_CONFIG+where); else *val = 0xffffffff; break; } return PCIBIOS_SUCCESSFUL; } static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) { if (BBA_SELECTED(bus, devfn)) { switch (size) { case 1: if (BBA_SELECTED(bus, devfn)) outb((u8)val, GAPSPCI_BBA_CONFIG+where); break; case 2: if (BBA_SELECTED(bus, devfn)) outw((u16)val, GAPSPCI_BBA_CONFIG+where); break; case 4: if (BBA_SELECTED(bus, devfn)) outl(val, GAPSPCI_BBA_CONFIG+where); break; } } return PCIBIOS_SUCCESSFUL; } static struct pci_ops gapspci_pci_ops = { .read = gapspci_read, .write = gapspci_write, }; void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t * dma_handle) { unsigned long buf; if (gapspci_dma_used+size > GAPSPCI_DMA_SIZE) return NULL; buf = GAPSPCI_DMA_BASE+gapspci_dma_used; gapspci_dma_used = PAGE_ALIGN(gapspci_dma_used+size); printk("pci_alloc_consistent: %ld bytes at 0x%lx\n", (long)size, buf); *dma_handle = (dma_addr_t)buf; return (void *)P2SEGADDR(buf); } void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle) { /* XXX */ gapspci_dma_used = 0; } void __init pcibios_fixup_pbus_ranges(struct pci_bus *bus, struct pbus_set_ranges_data *ranges) { } void __init pcibios_fixup_bus(struct pci_bus *bus) { struct list_head *ln; struct pci_dev *dev; for (ln=bus->devices.next; ln != &bus->devices; ln=ln->next) { dev = pci_dev_b(ln); if (!BBA_SELECTED(bus, dev->devfn)) continue; printk("PCI: MMIO fixup to %s\n", dev->name); dev->resource[1].start=0x01001700; dev->resource[1].end=0x010017ff; } } static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin) { return PCI_SLOT(dev->devfn); } static int __init map_dc_irq(struct pci_dev *dev, u8 slot, u8 pin) { return GAPSPCI_IRQ; } void __init pcibios_fixup(void) { /* Do nothing. */ } void __init pcibios_fixup_irqs(void) { pci_fixup_irqs(no_swizzle, map_dc_irq); } int __init gapspci_init(void) { int i; char idbuf[16]; for(i=0; i<16; i++) idbuf[i]=inb(GAPSPCI_REGS+i); if(strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16)) return -1; outl(0x5a14a501, GAPSPCI_REGS+0x18); for(i=0; i<1000000; i++); if(inl(GAPSPCI_REGS+0x18)!=1) return -1; outl(0x01000000, GAPSPCI_REGS+0x20); outl(0x01000000, GAPSPCI_REGS+0x24); outl(GAPSPCI_DMA_BASE, GAPSPCI_REGS+0x28); outl(GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE, GAPSPCI_REGS+0x2c); outl(1, GAPSPCI_REGS+0x14); outl(1, GAPSPCI_REGS+0x34); gapspci_dma_used=0; /* Setting Broadband Adapter */ outw(0xf900, GAPSPCI_BBA_CONFIG+0x06); outl(0x00000000, GAPSPCI_BBA_CONFIG+0x30); outb(0x00, GAPSPCI_BBA_CONFIG+0x3c); outb(0xf0, GAPSPCI_BBA_CONFIG+0x0d); outw(0x0006, GAPSPCI_BBA_CONFIG+0x04); outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10); outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14); return 0; } /* Haven't done anything here as yet */ char * __devinit pcibios_setup(char *str) { return str; } --- NEW FILE: rtc.c --- /* arch/sh/kernel/rtc-aica.c * * Dreamcast AICA RTC routines. * * Copyright (c) 2001, 2002 M. R. Brown <mr...@0x...> * Copyright (c) 2002 Paul Mundt <le...@ch...> * * Released under the terms of the GNU GPL v2.0. * */ #include <linux/time.h> #include <asm/io.h> extern void (*rtc_get_time)(struct timespec *); extern int (*rtc_set_time)(const time_t); /* The AICA RTC has an Epoch of 1/1/1950, so we must subtract 20 years (in seconds to get the standard Unix Epoch when getting the time, and add 20 years when setting the time. */ #define TWENTY_YEARS ((20 * 365LU + 5) * 86400) /* The AICA RTC is represented by a 32-bit seconds counter stored in 2 16-bit registers.*/ #define AICA_RTC_SECS_H 0xa0710000 #define AICA_RTC_SECS_L 0xa0710004 /** * aica_rtc_gettimeofday - Get the time from the AICA RTC * @tv: pointer to resulting timeval * * Grabs the current RTC seconds counter and adjusts it to the Unix Epoch. */ void aica_rtc_gettimeofday(struct timespec *ts) { unsigned long val1, val2; do { val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); } while (val1 != val2); ts->tv_sec = val1 - TWENTY_YEARS; /* Can't get nanoseconds with just a seconds counter. */ ts->tv_nsec = 0; } /** * aica_rtc_settimeofday - Set the AICA RTC to the current time * @tv: contains the timeval to set * * Adjusts the given @tv to the AICA Epoch and sets the RTC seconds counter. */ int aica_rtc_settimeofday(const time_t secs) { unsigned long val1, val2; unsigned long adj = secs + TWENTY_YEARS; do { ctrl_outl((adj & 0xffff0000) >> 16, AICA_RTC_SECS_H); ctrl_outl((adj & 0xffff), AICA_RTC_SECS_L); val1 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); val2 = ((ctrl_inl(AICA_RTC_SECS_H) & 0xffff) << 16) | (ctrl_inl(AICA_RTC_SECS_L) & 0xffff); } while (val1 != val2); return 0; } void aica_time_init(void) { rtc_get_time = aica_rtc_gettimeofday; rtc_set_time = aica_rtc_settimeofday; } --- NEW FILE: setup.c --- /* arch/sh/kernel/setup_dc.c * * Hardware support for the Sega Dreamcast. * * Copyright (c) 2001, 2002 M. R. Brown <mr...@li...> * Copyright (c) 2002 Paul Mundt <le...@ch...> * * This file is part of the LinuxDC project (www.linuxdc.org) * * Released under the terms of the GNU GPL v2.0. * * This file originally bore the message (with enclosed-$): * Id: setup_dc.c,v 1.5 2001/05/24 05:09:16 mrbrown Exp * SEGA Dreamcast support */ #include <linux/sched.h> #include <linux/kernel.h> #include <linux/param.h> #include <linux/interrupt.h> #include <linux/init.h> #include <linux/irq.h> #include <asm/io.h> #include <asm/irq.h> #include <asm/dreamcast/sysasic.h> extern struct hw_interrupt_type systemasic_int; /* XXX: Move this into it's proper header. */ extern void (*board_time_init)(void); extern void aica_time_init(void); const char *get_system_type(void) { return "Sega Dreamcast"; } #ifdef CONFIG_PCI extern int gapspci_init(void); #endif int __init platform_setup(void) { int i; /* Mask all hardware events */ /* XXX */ /* Acknowledge any previous events */ /* XXX */ /* Assign all virtual IRQs to the System ASIC int. handler */ for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) irq_desc[i].handler = &systemasic_int; board_time_init = aica_time_init; #ifdef CONFIG_PCI if (gapspci_init() < 0) printk(KERN_WARNING "GAPSPCI was not detected.\n"); #endif return 0; } |