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[linuxdc-cvs] CVS: linux/include/asm-sh aica.h,NONE,1.1 io_powervr2dc.h,NONE,1.1 powervr2dc.h,NONE,1.1 rtc.h,1.1.1.1,1.2 io.h,1.3,1.4 irq.h,1.3,1.4
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From: M. R. B. <mr...@us...> - 2001-02-21 15:17:52
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Update of /cvsroot/linuxdc/linux/include/asm-sh In directory usw-pr-cvs1:/tmp/cvs-serv302 Modified Files: rtc.h io.h irq.h Added Files: aica.h io_powervr2dc.h powervr2dc.h Log Message: Added initial Dreamcast PowerVR2DC and hardware support --- NEW FILE --- /* include/asm-sh/aica.h * * Hardware register definitions for the Yamaha AICA hardware found in the * Dreamcast. * * Copyright (c) 2001 M. R. Brown <mr...@0x...> * */ #ifndef __ASM_AICA_H #define __ASM_AICA_H #define AICA_BASE 0xa0700000 #define AICA_RAM 0xa0800000 /* RTC registers */ #define AICA_REG_RTCH 0xa0710000 #define AICA_REG_RTCL 0xa0710004 #endif /* __ASM_AICA_H */ --- NEW FILE --- /* include/asm-sh/io_powervr2dc.h * * Copyright (c) 2001 M. R. Brown <mr...@0x...> * * Adapted from io_ec3104.h by Philipp Rumpf * * I/O definitions for the NEC PowerVR2 DC System ASIC. * * Since most of anything DC-related goes out through the PowerVR2DC * chip (DMA, on-board peripherals, etc.), this is pivotal to a solid * Dreamcast port. */ #ifndef _ASM_SH_IO_POWERVR2DC_H #define _ASM_SH_IO_POWERVR2DC_H #include <asm/io_generic.h> #include <linux/types.h> /* Not implemented quite yet. */ /* extern unsigned char powervr2dc_inb(unsigned long port); extern unsigned short powervr2dc_inw(unsigned long port); extern unsigned int powervr2dc_inl(unsigned long port); extern void powervr2dc_outb(unsigned char value, unsigned long port); extern void powervr2dc_outw(unsigned short value, unsigned long port); extern void powervr2dc_outl(unsigned int value, unsigned long port); */ /* The mysterious IRQ9 */ extern int powervr2dc_irq_demux(int irq); #ifdef __WANT_IO_DEF # define __inb generic_inb # define __inw generic_inw # define __inl generic_inl # define __outb generic_outb # define __outw generic_outw # define __outl generic_outl # define __inb_p generic_inb # define __inw_p generic_inw # define __inl_p generic_inl # define __outb_p generic_outb # define __outw_p generic_outw # define __outl_p generic_outl # define __insb generic_insb # define __insw generic_insw # define __insl generic_insl # define __outsb generic_outsb # define __outsw generic_outsw # define __outsl generic_outsl # define __readb generic_readb # define __readw generic_readw # define __readl generic_readl # define __writeb generic_writeb # define __writew generic_writew # define __writel generic_writel /* This may change soon... */ # define __isa_port2addr generic_isa_port2addr # define __ioremap generic_ioremap # define __ioremap_nocache generic_ioremap_nocache # define __iounmap generic_iounmap #endif #endif /* _ASM_SH_IO_POWERVR2DC_H */ --- NEW FILE --- /* include/asm-sh/powervr2dc.h * * Hardware register definitions for the Dreamcast PowerVR2DC ASIC. * * Copyright (c) 2001 M. R. Brown <mr...@0x...> * * The PowerVR2DC System ASIC (P/N SEGA 315-6201) is responsible for most of * the Dreamcast's peripheral I/O, whether it be DMA, interrupts, FIFOs, etc. I've * seen the entire architecture referred to as the "G2 bus", but I'm not quite sure * which components represent the G2 bus and which are seperate (read: I don't know * what the G2 bus is or where it's located). For this reason, my sources assume * everything is done by the PowerVR2DC, hence the naming convention. One exception * to this rule is the Yamaha AICA system (see aica.h). I'm assuming that the AICA * participates on the G2 bus (as it has G2 DMA, possible interrupts, etc.), but it's * big enough to warrant is own section. * */ #ifndef __ASM_POWERVR2DC_H #define __ASM_POWERVR2DC_H #define PVR2DC_BASE 0xa05f0000 /* PowerVR2DC interrupts are multiplexed on IRQ9 */ #define PVR2DC_IRQ 9 #define PVR2DC_IRQ_BASE 64 /* * There are three known PowerVR2DC interrupt source/mask registers, ranging from * a05f6900-6908 for source and a05f6930-6938 for masks. Each bit corresponds to an * individual interrupt. Because of this, we can represent those continguous * registers as a bitmap, and this means that there's possibly 96 interrupt sources * (there could be more than that!). */ #define PVR2DC_IRQ_NUM 96 /* Interrupt Pending Registers */ #define PVR2DC_REG_IPRA 0xa05f6900 #define PVR2DC_REG_IPRB 0xa05f6904 #define PVR2DC_REG_IPRC 0xa05f6908 /* Interrupt Mask Registers */ #define PVR2DC_REG_IMRA 0xa05f6930 #define PVR2DC_REG_IMRB 0xa05f6934 #define PVR2DC_REG_IMRC 0xa05f6938 /* Partial mapping of interrupts */ /* 6900/6930 */ #define PVR2DC_INT_TAUNK0 (PVR2DC_IRQ_BASE + 0) /* unknown .. TA rendering? */ #define PVR2DC_INT_TAUNK1 (PVR2DC_IRQ_BASE + 1) /* unknown .. TA rendering? */ #define PVR2DC_INT_RNDRC (PVR2DC_IRQ_BASE + 2) /* TA: render completion */ #define PVR2DC_INT_SCAN1 (PVR2DC_IRQ_BASE + 3) /* scanline trigger #1 */ #define PVR2DC_INT_SCAN2 (PVR2DC_IRQ_BASE + 4) /* scanline trigger #2 */ #define PVR2DC_INT_VBL (PVR2DC_IRQ_BASE + 5) /* vertical retrace */ #define PVR2DC_INT_OLQC (PVR2DC_IRQ_BASE + 7) /* opaque list q. completion */ #define PVR2DC_INT_OLMQC (PVR2DC_IRQ_BASE + 8) /* " " modifier " " */ #define PVR2DC_INT_TLQC (PVR2DC_IRQ_BASE + 9) /* transparent list q. compl. */ #define PVR2DC_INT_TLMQC (PVR2DC_IRQ_BASE + 10) /* " " modifier " " */ #define PVR2DC_INT_PTLQC (PVR2DC_IRQ_BASE + 21) /* punch-thru list q. compl. */ /* 6904/6934 */ #define PVR2DC_INT_GDIOC (PVR2DC_IRQ_BASE + 32) /* GD-ROM I/O completion */ /* 6908/6938 */ #define PVR2DC_INT_PRIMEM (PVR2DC_IRQ_BASE + 66) /* out of primitive memory */ #define PVR2DC_INT_PPBMEM (PVR2DC_IRQ_BASE + 67) /* out of PP-block memory */ /* Misc. registers */ /* PowerVR2DC version */ #define PVR2DC_REG_VERSION 0xa05f8004 #endif /* __ASM_POWERVR2DC_H */ Index: rtc.h =================================================================== RCS file: /cvsroot/linuxdc/linux/include/asm-sh/rtc.h,v retrieving revision 1.1.1.1 retrieving revision 1.2 diff -C2 -r1.1.1.1 -r1.2 *** rtc.h 2001/02/09 12:07:25 1.1.1.1 --- rtc.h 2001/02/21 15:18:50 1.2 *************** *** 2,5 **** --- 2,7 ---- #define _ASM_RTC_H + #include <linux/config.h> + #include <asm/machvec.h> *************** *** 7,12 **** --- 9,19 ---- #define rtc_settimeofday sh_mv.mv_rtc_settimeofday + #if defined(CONFIG_SH_RTC) extern void sh_rtc_gettimeofday(struct timeval *tv); extern int sh_rtc_settimeofday(const struct timeval *tv); + #elif defined(CONFIG_SH_DREAMCAST) + extern void dc_aica_rtc_gettimeofday(struct timeval *tv); + extern int dc_aica_rtc_settimeofday(const struct timeval *tv); + #endif #endif /* _ASM_RTC_H */ Index: io.h =================================================================== RCS file: /cvsroot/linuxdc/linux/include/asm-sh/io.h,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -r1.3 -r1.4 *** io.h 2001/02/09 16:28:28 1.3 --- io.h 2001/02/21 15:18:50 1.4 *************** *** 121,125 **** # include <asm/io_ec3104.h> # elif defined(CONFIG_SH_DREAMCAST) ! # include <asm/io_dc.h> # elif defined(CONFIG_SH_CAT68701) # include <asm/io_cat68701.h> --- 121,125 ---- # include <asm/io_ec3104.h> # elif defined(CONFIG_SH_DREAMCAST) ! # include <asm/io_powervr2dc.h> # elif defined(CONFIG_SH_CAT68701) # include <asm/io_cat68701.h> Index: irq.h =================================================================== RCS file: /cvsroot/linuxdc/linux/include/asm-sh/irq.h,v retrieving revision 1.3 retrieving revision 1.4 diff -C2 -r1.3 -r1.4 *** irq.h 2001/02/09 16:28:28 1.3 --- irq.h 2001/02/21 15:18:50 1.4 *************** *** 136,139 **** --- 136,141 ---- # elif defined (CONFIG_SH_EC3104) # define OFFCHIP_NR_IRQS 16 + # elif defined (CONFIG_SH_DREAMCAST) + # define OFFCHIP_NR_IRQS 96 # else # define OFFCHIP_NR_IRQS 0 *************** *** 286,289 **** --- 288,296 ---- extern int cat68701_irq_demux(int irq); #define irq_demux cat68701_irq_demux + + #elif defined(CONFIG_SH_DREAMCAST) + + extern int powervr2dc_irq_demux(int irq); + #define irq_demux powervr2dc_irq_demux #else |
