From: James S. <jsi...@us...> - 2002-06-03 22:45:28
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Update of /cvsroot/linuxconsole/ruby/linux/arch/ia64/kernel In directory usw-pr-cvs1:/tmp/cvs-serv23928/linux/arch/ia64/kernel Modified Files: setup.c Log Message: Synced to 2.5.19 Index: setup.c =================================================================== RCS file: /cvsroot/linuxconsole/ruby/linux/arch/ia64/kernel/setup.c,v retrieving revision 1.6 retrieving revision 1.7 diff -u -d -r1.6 -r1.7 --- setup.c 1 May 2002 18:07:49 -0000 1.6 +++ setup.c 3 Jun 2002 22:44:55 -0000 1.7 @@ -377,7 +377,7 @@ switch (c->family) { case 0x07: memcpy(family, "Itanium", 8); break; - case 0x1f: memcpy(family, "Itanium 2", 9); break; + case 0x1f: memcpy(family, "Itanium 2", 10); break; default: sprintf(family, "%u", c->family); break; } @@ -541,6 +541,20 @@ */ identify_cpu(my_cpu_info); +#ifdef CONFIG_MCKINLEY + { +#define FEATURE_SET 16 + struct ia64_pal_retval iprv; + + if (my_cpu_info->family == 0x1f) { + PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, FEATURE_SET, 0); + if ((iprv.status == 0) && (iprv.v0 & 0x80) && (iprv.v2 & 0x80)) + PAL_CALL_PHYS(iprv, PAL_PROC_SET_FEATURES, + (iprv.v1 | 0x80), FEATURE_SET, 0); + } + } +#endif + /* Clear the stack memory reserved for pt_regs: */ memset(ia64_task_regs(current), 0, sizeof(struct pt_regs)); @@ -552,7 +566,7 @@ * shouldn't be affected by this (moral: keep your ia32 locks aligned and you'll * be fine). */ - ia64_set_dcr( IA64_DCR_DM | IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR + ia64_set_dcr( IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | IA64_DCR_DR | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC); #ifndef CONFIG_SMP ia64_set_fpu_owner(0); |