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[Linuxconsole-commit]CVS: ruby/linux/arch/i386/kernel dmi_scan.c,1.2,1.3 setup.c,1.32,1.33
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From: James S. <jsi...@us...> - 2002-01-20 03:54:49
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Update of /cvsroot/linuxconsole/ruby/linux/arch/i386/kernel
In directory usw-pr-cvs1:/tmp/cvs-serv23561/arch/i386/kernel
Modified Files:
dmi_scan.c setup.c
Log Message:
Synced to 2.5.X.
Index: dmi_scan.c
===================================================================
RCS file: /cvsroot/linuxconsole/ruby/linux/arch/i386/kernel/dmi_scan.c,v
retrieving revision 1.2
retrieving revision 1.3
diff -u -d -r1.2 -r1.3
--- dmi_scan.c 2001/10/29 00:10:58 1.2
+++ dmi_scan.c 2002/01/20 03:54:45 1.3
@@ -7,8 +7,10 @@
#include <linux/slab.h>
#include <asm/io.h>
#include <linux/pm.h>
-#include <linux/keyboard.h>
+#include <linux/input.h>
+#include <asm/system.h>
+unsigned long dmi_broken;
int is_sony_vaio_laptop;
struct dmi_header
@@ -86,7 +88,7 @@
}
-int __init dmi_iterate(void (*decode)(struct dmi_header *))
+static int __init dmi_iterate(void (*decode)(struct dmi_header *))
{
unsigned char buf[20];
long fp=0xE0000L;
@@ -97,7 +99,7 @@
* Skip on x86/64 with simnow. Will eventually go away
* If you see this ifdef in 2.6pre mail me !
*/
- return;
+ return -1;
#endif
while( fp < 0xFFFFF)
@@ -189,6 +191,7 @@
* corruption problems
*/
+#if 0
static __init int disable_ide_dma(struct dmi_blacklist *d)
{
#ifdef CONFIG_BLK_DEV_IDE
@@ -201,6 +204,7 @@
#endif
return 0;
}
+#endif
/*
* Reboot options and system auto-detection code provided by
@@ -314,15 +318,14 @@
return 0;
}
-#if defined(CONFIG_SONYPI) || defined(CONFIG_SONYPI_MODULE)
/*
- * Check for a Sony Vaio system in order to enable the use of
- * the sonypi driver (we don't want this driver to be used on
- * other systems, even if they have the good PCI IDs).
+ * Check for a Sony Vaio system
*
- * This one isn't a bug detect for those who asked, we simply want to
- * activate Sony specific goodies like the camera and jogdial..
+ * On a Sony system we want to enable the use of the sonypi
+ * driver for Sony-specific goodies like the camera and jogdial.
+ * We also want to avoid using certain functions of the PnP BIOS.
*/
+
static __init int sony_vaio_laptop(struct dmi_blacklist *d)
{
if (is_sony_vaio_laptop == 0)
@@ -332,7 +335,6 @@
}
return 0;
}
-#endif
/*
* This bios swaps the APM minute reporting bytes over (Many sony laptops
@@ -358,12 +360,66 @@
printk(KERN_INFO " *** Possibly defective BIOS detected (irqtable)\n");
printk(KERN_INFO " *** Many BIOSes matching this signature have incorrect IRQ routing tables.\n");
printk(KERN_INFO " *** If you see IRQ problems, in paticular SCSI resets and hangs at boot\n");
- printk(KERN_INFO " *** contact your vendor and ask about updates.\n");
+ printk(KERN_INFO " *** contact your hardware vendor and ask about updates.\n");
printk(KERN_INFO " *** Building an SMP kernel may evade the bug some of the time.\n");
return 0;
}
/*
+ * ASUS K7V-RM has broken ACPI table defining sleep modes
+ */
+
+static __init int broken_acpi_Sx(struct dmi_blacklist *d)
+{
+ printk(KERN_WARNING "Detected ASUS mainboard with broken ACPI sleep table\n");
+ dmi_broken |= BROKEN_ACPI_Sx;
+ return 0;
+}
+
+/*
+ * Toshiba fails to preserve interrupts over S1
+ */
+
+static __init int init_ints_after_s1(struct dmi_blacklist *d)
+{
+ printk(KERN_WARNING "Toshiba with broken S1 detected.\n");
+ dmi_broken |= BROKEN_INIT_AFTER_S1;
+ return 0;
+}
+
+/*
+ * Some Bioses enable the PS/2 mouse (touchpad) at resume, even if it
+ * was disabled before the suspend. Linux gets terribly confused by that.
+ */
+
+typedef void (pm_kbd_func) (void);
+
+static __init int broken_ps2_resume(struct dmi_blacklist *d)
+{
+#ifdef CONFIG_INPUT
+/*
+ if (pm_kbd_request_override == NULL)
+ {
+ pm_kbd_request_override = pckbd_pm_resume;
+ printk(KERN_INFO "%s machine detected. Mousepad Resume Bug workaround enabled.\n", d->ident);
+ }
+*/
+#endif
+ return 0;
+}
+
+
+/*
+ * Simple "print if true" callback
+ */
+
+static __init int print_if_true(struct dmi_blacklist *d)
+{
+ printk("%s\n", d->ident);
+ return 0;
+}
+
+/*
* Process the DMI blacklists
*/
@@ -380,6 +436,11 @@
NO_MATCH, NO_MATCH, NO_MATCH
} },
#endif
+ { broken_ps2_resume, "Dell Latitude C600", { /* Handle problems with APM on the C600 */
+ MATCH(DMI_SYS_VENDOR, "Dell"),
+ MATCH(DMI_PRODUCT_NAME, "Latitude C600"),
+ NO_MATCH, NO_MATCH
+ } },
{ broken_apm_power, "Dell Inspiron 5000e", { /* Handle problems with APM on Inspiron 5000e */
MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
MATCH(DMI_BIOS_VERSION, "A04"),
@@ -400,10 +461,6 @@
MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),
NO_MATCH, NO_MATCH
} },
- { set_apm_ints, "IBM", { /* Allow interrupts during suspend on IBM laptops */
- MATCH(DMI_SYS_VENDOR, "IBM"),
- NO_MATCH, NO_MATCH, NO_MATCH
- } },
{ set_apm_ints, "Dell Inspiron", { /* Allow interrupts during suspend on Dell Inspiron laptops*/
MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
MATCH(DMI_PRODUCT_NAME, "Inspiron 4000"),
@@ -431,13 +488,11 @@
MATCH(DMI_BIOS_VENDOR,"SystemSoft"),
MATCH(DMI_BIOS_VERSION,"Version R2.08")
} },
-#if defined(CONFIG_SONYPI) || defined(CONFIG_SONYPI_MODULE)
{ sony_vaio_laptop, "Sony Vaio", { /* This is a Sony Vaio laptop */
MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
MATCH(DMI_PRODUCT_NAME, "PCG-"),
NO_MATCH, NO_MATCH,
} },
-#endif
{ swab_apm_power_in_minutes, "Sony VAIO", { /* Handle problems with APM on Sony Vaio PCG-N505X(DE) */
MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
MATCH(DMI_BIOS_VERSION, "R0206H"),
@@ -462,6 +517,12 @@
MATCH(DMI_BIOS_DATE, "05/11/00"), NO_MATCH
} },
+ { swab_apm_power_in_minutes, "Sony VAIO", { /* Handle problems with APM on Sony Vaio PCG-Z600NE */
+ MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
+ MATCH(DMI_BIOS_VERSION, "WME01Z1"),
+ MATCH(DMI_BIOS_DATE, "08/11/00"), NO_MATCH
+ } },
+
{ swab_apm_power_in_minutes, "Sony VAIO", { /* Handle problems with APM on Sony Vaio PCG-Z505LS */
MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies LTD"),
MATCH(DMI_BIOS_VERSION, "R0203D0"),
@@ -503,16 +564,53 @@
MATCH(DMI_BIOS_VERSION,"L440GX0.86B.0094.P10"),
NO_MATCH, NO_MATCH
} },
+ { broken_pirq, "l44GX Bios", { /* Bad $PIR */
+ MATCH(DMI_BIOS_VENDOR, "Intel Corporation"),
+ MATCH(DMI_BIOS_VERSION,"L440GX0.86B.0120.P12"),
+ NO_MATCH, NO_MATCH
+ } },
{ broken_pirq, "l44GX Bios", { /* Bad $PIR */
MATCH(DMI_BIOS_VENDOR, "Intel Corporation"),
MATCH(DMI_BIOS_VERSION,"L440GX0.86B.0125.P13"),
NO_MATCH, NO_MATCH
} },
+ { broken_pirq, "l44GX Bios", { /* Bad $PIR */
+ MATCH(DMI_BIOS_VENDOR, "Intel Corporation"),
+ MATCH(DMI_BIOS_VERSION,"L440GX0.86B.0066.P07.9906041405"),
+ NO_MATCH, NO_MATCH
+ } },
/* Intel in disgiuse - In this case they can't hide and they don't run
too well either... */
{ broken_pirq, "Dell PowerEdge 8450", { /* Bad $PIR */
MATCH(DMI_PRODUCT_NAME, "Dell PowerEdge 8450"),
+ NO_MATCH, NO_MATCH, NO_MATCH
+ } },
+
+ { broken_acpi_Sx, "ASUS K7V-RM", { /* Bad ACPI Sx table */
+ MATCH(DMI_BIOS_VERSION,"ASUS K7V-RM ACPI BIOS Revision 1003A"),
+ MATCH(DMI_BOARD_NAME, "<K7V-RM>"),
+ NO_MATCH, NO_MATCH
+ } },
+
+ { init_ints_after_s1, "Toshiba Satellite 4030cdt", { /* Reinitialization of 8259 is needed after S1 resume */
+ MATCH(DMI_PRODUCT_NAME, "S4030CDT/4.3"),
+ NO_MATCH, NO_MATCH, NO_MATCH
+ } },
+
+ { print_if_true, KERN_WARNING "IBM T23 - BIOS 1.03b+ and controller firmware 1.02+ may be needed for Linux APM.", {
+ MATCH(DMI_SYS_VENDOR, "IBM"),
+ MATCH(DMI_BIOS_VERSION, "1AET38WW (1.01b)"),
+ NO_MATCH, NO_MATCH
+ } },
+
+
+ /*
+ * Generic per vendor APM settings
+ */
+
+ { set_apm_ints, "IBM", { /* Allow interrupts during suspend on IBM laptops */
+ MATCH(DMI_SYS_VENDOR, "IBM"),
NO_MATCH, NO_MATCH, NO_MATCH
} },
Index: setup.c
===================================================================
RCS file: /cvsroot/linuxconsole/ruby/linux/arch/i386/kernel/setup.c,v
retrieving revision 1.32
retrieving revision 1.33
diff -u -d -r1.32 -r1.33
--- setup.c 2001/12/26 21:08:32 1.32
+++ setup.c 2002/01/20 03:54:45 1.33
@@ -155,6 +155,7 @@
extern int root_mountflags;
extern char _text, _etext, _edata, _end;
extern int blk_nohighio;
+void __init visws_get_board_type_and_rev(void);
static int disable_x86_serial_nr __initdata = 1;
static int disable_x86_fxsr __initdata = 0;
@@ -188,132 +189,7 @@
#define RAMDISK_PROMPT_FLAG 0x8000
#define RAMDISK_LOAD_FLAG 0x4000
-#ifdef CONFIG_VISWS
-char visws_board_type = -1;
-char visws_board_rev = -1;
-
-#define PIIX_PM_START 0x0F80
-
-#define SIO_GPIO_START 0x0FC0
-
-#define SIO_PM_START 0x0FC8
-
-#define PMBASE PIIX_PM_START
-#define GPIREG0 (PMBASE+0x30)
-#define GPIREG(x) (GPIREG0+((x)/8))
-#define PIIX_GPI_BD_ID1 18
-#define PIIX_GPI_BD_REG GPIREG(PIIX_GPI_BD_ID1)
-
-#define PIIX_GPI_BD_SHIFT (PIIX_GPI_BD_ID1 % 8)
-
-#define SIO_INDEX 0x2e
-#define SIO_DATA 0x2f
-
-#define SIO_DEV_SEL 0x7
-#define SIO_DEV_ENB 0x30
-#define SIO_DEV_MSB 0x60
-#define SIO_DEV_LSB 0x61
-
-#define SIO_GP_DEV 0x7
-
-#define SIO_GP_BASE SIO_GPIO_START
-#define SIO_GP_MSB (SIO_GP_BASE>>8)
-#define SIO_GP_LSB (SIO_GP_BASE&0xff)
-
-#define SIO_GP_DATA1 (SIO_GP_BASE+0)
-
-#define SIO_PM_DEV 0x8
-
-#define SIO_PM_BASE SIO_PM_START
-#define SIO_PM_MSB (SIO_PM_BASE>>8)
-#define SIO_PM_LSB (SIO_PM_BASE&0xff)
-#define SIO_PM_INDEX (SIO_PM_BASE+0)
-#define SIO_PM_DATA (SIO_PM_BASE+1)
-
-#define SIO_PM_FER2 0x1
-
-#define SIO_PM_GP_EN 0x80
-
-static void __init visws_get_board_type_and_rev(void)
-{
- int raw;
-
- visws_board_type = (char)(inb_p(PIIX_GPI_BD_REG) & PIIX_GPI_BD_REG)
- >> PIIX_GPI_BD_SHIFT;
-/*
- * Get Board rev.
- * First, we have to initialize the 307 part to allow us access
- * to the GPIO registers. Let's map them at 0x0fc0 which is right
- * after the PIIX4 PM section.
- */
- outb_p(SIO_DEV_SEL, SIO_INDEX);
- outb_p(SIO_GP_DEV, SIO_DATA); /* Talk to GPIO regs. */
-
- outb_p(SIO_DEV_MSB, SIO_INDEX);
- outb_p(SIO_GP_MSB, SIO_DATA); /* MSB of GPIO base address */
-
- outb_p(SIO_DEV_LSB, SIO_INDEX);
- outb_p(SIO_GP_LSB, SIO_DATA); /* LSB of GPIO base address */
-
- outb_p(SIO_DEV_ENB, SIO_INDEX);
- outb_p(1, SIO_DATA); /* Enable GPIO registers. */
-
-/*
- * Now, we have to map the power management section to write
- * a bit which enables access to the GPIO registers.
- * What lunatic came up with this shit?
- */
- outb_p(SIO_DEV_SEL, SIO_INDEX);
- outb_p(SIO_PM_DEV, SIO_DATA); /* Talk to GPIO regs. */
-
- outb_p(SIO_DEV_MSB, SIO_INDEX);
- outb_p(SIO_PM_MSB, SIO_DATA); /* MSB of PM base address */
-
- outb_p(SIO_DEV_LSB, SIO_INDEX);
- outb_p(SIO_PM_LSB, SIO_DATA); /* LSB of PM base address */
-
- outb_p(SIO_DEV_ENB, SIO_INDEX);
- outb_p(1, SIO_DATA); /* Enable PM registers. */
-
-/*
- * Now, write the PM register which enables the GPIO registers.
- */
- outb_p(SIO_PM_FER2, SIO_PM_INDEX);
- outb_p(SIO_PM_GP_EN, SIO_PM_DATA);
-
-/*
- * Now, initialize the GPIO registers.
- * We want them all to be inputs which is the
- * power on default, so let's leave them alone.
- * So, let's just read the board rev!
- */
- raw = inb_p(SIO_GP_DATA1);
- raw &= 0x7f; /* 7 bits of valid board revision ID. */
- if (visws_board_type == VISWS_320) {
- if (raw < 0x6) {
- visws_board_rev = 4;
- } else if (raw < 0xc) {
- visws_board_rev = 5;
- } else {
- visws_board_rev = 6;
-
- }
- } else if (visws_board_type == VISWS_540) {
- visws_board_rev = 2;
- } else {
- visws_board_rev = raw;
- }
-
- printk(KERN_INFO "Silicon Graphics %s (rev %d)\n",
- visws_board_type == VISWS_320 ? "320" :
- (visws_board_type == VISWS_540 ? "540" :
- "unknown"),
- visws_board_rev);
- }
-#endif
-
-
static char command_line[COMMAND_LINE_SIZE];
char saved_command_line[COMMAND_LINE_SIZE];
@@ -868,6 +744,7 @@
printk(KERN_WARNING "Use a PAE enabled kernel.\n");
else
printk(KERN_WARNING "Use a HIGHMEM enabled kernel.\n");
+ max_pfn = MAXMEM_PFN;
#else /* !CONFIG_HIGHMEM */
#ifndef CONFIG_X86_PAE
if (max_pfn > MAX_NONPAE_PFN) {
@@ -1277,9 +1154,24 @@
}
break;
- case 6: /* An Athlon/Duron. We can trust the BIOS probably */
- mcheck_init(c);
- break;
+ case 6: /* An Athlon/Duron */
+
+ /* Bit 15 of Athlon specific MSR 15, needs to be 0
+ * to enable SSE on Palomino/Morgan CPU's.
+ * If the BIOS didn't enable it already, enable it
+ * here.
+ */
+ if (c->x86_model == 6 || c->x86_model == 7) {
+ if (!test_bit(X86_FEATURE_XMM, &c->x86_capability)) {
+ printk(KERN_INFO "Enabling disabled K7/SSE Support.\n");
+ rdmsr(MSR_K7_HWCR, l, h);
+ l &= ~0x00008000;
+ wrmsr(MSR_K7_HWCR, l, h);
+ set_bit(X86_FEATURE_XMM, &c->x86_capability);
+ }
+ }
+ break;
+
}
display_cacheinfo(c);
@@ -1906,7 +1798,6 @@
c->x86_cache_size = (cc>>24)+(dd>>24);
}
sprintf( c->x86_model_id, "WinChip %s", name );
- mcheck_init(c);
break;
case 6:
@@ -2190,9 +2081,56 @@
if ( p )
strcpy(c->x86_model_id, p);
+
+#ifdef CONFIG_SMP
+ if (test_bit(X86_FEATURE_HT, &c->x86_capability)) {
+ extern int phys_proc_id[NR_CPUS];
+
+ u32 eax, ebx, ecx, edx;
+ int index_lsb, index_msb, tmp;
+ int initial_apic_id;
+ int cpu = smp_processor_id();
- /* Enable MCA if available */
- mcheck_init(c);
+ cpuid(1, &eax, &ebx, &ecx, &edx);
+ smp_num_siblings = (ebx & 0xff0000) >> 16;
+
+ if (smp_num_siblings == 1) {
+ printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
+ } else if (smp_num_siblings > 1 ) {
+ index_lsb = 0;
+ index_msb = 31;
+ /*
+ * At this point we only support two siblings per
+ * processor package.
+ */
+#define NR_SIBLINGS 2
+ if (smp_num_siblings != NR_SIBLINGS) {
+ printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
+ smp_num_siblings = 1;
+ goto too_many_siblings;
+ }
+ tmp = smp_num_siblings;
+ while ((tmp & 1) == 0) {
+ tmp >>=1 ;
+ index_lsb++;
+ }
+ tmp = smp_num_siblings;
+ while ((tmp & 0x80000000 ) == 0) {
+ tmp <<=1 ;
+ index_msb--;
+ }
+ if (index_lsb != index_msb )
+ index_msb++;
+ initial_apic_id = ebx >> 24 & 0xff;
+ phys_proc_id[cpu] = initial_apic_id >> index_msb;
+
+ printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
+ phys_proc_id[cpu]);
+ }
+
+ }
+too_many_siblings:
+#endif
}
void __init get_cpu_vendor(struct cpuinfo_x86 *c)
@@ -2572,7 +2510,7 @@
init_rise(c);
break;
}
-
+
printk(KERN_DEBUG "CPU: After vendor init, caps: %08x %08x %08x %08x\n",
c->x86_capability[0],
c->x86_capability[1],
@@ -2599,6 +2537,9 @@
/* Disable the PN if appropriate */
squash_the_stupid_serial_number(c);
+ /* Init Machine Check Exception if available. */
+ mcheck_init(c);
+
/* If the model name is still unset, do table lookup. */
if ( !c->x86_model_id[0] ) {
char *p;
@@ -2696,7 +2637,7 @@
"fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
"cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
"pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
- "fxsr", "sse", "sse2", "ss", NULL, "tm", "ia64", NULL,
+ "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
/* AMD-defined */
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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